Patent application number | Description | Published |
20080218255 | Filter Characteristic Adjusting Apparatus and Filter Characteristic Adjusting Method - There is provided a filter characteristic adjusting apparatus and a filter characteristic adjusting method which can avoid an increase in circuit scale of the filter characteristic adjusting apparatus, and can speedily adjust a characteristic frequency of the filter to a desired frequency. When performing characteristic adjustment for the filter, the test signal generation unit ( | 09-11-2008 |
20080315933 | PULSE SYNTHESIS CIRCUIT - A high-level period of each of n first pulse signals partially or wholly overlaps a period during which all of n second pulse signals are at the low level. A high-level period of each of the n second pulse signals partially or wholly overlaps a period during which all of the n first pulse signals are at the low level. Each of n first drive transistors includes a source connected to a ground node, a drain connected to a first node, and a gate receiving a corresponding one of the first pulse signals. Each of n second drive transistors includes a source connected to the ground node, a drain connected to a second node, and a gate receiving a corresponding one of the second pulse signals. A current mirror circuit allows a current corresponding to a current flowing through the second node to flow through the first node. | 12-25-2008 |
20090040089 | A-TO-D CONVERTER - A successive approximation type A-to-D converter includes a cyclic D-to-A converter ( | 02-12-2009 |
20090115502 | REFERENCE CURRENT CIRCUIT, REFERENCE VOLTAGE CIRCUIT, AND STARTUP CIRCUIT - A current mirror circuit | 05-07-2009 |
20090134931 | MULTIPHASE LEVEL SHIFT SYSTEM - Each of n level shifters (LS | 05-28-2009 |
20090237281 | A/D CONVERTER - An A/D converter includes: a plurality of A/D conversion circuits ( | 09-24-2009 |
20090284282 | LEVEL SHIFTER - Input transistors have sources which are connected to a first input reference node and gates to which a pair of input signals are input. Input-side voltage relaxing transistors have sources connected to drains of the pair of input transistors and gates connected to a second input reference node. Output-side voltage relaxing transistors have sources connected to output nodes, gates connected to a first output reference node, and drains connected to drains of the input-side voltage relaxing transistors. First and second inverter circuits are in correspondence with the output nodes, and are connected between second and third output reference nodes. Each of the first and second inverter circuits also supplies a voltage at one of the second and third output reference nodes to its corresponding one of the output nodes, depending on a voltage at its non-corresponding one of the output nodes. | 11-19-2009 |
20100149010 | PIPELINED AD CONVERTER - A pipelined AD converter ( | 06-17-2010 |
20100182181 | A-TO-D CONVERTER - A successive approximation type A-to-D converter includes a cyclic D-to-A converter ( | 07-22-2010 |
20110050476 | INTEGRATOR, RESONATOR, AND OVERSAMPLING A/D CONVERTER - An integrator includes an operational amplifier, a first filter connected to an inverting input terminal of the operational amplifier, and a second filter connected between the inverting input terminal and an output terminal of the operational amplifier. The first filter includes n resistive elements connected in series, and (n−1) capacitive elements each having one end connected to an interconnecting node of the resistive elements and the other end connected to ground. The second filter includes n capacitive elements connected in series, and (n−1) resistive elements each having one end connected to an interconnecting node of the capacitive elements and the other end connected to ground. | 03-03-2011 |
20110080821 | COUPLED RING OSCILLATOR AND METHOD FOR INITIALIZING THE SAME - In a coupled ring oscillator including q ring oscillators each including p inverter circuits connected together to form a ring shape, and a phase coupling ring including (p×q) phase coupling circuits each of which is configured to couple an output of one of the p inverter circuits of one of the q ring oscillators to an output of one of the p inverter circuits of another one of the q ring oscillators in a predetermined phase relationship, and which are connected together to form a ring shape, for at least one group made up of one of the p inverter circuits in each of the q ring oscillators, outputs of the q inverter circuits belonging to the at least one group are fixed in phase with one another, the q ring oscillators are caused to oscillate in the in-phase fixed state, and then, the outputs of the q inverter circuits are released from the in-phase fixed state. | 04-07-2011 |
20110291873 | DIFFERENTIAL AMPLIFIER AND PIPELINE A/D CONVERTER USING THE SAME - In a differential amplifier, input terminals to which a differential input is given are connected to gates of input transistors, respectively. One ends of capacitive devices are connected to sources of the input transistors, respectively. A switching section switches connection between the other ends of the capacitive devices and the input terminals according to a control clock at each phase. | 12-01-2011 |
20120112939 | PIPELINE AD CONVERTER AND METHOD OF CORRECTING OUTPUT FROM THE CONVERTER - A digital correction circuit calculates AD conversion errors EA and EA′ in AD conversion stages subsequent to a target stage of AD conversion. EA is an error between an AD conversion result when a digital output of the target stage is set to 0, and an AD conversion result when it is set to +1 in a state where a higher reference voltage is input to the target stage. EB is an error between an AD conversion result when the digital output is set to 0, and an AD conversion result when it is set to −1 in a state where a lower reference voltage is input to the target stage. The digital correction circuit adds a correcting value of the target stage to the digital output. The correcting value is −(EA+EB)/2 when the digital output is −1, −(EA−EB)/2 when it is 0, and +(EA+EB)/2 when it is +1. | 05-10-2012 |
20130285579 | ACTUATOR DRIVER - A actuator driver includes a digital filter configured to perform phase compensation of a digital torque command signal using a fed-back digital signal; a digital PWM generator configured to generate a plurality of pulse-width modulated PWM control signals in response to an output of the digital filter; at least one H bridge configured to select and output a first or second terminal voltage in response to the plurality of PWM control signals; first and second continuous time ΔΣ A/D converters configured to convert the first and second terminal voltages from analog to digital, respectively; and a feed-back filter configured to decimate outputs of the first and second continuous time ΔΣ A/D converters to feed back the digital signal to the digital filter. | 10-31-2013 |
20140062750 | REFERENCE VOLTAGE STABILIZER CIRCUIT AND INTEGRATED CIRCUIT INCLUDING THE SAME - A reference voltage is maintained stable against disturbance noise and self-noise of an internal circuit. A reference voltage stabilizer circuit for stabilizing the reference voltage to be supplied through at least one of first or second signal lines includes a preceding-stage circuit including a capacitive path connected between the first and second signal lines; and a subsequent-stage circuit including a resistive path connected between the first and second signal lines, and a resistive circuit inserted, between the capacitive path and the resistive path, into one of the first or second signal lines through which the reference voltage is supplied. | 03-06-2014 |
20140285370 | SUCCESSIVE APPROXIMATION AD CONVERTER AND NOISE GENERATOR - In a successive approximation AD converter, a noise generator outputs the output of a ΔΣ modulator as a noise signal. A selector circuit can output the noise signal, in place of a digital signal for generating a comparison-target voltage for the next bit, to a capacitor element of a capacitance DAC. During sampling of an analog input voltage, the noise signal is supplied to the capacitance DAC via the selector circuit, and thereafter normal successive approximation operation is executed. | 09-25-2014 |