Patent application number | Description | Published |
20090072349 | Semiconductor device and method of manufacturing the same - Example embodiments provide a semiconductor device and a method of manufacturing the same. A semiconductor device according to example embodiments may include a lower electrode including a first lower electrode and a second lower electrode, and the second lower electrode may be formed on at least a part of the first lower electrode using a material different from the first lower electrode. A dielectric film may be formed on at least a part of the second lower electrode and a first upper electrode may be formed on the dielectric film. | 03-19-2009 |
20090072350 | SEMICONDUCTOR DEVICES HAVING A CONTACT PLUG AND FABRICATION METHODS THEREOF - Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes an insulating layer that is formed on a supporting layer and has a contact hole. A first contact plug is formed on an inner wall and bottom of the contact hole. A second contact plug buries the contact hole and is formed on the first contact plug. A conductive layer is connected to the first contact plug and the second contact plug. The bottom thickness of the first contact plug formed on the bottom of the contact hole is thicker than the inner wall thickness of the first contact plug formed on the inner wall of the contact hole. | 03-19-2009 |
20090130457 | DIELECTRIC STRUCTURE - A dielectric structure includes a first dielectric layer, a buffer oxide layer and a second dielectric layer. The lower dielectric layer has a material having a perovskite structure including titanium and is formed on a substrate. The buffer oxide layer is formed on the first dielectric layer. The second dielectric layer has a perovskite structure including titanium and is formed on the buffer oxide layer. | 05-21-2009 |
20090258470 | Method of Manufacturing a Semiconductor Device Using an Atomic Layer Deposition Process - Methods of manufacturing a semiconductor device include forming an absorption layer on a surface of a substrate by exposing the surface of the substrate to a first reaction gas at a first temperature. A metal oxide layer is then formed on the surface of the substrate by exposing the absorption layer to a second reaction gas at a second temperature. The first reaction gas may include a precursor containing zirconium (e.g., tetrakis(ethylmethylamino)zirconium) and the second reaction gas may include an oxidizing agent. | 10-15-2009 |
20100196592 | METHODS OF FABRICATING CAPACITORS INCLUDING LOW-TEMPERATURE CAPPING LAYERS - In a method of fabricating a capacitor, a lower electrode is formed, and a dielectric layer is formed on the lower electrode. An upper electrode is foamed on the dielectric layer opposite the lower electrode. A low-temperature capping layer is formed on the upper electrode at a temperature of less than about 300° C. Related devices and fabrication methods are also discussed. | 08-05-2010 |
20100203725 | Methods of fabricating semiconductor devices and semiconductor devices including a contact plug processed by rapid thermal annealing - A method of fabricating a semiconductor device includes depositing tungsten on an insulating layer in which a contact hole is formed by chemical vapor deposition (CVD), performing chemical mechanical planarization (CMP) on the tungsten to expose the insulating layer and form a tungsten contact plug, and performing rapid thermal oxidation (RTO) on the tungsten contact plug in an oxygen atmosphere such that the tungsten expands volumetrically into tungsten oxide (W | 08-12-2010 |
20100209595 | Methods of Forming Strontium Ruthenate Thin Films and Methods of Manufacturing Capacitors Including the Same - In a method of forming a strontium ruthenate thin film using water vapor as an oxidizing agent, a strontium source and a ruthenium source are used. The strontium source includes a cyclopentadienyl (Cp) ligand, an alkoxide ligand, an alkyl ligand, an amide ligand or a halide ligand, and the ruthenium source includes a beta diketonate ligand. | 08-19-2010 |
20110237043 | METHOD FOR MANUFACTURING CAPACITOR OF SEMICONDUCTOR DEVICE AND CAPACITOR OF SEMICONDUCTOR DEVICE MANUFACTURED THEREBY - A method of manufacturing a capacitor of a semiconductor device includes forming a high-k dielectric pattern on a semiconductor substrate, the high-k dielectric pattern having a pillar shape including a hole therein, forming a lower electrode in the hole of the high-k dielectric pattern, locally forming a blocking insulating pattern on an upper surface of the lower electrode, and forming an upper electrode covering the high-k dielectric pattern and the blocking insulating pattern. | 09-29-2011 |
20110242727 | CAPACITOR - A capacitor may include a lower electrode structure, a dielectric layer and an upper electrode structure. The lower electrode structure may include a first lower pattern, a first deformation-preventing layer pattern and a second lower pattern. The first lower pattern may have a cylindrical shape. The first deformation-preventing layer pattern may be formed on an inner surface of the first lower pattern. The second lower pattern may be formed on the first deformation-preventing layer pattern. The dielectric layer may be formed on the lower electrode structure. The upper electrode structure may be formed on the dielectric layer. Thus, the capacitor may have a high capacitance and improved electrical characteristics. | 10-06-2011 |
20120086014 | Semiconductor Device Having Glue Layer And Supporter - A plurality of metal patterns are disposed on a substrate. A support structure is provided between the plurality of metal patterns. The support structure has a supporter and a glue layer. Each of the plurality of metal patterns has a greater vertical length than a horizontal length on the substrate when viewed from a cross-sectional view. The supporter has a band gap energy of at least 4.5eV. The glue layer is in contact with the plurality of metal patterns. The supporter and the glue layer are formed of different materials. | 04-12-2012 |
20120119327 | CAPACITOR AND SEMICONDUCTOR DEVICE INCLUDING A CAPACITOR - A capacitor in a semiconductor memory device comprises a lower electrode on a substrate that is formed of a conductive metal oxide having a rutile crystalline structure, a titanium oxide dielectric layer on the lower electrode that has a rutile crystalline structure and includes impurities for reducing a leakage current, and an upper electrode on the titanium oxide dielectric layer. A method of forming a capacitor in a semiconductor device comprise steps of forming a lower electrode on a substrate that includes a conductive metal oxide having a rutile crystalline structure, forming a titanium oxide dielectric layer on the lower electrode that has a rutile crystalline structure and impurities for reducing a leakage current, and forming an upper electrode on the titanium oxide dielectric layer. | 05-17-2012 |
20120264271 | METHOD OF FORMING A CAPACITOR AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE USING THE SAME - A capacitor is fabricated by forming a mold layer of a silicon based material that is not an oxide of silicon, e.g., polysilicon or doped polysilicon, on a substrate, forming an opening through the mold layer, forming a barrier layer pattern along the sides of the opening, subsequently forming a lower electrode in the opening, then removing the mold layer and the barrier layer pattern, and finally sequentially forming dielectric layer and an upper electrode on the lower electrode. | 10-18-2012 |
20130217203 | CAPACITOR, METHOD OF FORMING A CAPACITOR, SEMICONDUCTOR DEVICE INCLUDING A CAPACITOR AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE - A capacitor in a semiconductor memory device comprises a lower electrode on a substrate that is formed of a conductive metal oxide having a rutile crystalline structure, a titanium oxide dielectric layer on the lower electrode that has a rutile crystalline structure and includes impurities for reducing a leakage current, and an upper electrode on the titanium oxide dielectric layer. A method of forming a capacitor in a semiconductor device comprise steps of forming a lower electrode on a substrate that includes a conductive metal oxide having a rutile crystalline structure, forming a titanium oxide dielectric layer on the lower electrode that has a rutile crystalline structure and impurities for reducing a leakage current, and forming an upper electrode on the titanium oxide dielectric layer. | 08-22-2013 |
20140145306 | SEMICONDUCTOR DEVICE HAVING GLUE LAYER AND SUPPORTER - A plurality of metal patterns are disposed on a substrate. A support structure is provided between the plurality of metal patterns. The support structure has a supporter and a glue layer. Each of the plurality of metal patterns has a greater vertical length than a horizontal length on the substrate when viewed from a cross-sectional view. The supporter has a band gap energy of at least 4.5 eV. The glue layer is in contact with the plurality of metal patterns. The supporter and the glue layer are formed of different materials. | 05-29-2014 |
20150076658 | Semiconductor Device Including Capacitor and Method of Manufacturing the Same - A semiconductor device includes a lower electrode including at least one of a noble metal and a conductive noble metal oxide, a dielectric layer disposed on the lower electrode and including titanium oxide, a protection insulating layer disposed on the dielectric layer and including tantalum oxide and a barrier oxide, and an upper electrode disposed on the protection insulating layer. | 03-19-2015 |
20150132909 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE USING PLASMA DOPING PROCESS AND SEMICONDUCTOR DEVICE MANUFACTURED BY THE METHOD - A method of manufacturing a semiconductor device includes forming a preliminary fin-type active pattern extending in a first direction, forming a device isolation pattern covering a lower portion of the preliminary fin-type active pattern, forming a gate structure extending in a second direction and crossing over the preliminary fin-type active pattern, forming a fin-type active pattern having a first region and a second region, forming a preliminary impurity-doped pattern on the second region by using a selective epitaxial-growth process, and forming an impurity-doped pattern by injecting impurities using a plasma doping process, wherein the upper surface of the first region is at a first level and the upper surface of the second region is at a second level lower than the first level. | 05-14-2015 |
Patent application number | Description | Published |
20090150768 | COMPOSITION-BASED APPLICATION USER INTERFACE FRAMEWORK - A method and computer readable device for enabling a plurality of telematics services providers to deliver multiple telematics applications to a telematics user device simultaneously by enabling a user interface of each telematics applications to be composed onto a single screen of said telematics device. The method comprises: receiving a content file and a layout file associated with each of the plurality of telematics service by a content push agent, the content file comprising support files including a text file, a graphical file and/or a sound file or the content file comprises a message document including configuration information as to the integration of the support files; storing the support files in a memory cache device by a content manager for storing local copies of the support files for frequent request by a plurality of extendible set of viewers; routing the message document to a viewer compositor which acts as a communication bus between the plurality of extendible set of viewers based upon the message document; and rendering the said plurality of extendible set of viewers simultaneously onto the single screen of the telematics device by a layout manager based upon the layout file. | 06-11-2009 |
20090240807 | CONTENT PUSH SERVICE - A method, system and computer program product for pushing contents to client devices is disclosed. The method, system, and computer program product handles group pushes, manages different content priorities, prevents one content push from starving others, and handles different transport mechanisms for different clients. | 09-24-2009 |
20090307006 | METHOD OF COLLABORATIVE EVALUATION INFRASTRUCTURE TO ASSESS THE QUALITY OF HEALTHCARE CLNICAL DECISION ACTORS - A voting system employing individual healthcare actors is described wherein votes representing the relation between target measurements and actual measurements are aggregated and used to determine treatment of patients. | 12-10-2009 |
20100321204 | SCALABLE ACQUISITION OF TELEMETRY DATA FROM INSTRUMENTED SYSTEMS ENITITIES OVER A WIRELESS NETWORK - A telemetry data acquisition management system includes a system processor and an interface engine, controlled by the system processor, for interfacing with sensor bearing systems, to receive telemetry data from the sensor bearing systems, and distribute the data to a plurality data processing systems or applications operational for processing telemetry data according to each sensor bearing systems' protocol. The system processor enables the plurality of multiple data processing systems or applications to specify telemetry requests including “fuzzy” timeliness protocol, generates a charging structure such that the sensor bearing systems are charge by usage commensurate with system load. | 12-23-2010 |
20120311082 | CONTENT PUSH SERVICE - A method, system and computer program product for pushing contents to client devices is disclosed. The method, system, and computer program product handles group pushes, manages different content priorities, prevents one content push from starving others, and handles different transport mechanisms for different clients. | 12-06-2012 |
Patent application number | Description | Published |
20080237597 | THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF - A TFT array panel includes: first and second gate members connected to each other; a gate insulating layer formed on the first and the second gate members; first and second semiconductor members formed on the gate insulating layer opposite the first and the second gate members, respectively; first and second source members connected to each other and located near the first and the second semiconductor members, respectively; first and second drain members located near the first and the second semiconductor members, respectively, and located opposite the first and the second source members with respect to the first and the second gate members, respectively; and a pixel electrode connected to the first and the second drain members. The first gate, semiconductor, source, and drain members form a first TFT, and the second gate, semiconductor, source, and drain members form a second TFT. | 10-02-2008 |
20110134351 | IN-PLANE SWITCHING MODE LIQUID CRYSTAL DISPLAY AND FABRICATION METHOD THEREOF - An in-plane switching (IPS) mode liquid crystal display (LCD) includes: a plurality of gate lines and data lines arranged vertically and horizontally to define a plurality of pixel regions on a first substrate; thin film transistors (TFTs) at each crossing of the gate and data lines and including an active layer, a source electrode and a drain electrode, respectively; a common electrode line substantially parallel to the gate lines; a plurality of first pixel electrodes and first common electrodes and a plurality of second pixel electrodes and second common electrodes having a tilt angle with respect to the gate lines and alternately disposed on upper and lower portions of the pixel regions to generate an in-plane electric field; and a second substrate attached with the first substrate. | 06-09-2011 |