Patent application number | Description | Published |
20090132730 | APPPARATUS AND METHOD FOR CONTROLLING POWER TO USB DEVICE - The present invention relates to an apparatus and method for controlling power to a Universal Serial Bus (USB) device. The present invention provides an apparatus for controlling power to a USB device, the USB device being used to connect a Personal Computer (PC) with a peripheral device, the power control apparatus including a plug-in port for connecting the peripheral device with the PC, a state detector for detecting whether the peripheral device is in a preparation completion state, a power supply unit for supplying power to the USB device, and a power control unit for controlling the power supply unit so that power is supplied to the USB device if it is determined that the peripheral device is in a plugged-in state, and if it is determined that the peripheral device is in a preparation completion state by the state detector. Accordingly, the present invention performs the supply of power only when the peripheral device is plugged into the USB device and its internal application program is in a preparation completion state, so that it can prevent power from being unnecessarily consumed. | 05-21-2009 |
20100210053 | PHOTO MASK AND METHOD OF MANUFACTURING IN-PLANE-SWITCHING MODE LIQUID CRYSTAL DISPLAY DEVICE USING THE SAME - A photo mask is disclosed. | 08-19-2010 |
20130043543 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device includes a semiconductor substrate including a first driving transistor region having a first driving transistor disposed therein and a second driving transistor region having a second driving transistor disposed therein, wherein the second driving transistor is driven at a lower voltage than the first driving transistor, a first gate insulating layer formed at edges of the second driving transistor region, and a second gate insulating layer formed at a center of the second driving transistor region, wherein the first gate insulating layer is thicker than the second gate insulating layer. | 02-21-2013 |
20140017602 | PHOTO MASK AND METHOD OF MANUFACTURING IN-PLANE SWITCHING MODE LIQUID CRYSTAL DISPLAY DEVICE USING THE SAME - A photo mask is disclosed. | 01-16-2014 |
20140061759 | NONVOLATILE MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME - A nonvolatile memory device includes a plurality of gate structures, each gate structure formed over a substrate and including a tunnel insulating layer, a floating gate, an inter-gate dielectric layer, and a control gate, which are sequentially stacked, and an interlayer dielectric layer covering the plurality of gate structures and having an air gap formed between adjacent gate structures, wherein the bottom surface of the air gap is positioned at a lower level than the surface of the tunnel insulating layer. | 03-06-2014 |
20140063966 | PROGRAMMING METHOD OF NONVOLATILE MEMORY DEVICE - Provided is a programming method of a nonvolatile memory device which includes a plurality of strings each including a source select transistor, a plurality of memory cells, and a drain select transistor which are connected in series between a common source line and a bit line. The programming method includes: applying a first voltage to the common source line during a first period in which a channel of a plurality of memory cells of an unselected string is floated; and applying a second voltage increased more than the first in voltage to the common source line during a second period in which a selected memory cell is programmed, when a selected word line belongs to a word line group adjacent to the common source line. | 03-06-2014 |
20150085582 | PROGRAMMING METHOD OF NONVOLATILE MEMORY DEVICE - Provided is a programming method of a nonvolatile memory device which includes a plurality of strings each including a source select transistor, a plurality of memory cells, and a drain select transistor which are connected in series between a common source line and a bit line, The programming method includes: applying a first voltage to the common source line during a first period in which a channel of a plurality of memory cells of an unselected string is floated; and applying a second voltage increased more than the first in voltage to the common source line during a second period in which a selected memory cell is programmed, when a selected word line belongs to a word line group adjacent to the common source line. | 03-26-2015 |
20160044494 | DETERMINING NETWORK CONNECTION STRUCTURE OF TARGET AREA - The disclosure is related to determining a network connection structure of devices in a target service place by a service server including a processor and a memory and located at a remote location from the target service place. In order to determine, subscriber information of a target subscriber may be obtained. Based on the subscriber information, public network information associated with the target subscriber may be obtained from predetermined network devices associated with the target subscriber. First devices may be detected based on the obtained subscriber information and the collected network information, wherein the first devices are belonging to the target subscriber and are located in the target subscriber's service place. | 02-11-2016 |
Patent application number | Description | Published |
20140233308 | SEMICONDUCTOR MEMORY DEVICE AND WRITING METHOD THEREOF - A writing method of a semiconductor memory device includes applying a plurality of program voltages sequentially generated to a selected word line, and applying any one of a plurality of source selection line voltages to a source selection line when each of the plurality of program voltages is applied. | 08-21-2014 |
20150084115 | SEMICONDUCTOR DEVICE - Provided is a semiconductor device including a plurality of pillar columns, each of the plurality of pillar columns including a plurality of pillars arranged in one direction to be offset from each other, wherein an mth pillar and an (m+1)th pillar, among the plurality of pillars included in each pillar column, are aligned with each other (m is an integer of 0 or more). | 03-26-2015 |
20160079273 | SEMICONDUCTOR DEVICE - Provided is a semiconductor device including a plurality of pillar columns, each of the plurality of pillar columns including a plurality of pillars arranged in one direction to be offset from each other, wherein an mth pillar and an (m+1)th pillar, among the plurality of pillars included in each pillar column, are aligned with each other (m is an integer of 0 or more). | 03-17-2016 |
Patent application number | Description | Published |
20150092130 | LIQUID CRYSTAL DISPLAY AND METHOD OF MANUFACTURING THE SAME - A liquid crystal display includes: a substrate; a thin film transistor comprising one or more terminals and disposed on the substrate; a pixel electrode connected to one of the terminals of the thin film transistor; and a roof layer disposed to face the pixel electrode, wherein a microcavity is formed between the pixel electrode and the roof layer, the microcavity including a liquid crystal material, wherein a plurality of microcavities are disposed along a first row and a second row adjacent to each other, a trench is formed between the first row and the second row, and at least one bridge connecting the first row and the second row is disposed at the trench. | 04-02-2015 |
20150116637 | LIQUID CRYSTAL DISPLAY AND METHOD OF MANUFACTURING THE SAME - A liquid crystal display includes: a substrate; a thin film transistor disposed on the substrate; a pixel electrode disposed on the thin film transistor; a roof layer facing the pixel electrode; a plurality of microcavities formed between the pixel electrode and the roof layer, each microcavity including liquid crystal materials; a trench formed between the microcavities; and a buffer region formed at an end portion of the trench. | 04-30-2015 |
20150192806 | DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME - A display apparatus includes a substrate; a cavity layer; a display material layer; and a capping layer. The cavity layer includes a plurality of barriers arranged to be spaced apart from one another on the substrate and partitioning pixel regions, and a roof layer connecting upper parts of the plurality of barriers. The cavity layer forms a plurality of cavities including a cavity. The display material layer is formed in the cavity. The capping layer is formed on the cavity layer, the capping layer including a sealant and a plurality of fillers dispersed in the sealant. | 07-09-2015 |
Patent application number | Description | Published |
20120244471 | PHOTORESIST RESIN COMPOSITION AND METHOD OF FORMING PATTERNS BY USING THE SAME - A method for forming a pattern includes forming a photosensitive film by coating a photosensitive resin composition on a substrate, exposing the photosensitive film to light through a mask that includes a light transmission region and a non-light transmission region, coating a developing solution on the photosensitive film, and forming a photosensitive film pattern by baking the photosensitive film, wherein the photosensitive resin composition includes an alkali soluble base resin, a photoacid generator and a photoactive compound. | 09-27-2012 |
20130316270 | MASK HAVING ASSIST PATTERN - A mask may include a circuit area and a pixel area. The circuit area includes a circuit pattern. The pixel area includes a pixel pattern which is extended in a length direction and an assist pattern which is at an end portion of the pixel pattern and adjacent to the circuit area. | 11-28-2013 |
20140065523 | PATTERN MASK AND METHOD OF MANUFACTURING THIN FILM PATTERN USING PATTERN MASK - A pattern mask for patterning a thin film includes a transparent or translucent substrate with a plurality of grooves formed thereon having a pitch of about 4.6 μm to about 10.8 μm. | 03-06-2014 |
20140076847 | PHOTORESIST COMPOSITION AND METHOD OF FORMING A METAL PATTERN USING THE SAME - A method of forming a metal pattern is disclosed. In the method, a metal layer is formed on a base substrate. A photoresist composition is coated on the metal layer to form a coating layer. The photoresist composition includes a binder resin, a photo-sensitizer, a mercaptopropionic acid compound and a solvent. The coating layer is exposed to a light. The coating layer is partially removed to form a photoresist pattern. The metal layer is patterned by using the photoresist pattern as a mask. | 03-20-2014 |
20150212422 | PHOTORESIST RESIN COMPOSITION AND METHOD OF FORMING PATTERNS BY USING THE SAME - A method for forming a pattern includes forming a photosensitive film by coating a photosensitive resin composition on a substrate, exposing the photosensitive film to light through a mask that includes a light transmission region and a non-light transmission region, coating a developing solution on the photosensitive film, and forming a photosensitive film pattern by baking the photosensitive film, wherein the photosensitive resin composition includes an alkali soluble base resin, a photoacid generator and a photoactive compound. | 07-30-2015 |
Patent application number | Description | Published |
20140073120 | METHOD OF FABRICATING GALLIUM NITRIDE BASED SEMICONDUCTOR DEVICE - Exemplary embodiments of the present invention disclose a method of fabricating a gallium nitride (GaN) based semiconductor device. The method includes growing GaN based semiconductor layers on a first surface of a GaN substrate to form a semiconductor stack, and separating at least a first portion of the GaN substrate from the semiconductor stack using a wire cutting technique. | 03-13-2014 |
20140131731 | LIGHT EMITTING DEVICE AND METHOD OF FABRICATING THE SAME - A light-emitting device according to an exemplary embodiment of the present invention includes a first conductivity-type semiconductor layer disposed on a substrate; an active layer disposed on the first conductivity-type semiconductor layer; a second conductivity-type semiconductor layer disposed on the active layer; and an irregular convex-concave pattern disposed on a surface of the first conductivity-type semiconductor layer. The irregular convex-concave pattern includes convex portions and concave portions, and the convex portions have irregular heights and the concave portions have irregular depths. The first conductivity-type semiconductor layer including the irregular convex-concave pattern is exposed from the active layer and the second conductivity-type semiconductor layer. | 05-15-2014 |
20150014702 | LIGHT-EMITTING DIODE HAVING IMPROVED LIGHT EXTRACTION EFFICIENCY AND METHOD FOR MANUFACTURING SAME - Disclosed are a light-emitting diode having improved light extraction efficiency and a method for manufacturing same. This light-emitting diode includes: a gallium nitride substrate having an upper surface and a lower surface; and a gallium nitride semiconductor multilayer structure disposed on the lower surface of the substrate, and having a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer. Herein, the gallium nitride substrate has a main pattern having a protruding portion and a concave portion on the upper surface, and a rough surface formed on the protruding portion of the main pattern. The light-emitting diode is capable of improving light extraction efficiency through the upper surface thereof since the rough surface is formed along with the main pattern on the upper surface of the gallium nitride substrate. | 01-15-2015 |
20160087158 | LIGHT EMITTING DIODE AND METHOD OF MANUFACTURING THE SAME - Disclosed herein are a light emitting diode including a plurality of protrusions including zinc oxide and a method for manufacturing the same. According to an exemplary embodiment of the present disclosure, the light emitting diode includes: a substrate; a nitride light emitting structure disposed on the substrate; and a transparent electrode layer disposed on the nitride light emitting structure, wherein the transparent electrode layer includes a plurality of protrusions, the plurality of protrusions each have a lower portion and an upper portion, and a side of the lower portion and a side of the upper portion have different gradients. | 03-24-2016 |