Patent application number | Description | Published |
20080305635 | METHOD FOR FABRICATING A PATTERN - A method for fabricating a patter is provided as followed. First, a material layer is provided, whereon a patterned hard mask layer is formed. A spacer is deposited on the sidewalls of the patterned hard mask layer. Then, the patterned hard mask layer is removed, and an opening is formed between the adjacent spacers. Afterwards, a portion of the material layer is removed to form a patterned material layer by using the spacer as mask. | 12-11-2008 |
20090033915 | APC SYSTEM AND MULTIVARIATE MONITORING METHOD FOR PLASMA PROCESS MACHINE - An advance process control (APC) system for a plasma process machine is provided, which includes at least an optical emission spectroscopy (OES) system and an APC analysis apparatus. The OES system is used for monitoring a testing object in the plasma process machine. The APC analysis apparatus is used for analyzing the data received from the OES system. | 02-05-2009 |
20090299668 | APC SYSTEM AND MULTIVARIATE MONITORING METHOD FOR PLASMA PROCESS MACHINE - An advance process control (APC) system for a plasma process machine is provided, which includes at least an optical emission spectroscopy (OES) system and an APC analysis apparatus. The OES system is used for monitoring a testing object in the plasma process machine. The APC analysis apparatus is used for analyzing the data received from the OES system. | 12-03-2009 |
20100038786 | Method for manufacturing a semiconductor device - A method for manufacturing a semiconductor device is disclosed. A semiconductor substrate such as bare silicon is provided, and a dielectric layer is formed over the semiconductor substrate. An opening is provided within the dielectric layer by removing a portion of the dielectric layer. A conformal first conductive layer is formed over the dielectric layer and the opening. A conformal second conductive layer is formed over the first conductive layer. A conformal barrier layer is formed over the second conductive layer. | 02-18-2010 |
20100041245 | HDP-CVD PROCESS, FILLING-IN PROCESS UTILIZING HDP-CVD, AND HDP-CVD SYSTEM - An HDP-CVD process is described, including a deposition step conducted in an HDP-CVD chamber and a pre-heating step that is performed outside of the HDP-CVD chamber before the deposition step and pre-heats a wafer to a temperature higher than room temperature and required in the HDP-CVD process deposition step. | 02-18-2010 |
20100244180 | METHOD FOR FABRICATING DEVICE ISOLATION STRUCTURE - A method of a fabricating a semiconductor device includes providing a substrate having a first region and a second region. A pad layer is formed overlying the substrate in both the first region and the second region. A mask layer is then formed overlying the pad layer. Thereafter, the mask layer, the pad layer and the substrate are patterned to form a plurality of first trenches in the first region and a plurality of second trenches in the second region. A trimming process is then performed on the mask layer to remove a portion of the mask layer. An insulation layer is formed over the substrate and fills the plurality of the first trenches and the plurality of the second trenches. Ultimately, a planarization process is performed on the insulation layer. | 09-30-2010 |
20110056432 | CONTACT BARRIER LAYER DEPOSITION PROCESS - A method for depositing a barrier layer onto a substrate is disclosed. A layer of titanium (Ti) is deposited onto the substrate using an ionized metal plasma (IMP) physical vapor deposition process. The IMP process includes: generating gaseous ions, accelerating the gaseous ions towards a titanium target, sputtering the titanium atoms from the titanium target with the gaseous ions, ionizing the titanium atoms using a plasma, and depositing the ionized titanium atoms onto the substrate to form the layer of Ti. A first layer of titanium nitride (TiN) is deposited onto the layer of Ti using a metal organic chemical vapor deposition (MOCVD) process. A second layer of TiN is deposited onto the first layer of TiN using a thermal chemical vapor deposition process. The newly completed barrier layer is annealed in the presence of nitrogen at a temperature of between about 500° C. to about 750° C. | 03-10-2011 |
20120000423 | HDP-CVD SYSTEM - An HDP-CVD system is described, including an HDP-CVD chamber for depositing a material on a wafer, and a pre-heating chamber disposed outside of the HDP-CVD chamber to pre-heat the wafer, before the wafer is loaded in the HDP-CVD chamber, to a temperature higher than room temperature and required in the deposition step to be conducted in the HDP-CVD chamber. The pre-heating chamber is equipped with a heating lamp for the pre-heating. The wafer has been formed with a trench before being pre-heated. | 01-05-2012 |