Sungyeon
Sungyeon Cho, Seoul KR
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20130186457 | SOLAR CELL, SOLAR CELL MANUFACTURING DEVICE, AND METHOD FOR MANUFACTURING THE SAME - A solar cell, a solar cell manufacturing device, and a method for manufacturing the solar cell are discussed. The solar cell manufacturing device includes a chamber; an ion implantation unit configured to implant ions into a substrate inside the chamber and a mask positioned between the ion implantation unit and the substrate. The mask includes a first opening to form a lightly doped region having a first concentration at one surface of the substrate, a second opening to form a heavily doped region having a second concentration higher than the first concentration at the one surface of the substrate, and at least one connector formed to cross the second opening. The second opening includes finger openings formed in a first direction, and bus openings formed in a second direction crossing the first direction. | 07-25-2013 |
Sungyeon Hwang, Uijeongbu-Si KR
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20140002969 | DISPLAY APPARATUS | 01-02-2014 |
Sungyeon Lee, Seoul KR
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20140192588 | Nonvolatile Memory Device and Read Method Thereof - A nonvolatile memory device is provided which includes a main area including main cells connected to word lines and main bit lines; a reference area including reference cells connected to the word lines and reference bit lines and programmed using the same write condition as that of the main area; a reference sense amplifier circuit configured to read data written at the reference area through the reference bit lines at a read operation; and control logic configured to control the reference sense amplifier circuit such that data written at the reference area is shifted with a weight scheme and then read, the data written at the reference area being used as a read reference value of the main area at a read operation. | 07-10-2014 |
20140204652 | RESISTIVE MEMORY DEVICE - A resistive memory device includes memory cell array blocks, a reference cell array block, two first and second sink transistors, and a word line. Each of the memory cell array blocks includes a row line, and the reference cell array block includes a reference row line. One of the first sink transistors is disposed between one end of the row line and a ground and the other of the first sink transistors is disposed between an opposite end of the row line and the ground. One of the second sink transistors is disposed between one end of the reference row line and the ground and the other of the second sink transistors is disposed between an opposite end of the reference row line and the ground. The word line is coupled to gates of the first and second sink transistors. | 07-24-2014 |