Patent application number | Description | Published |
20100246258 | NONVOLATILE MEMORY DEVICE AND RELATED METHOD OF PROGRAMMING - A nonvolatile memory device comprises a memory cell array comprising a plurality of memory cells, a voltage generator configured to generate voltages to program the plurality of memory cells, and a control logic component configured to control the voltage generator to provide a plurality of program voltages to selected memory cells during successive iterations of a program loop. Wherein where memory cells corresponding to one logic state are judged to be program passed during a current iteration of the program loop, the control logic component controls the voltage generator such that a program voltage corresponding to the one logic state is skipped during subsequent iterations of the program loop. | 09-30-2010 |
20100329029 | PAGE BUFFER, NONVOLATILE SEMICONDUCTOR MEMORY DEVICE HAVING THE SAME, AND PROGRAM AND DATA VERIFICATION METHOD - A page buffer includes a sense latch, a data latch and a page buffer controller. The sense latch is connected to a bit line, and is configured to set stored data in response to a sense latch control signal, and to change the stored data in response to a signal applied to the bit line in a data verification operation. The data latch is configured to store multi-bit data to be programmed in a program operation, and to set stored data in response to a data latch control signal in the data verification operation. The page buffer controller is configured to control the bit line in accordance with the multi-bit data stored in the data latch in the program operation, and to output the sense latch control signal and the data latch control signal in accordance with the multi-bit data stored in the data latch in response to a control signal in the data verification operation. | 12-30-2010 |
20120033501 | NONVOLATILE MEMORY DEVICE WITH 3D MEMORY CELL ARRAY - Disclosed is a nonvolatile memory device which includes a 3D memory cell array having words lines that extend from a lowest memory cell array layer closest to a substrate to a highest memory cell array layer farthest from the substrate, a voltage generator circuit generating first and second voltage signals, and a row selecting circuit that simultaneously applies the first voltage signal to a selected word line and the second voltage signal to an unselected word line. The selected word line and the unselected word line have different resistances, yet the first voltage signal is applied to the selected word line and the second voltage signal is applied to the unselected word line with a same rising slope over a defined period of time. | 02-09-2012 |
20120039120 | NON-VOLATILE MEMORY DEVICE AND METHOD FOR PROGRAMMING THE DEVICE, AND MEMORY SYSTEM - A non-volatile memory device comprises a memory cell array comprising memory cells arranged in rows connected to corresponding word lines and columns connected to corresponding bit lines, a page buffer that stores a program data, a read-write circuit that programs and re-programs the program data into selected memory cells of the memory cell array and reads stored data from the programmed memory cells, and a control circuit that controls the page buffer and the read-write circuit to program the selected memory cells by loaded the program data from in page buffer and to re-program the selected memory cells by re-loaded the program data in the page buffer. | 02-16-2012 |
20120039130 | Nonvolatile Memory Devices, Channel Boosting Methods Thereof, Programming Methods Thereof, And Memory Systems Including The Same - Non-volatile memory device channel boosting methods in which at least two strings are connected to one bit line, the channel boosting methods including applying an initial channel voltage to channels of strings in a selected memory block, floating inhibit strings each having an un-programmed cell among the strings, and boosting channels of the floated inhibit strings. | 02-16-2012 |
20120300561 | MEMORY DEVICES AND PROGRAM METHODS THEREOF - Memory devices and program methods thereof, the memory devices including a memory cell array with a three-dimensional structure, a voltage generator configured to supply a pass voltage and a program voltage to the memory cell array, and a control logic configured to make the rising slope of the pass voltage variable with a program loop during a program operation. The memory device may improve a program speed by adjusting the rising slope of the pass voltage according to the program loop. | 11-29-2012 |
20130051146 | THREE DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE - A three-dimensional (3D) semiconductor memory device comprises memory cell strings each comprising at least one selection transistor and at least one memory cell, a first pass transistor group sharing a first well region and comprising a first selection line pass transistor connected to the selection transistor and a first world line pass transistor connected to the memory cell, a second pass transistor group sharing a second well region and comprising a second selection line pass transistor connected to the selection transistor, and a controller that controls the first pass transistor group and the second pass transistor group. The controller applies selected voltages to the first and second well regions during read operation. | 02-28-2013 |
20130279260 | NON-VOLATILE MEMORY DEVICE AND METHOD FOR PROGRAMMING THE DEVICE, AND MEMORY SYSTEM - A non-volatile memory device comprises a memory cell array comprising memory cells arranged in rows connected to corresponding word lines and columns connected to corresponding bit lines, a page buffer that stores a program data, a read-write circuit that programs and re-programs the program data into selected memory cells of the memory cell array and reads stored data from the programmed memory cells, and a control circuit that controls the page buffer and the read-write circuit to program the selected memory cells by loaded the program data from in page buffer and to re-program the selected memory cells by re-loaded the program data in the page buffer. | 10-24-2013 |
20130279262 | NONVOLATILE MEMORY DEVICES, CHANNEL BOOSTING METHODS THEREOF, PROGRAMMING METHODS THEREOF, AND MEMORY SYSTEMS INCLUDING THE SAME - Non-volatile memory device channel boosting methods in which at least two strings are connected to one bit line, the channel boosting methods including applying an initial channel voltage to channels of strings in a selected memory block, floating inhibit strings each having an un-programmed cell among the strings, and boosting channels of the floated inhibit strings. | 10-24-2013 |