Su, Hsinchu City
Chao-Min Su, Hsinchu City TW
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20110048103 | Method and System for Motion Tracking - A method and a system for motion tracking, capable of tracking a trajectory of a movable object by an architecture having at least three accelerometers arranged in a predefined structure. The trajectory, displacement and rotational angle of the movable object are determined by ways of extrapolation, numerical calibration and vector transformation according to the acceleration signals detected by the at least three accelerometers. | 03-03-2011 |
Chao-Ping Su, Hsinchu City TW
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20090100234 | Data Access System and Data Access Method - A data access system and a data access method achieving effects of power saving and access synchronization during data access are provided. The data access system includes a data processing unit, a bridge device and a memory device. The data processing unit sends an access request signal to initiate data access of at least one unit data. The access of unit data is completed within a plurality of clock cycles of a reference clock signal. The bridge device generates an access signal according to the access request signal, the reference clock signal and a leading time. A pulse of the access signal is determined by the leading time within the clock cycles. The memory device executes the access of the unit data according to the access signal. | 04-16-2009 |
Chia-Wei Su, Hsinchu City TW
Patent application number | Description | Published |
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20110102081 | AMPLIFIER CIRCUIT WITH OVERSHOOT SUPPRESSION - An amplifier circuit with overshoot suppress scheme including an input amplifier, an output amplifier, and a diode is provided. A first and a second input ends of the output amplifier are coupled to a differential output pair of the input amplifier. A first end of the diode is coupled to an output end of the output amplifier. A second end of the diode is coupled to the first input end of the output amplifier. When the voltage difference between the output and the input ends of the output amplifier is greater then the barrier voltage of the diode, the diode is turned on, so that the output end of the output amplifier is coupled to the input end of the output amplifier. In the transient state, it rapidly smoothes the overshoot signal. In the steady state, the diode is cut off to maintain the normal operation of the operational amplifier. | 05-05-2011 |
20110181353 | TWO-CHANNEL OPERATIONAL AMPLIFIER CIRCUIT - A two-channel operational amplifier circuit includes a first operational amplifier and a second operational amplifier. In a first frame period, the two-channel operational amplifier circuit switches a first input stage, a first gain stage and a first output stage to work between a working voltage and a half working voltage, and switches a second input stage, a second gain stage and a second output stage to work between the half working voltage and a ground voltage. In a second frame period, the two-channel operational amplifier circuit switches the second input stage and the second gain stage to work between the working voltage and the half working voltage, and switches the first input stage and the first gain stage to work between the half working voltage and the ground voltage. | 07-28-2011 |
20110187456 | Coupling Isolation Method and Operational Amplifier Using the Same - A coupling isolation method for preventing a load signal from coupling into an operational amplifier is disclosed. The coupling isolation method includes generating a system signal before the operational amplifier outputs a computation result, switching off a Miller compensation signal path of the operational amplifier at a first time point according to the system signal, and electrically connecting an output end of the operational amplifier and a load at a second time point according to the system signal to output the computation result. | 08-04-2011 |
20120119834 | AMPLIFIER CIRCUIT WITH OVERSHOOT SUPPRESSION - An amplifier circuit with overshoot suppress scheme including an input amplifier, an output amplifier, and a diode is provided. A first and a second input ends of the output amplifier are coupled to a differential output pair of the input amplifier. The diode is coupled between an output end and the first input end of the output amplifier. When the voltage difference between the output and the input ends of the output amplifier is greater then the barrier voltage of the diode, the diode is turned on, so that the output end of the output amplifier is coupled to the input end of the output amplifier. In the transient state, it rapidly smoothes the overshoot signal. In the steady state, the diode is cut off to maintain the normal operation of the operational amplifier. | 05-17-2012 |
20130136121 | METHOD OF TRANSPORTING DATA WITH EMBEDDED CLOCK - A method of transporting data with embedded clock including following steps is provided. In an initial stage, a first bit length and a second bit length are determined. Original data is received. The original data is packed with every N bits as a packet, where N is at least 4. It is analyzed whether a long-run length of long-run data with consecutive same bit data in the packet is greater than N/2. The packet is coded to embed clock/toggle information with the first bit length into the packet. The clock/toggle information determines whether the long-run data is toggled. An appearance frequency of the clock/toggle information is clock information. If the long-run length is not greater than N/2, the long-run data is not toggled. If the long-run length is greater than N/2, bit with the second bit length after an L | 05-30-2013 |
20130266030 | Device and Method for Transmitting and Receiving Data - A data transmission device includes a data division unit for receiving an original transmission data and dividing the original transmission data into a plurality of division data; a data generation unit for generating a plurality of packet data according to the plurality of division data and a plurality of clock data, wherein each of the clock data is a multi-bit data; and a data output unit for outputting the plurality of packet data to a data reception device; where each of the packet data includes a division data and a clock data, each of the packet data corresponds to a packet data period, and the division data corresponds to a division data period of the packet data period and the clock data corresponds to a clock period of the packet data period. | 10-10-2013 |
20140049524 | METHOD FOR DISPLAYING ERROR RATES OF DATA CHANNELS OF DISPLAY - A method for displaying error rates of data channels of a display is provided. A timing controller of the display repeatedly transmits a test signal with a specific format to a first and a second source drivers of the display via a first and a second data channels of the display. During testing, a first number and a second number of times of the first source driver and the second source driver determining that the received test signal does not have the specific format are counted respectively. The first and the second source drivers control displaying of a first area and a second area of a panel of the display respectively according to the counted first and second numbers of times. Accordingly, the error rates of the data channels are presented on the panel of the display in a way that the error rates could be recognized more easily. | 02-20-2014 |
20140071106 | SOURCE DRIVER AND METHOD FOR UPDATING A GAMMA CURVE - A source driver includes a first drive channel circuit, a voltage controller and a first programmable voltage buffer unit. The first drive channel circuit receives a first pixel data from the timing controller via a data bus, converts the first pixel data to a first drive voltage according to a first reference voltage group, and drives a display panel by the first drive voltage. The voltage controller receives a voltage command from the timing controller, generates and changes a first reference voltage configuration data according to the voltage command. The first programmable voltage buffer unit is coupled to the voltage controller and the first drive channel circuit, and receives the first reference voltage configuration data to generate and adjust the first reference voltage group for applying to the first drive channel circuit. Furthermore, a method for updating a new gamma curve by the source driver is also provided. | 03-13-2014 |
20140078133 | PANEL DISPLAY APPARATUS - A panel display apparatus is provided which includes a timing controller, a plurality of source drivers, a first data path, and a second data path. The first data path and the second data path are both coupled between the timing controller and the source drivers. The timing controller transmits multiple display data to the source drivers via the first data path. When the source drivers detect an event (e.g. error event), the source drivers transmit at least one event data (e.g. notification data) to the timing controller via the second data path to notify the timing controller that event correction (e.g. error correction) is needed. | 03-20-2014 |
20140111494 | Self-detection Charge Sharing Module - A self-detection charge sharing module for a liquid crystal display device is disclosed. The self-detection charge sharing module includes at least one detecting unit, for detecting a plurality of input voltages of a plurality of operational amplifiers driving a plurality of data line sand a plurality of output voltage of the plurality of data line, to generate at least one detecting result, and at least one charge sharing unit, for conducting connection between at least one first data line and at least one second data line among the plurality of data line when the at least one detecting result indicates at least one corresponding first input voltage and at least one corresponding second input voltage among the plurality of input voltage have opposite voltage variation direction and vary toward each other. The at least one first input voltage and the at least one second input voltage maintain respective polarities. | 04-24-2014 |
20140132575 | TIMING CONTROLLER, SOURCE DRIVER, DISPLAY DRIVING CIRCUIT, AND DISPLAY DRIVING METHOD - A timing controller is provided. The timing controller includes a timing control circuit, a first scrambler and a second scrambler. The timing control circuit provides first source driving data and second source driving data. The first scrambler scrambles the first source driving data according to a first random number to generate first scrambled data. The second scrambler scrambles the second driving source data according to a second random number to generate second scrambled data. The second random number is different from the first random number. | 05-15-2014 |
20140132587 | Integrated Source Driver and Liquid Crystal Display Device Using the Same - The present invention discloses an integrated source driver for a liquid crystal display device. The integrated source driver includes a reference voltage generating circuit, for providing a plurality of adjustable voltage ranges within a supply voltage and a ground level, and a reference voltage selecting circuit, including a plurality of digital to analog converters, for selecting and generating a plurality of internal reference voltages from the plurality of adjustable voltage ranges, respectively. The plurality of adjustable voltage ranges decrease progressively. | 05-15-2014 |
20140160104 | DISPLAY DRIVING METHOD AND ASSOCIATED DRIVING CIRCUIT FOR DISPLAY APPARATUS - A display driving method and an associated driving circuit are provided, where the display driving method includes: checking relationships between two voltage levels respectively represented by two continuously received digital codes received by a specific digital code input terminal and a first predetermined threshold, and preferably further checking a relationship between at least one voltage level represented by at least one digital code of the two continuously received digital codes and a first predetermined zone, in order to determine whether to pre-charge a specific set of display cells within a plurality of sets of display cells, the specific set corresponding to the specific digital code input terminal; when it is determined to pre-charge the specific set of display cells, temporarily conducting a pre-charging voltage generator to the specific set of display cells to pre-charge the specific set of display cells. | 06-12-2014 |
20140160183 | TIMING SCRAMBLING METHOD AND TIMING CONTROL CIRCUIT THEREOF - A timing scrambling method, for a timing control device corresponding to a plurality of source driving devices, includes adjusting a selecting signal according to a clock signal; selecting one of a plurality of scrambling generating units according to the selecting signal to generate a timing scrambling signal; and generating scrambling data for the plurality of source driving devices according to the timing scrambling signal. | 06-12-2014 |
20140176227 | DATA CONTROL CIRCUIT - A data control circuit includes an output stage circuit, a switch circuit, and an impedance module. The output stage circuit outputs a data signal. An input terminal of the switch circuit is coupled to an output terminal of the output stage circuit, and an output terminal of the switch circuit is coupled to a post-stage circuit. According to a control of a control signal, the switch circuit determines whether to transmit the data signal of the output stage circuit to the post-stage circuit. The impedance module is configured in the output stage circuit, configured between the output stage circuit and the switch circuit, or configured in the switch circuit. Here, the impedance module reduces noise flowing from the switch circuit to the output stage circuit. | 06-26-2014 |
20140294001 | METHOD OF TRANSPORTING DATA WITH EMBEDDED CLOCK - A method for transporting data with embedded information is provided. The method is adapted to a data transmission interface for coding an original data and then transporting thereof, including: packing the original data, wherein every N bits form a packet, and N is an integer of at least 4; analyzing whether or not existing a long-run length of long-run data with consecutive same bit data in the packet, wherein when the long-run length is greater than a predetermined length, bit data with a predetermined bit length after an L | 10-02-2014 |
20140320474 | DISPLAY DRIVER AND DISPLAY DIVING METHOD - A display driver, which comprises: a first predetermined voltage level providing apparatus, for providing a first predetermined voltage level group comprising at least one first predetermined voltage level; a first image data providing apparatus, for outputting a first image data; and a detection controlling circuit, for determining if an output terminal of the first image data providing apparatus is pre-charged to the first predetermined voltage level according to a relation between an absolute value of a voltage level of the first image data and an absolute value of the first predetermined voltage level. | 10-30-2014 |
20140368271 | AMPLIFIER CIRCUIT WITH OVERSHOOT SUPPRESSION - An amplifier circuit with overshoot suppress scheme including an input amplifier, an output amplifier, and a diode is provided. A first and a second input ends of the output amplifier are coupled to an output of the input amplifier. The diode is coupled between an output end and the first input end of the output amplifier. When the voltage difference between the output and the input ends of the output amplifier is greater then the barrier voltage of the diode, the diode is turned on, so that the output end of the output amplifier is coupled to the input end of the output amplifier. In the transient state, it rapidly smoothes the overshoot signal. In the steady state, the diode is cut off to maintain the normal operation of the operational amplifier. | 12-18-2014 |
20150042238 | DRIVING METHOD OF MULTI-COMMON ELECTRODES AND DISPLAY DEVICE - A driving method of multi-common electrodes and a display device are provided. The driving method includes following steps: providing a plurality of common voltages, in which the common voltages include a first common voltage and a second common voltage, and the first common voltage is different from the second common voltage. During a first period, the first common voltage is set to a first voltage level to drive a first common electrode of a first pixel region in the display panel, and the second common voltage is set to a third voltage level to drive a second common electrode of a second pixel region in the display panel. During a second period, the first common voltage is set to a second voltage level to drive the first common electrode, and the second common voltage is set to a fourth voltage level to drive the second common electrode. | 02-12-2015 |
20150070338 | DISPLAY DEVICE AND LIQUID CRYSTAL DISPLAY PANEL - A liquid crystal display panel and a display device are provided. The liquid crystal display includes a first common electrode, a second common electrode and pixels. The second common electrode and the first common electrode are electrically independent from each other. First pixels of the pixels are coupled to the first common electrode, and second pixels of the pixels are coupled to the second common electrode. Accordingly, usage or operation of the liquid crystal display panel is more flexible. | 03-12-2015 |
20150084947 | SOURCE DRIVER AND METHOD FOR DRIVING DISPLAY DEVICE - A source driver includes a first drive channel circuit, a voltage controller and a first programmable voltage buffer unit. The first drive channel circuit receives a first pixel data and a first reference voltage group, for driving the display device. The voltage controller receives a voltage command during a line data transmitting period, a horizontal blanking period or a vertical blanking period for generating a first reference voltage configuration data. The first programmable voltage buffer unit is coupled to the voltage controller and the first drive channel circuit, and receives the first reference voltage configuration data for applying the first reference voltage group to the first drive channel circuit. Furthermore, a method for driving a display device is also provided. | 03-26-2015 |
20150109027 | DATA CONTROL CIRCUIT - A data control circuit includes an output stage circuit, a switch circuit, and an impedance module. The output stage circuit outputs a data signal. An input terminal of the switch circuit is coupled to an output terminal of the output stage circuit, and an output terminal of the switch circuit is coupled to a post-stage circuit. According to a control of a control signal, the switch circuit determines whether to transmit the data signal of the output stage circuit to the post-stage circuit. The impedance module is configured in the output stage circuit, configured between the output stage circuit and the switch circuit, or configured in the switch circuit. Here, the impedance module reduces noise flowing from the switch circuit to the output stage circuit. | 04-23-2015 |
20150295544 | AMPLIFIER CIRCUIT WITH OVERSHOOT SUPPRESSION - An amplifier circuit with an overshoot suppress scheme is provided. The amplifier circuit includes an input amplifier, an output amplifier and a diode device. The output amplifier is coupled to the input amplifier and outputs an output voltage. The diode device is coupled between an output end and an input end of the output amplifier. When a voltage difference between the output end and the input end of the output amplifier is greater than a barrier voltage of the diode device, the diode device is turned on, and an overshoot of the output voltage is reduced. | 10-15-2015 |
20160050090 | METHOD OF TRANSPORTING DATA WITH EMBEDDED CLOCK - A method for transporting data to a display device includes: receiving image data having a first part data and a second part data; determining a coding information of a header according to a bit number of the image data with consecutively same bit value, wherein the coding information indicates whether the second part data in bits is to be inverted or not; coding the image data according to the coding information; and packing the header and the coded image data to a packet for transporting to the display device. | 02-18-2016 |
Chien-Hua Su, Hsinchu City TW
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20140361614 | MOBILE POWER BANK ASSEMBLY DEVICE - A mobile power bank assembly device includes a first unit and a second unit. The first unit includes a first casing, a first battery, a first functional circuit, and a first connector. The first battery is connected to the first functional circuit. The first battery and the first functional circuit are disposed inside the first casing. The first connector is exposed from the first casing and connected to the first functional circuit. The second unit includes a second casing, a second functional circuit and a second connector. The second connector is exposed from the second casing and connected to the second functional circuit. The first and second units can be plugged and connected with each other through a connection of the first and second connectors, thereby configuring the second functional circuit to receive electric power from the first battery and have a signal connection with the first functional circuit. | 12-11-2014 |
Chih-Heng Su, Hsinchu City TW
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20130162226 | Dynamic Voltage Adjustment Device and Power Transmission System Using the Same - The present invention discloses a dynamic voltage adjustment device for dynamically adjusting an output voltage of a power transmission system which generates the output voltage according to a feedback signal and a reference signal and transmits the output voltage to a remote load via a transmission line to generate a load current. The dynamic voltage adjustment device comprises a first signal terminal, for receiving a first signal corresponding to a forward transmission voltage drop of the transmission line; a second signal terminal, for receiving a second signal corresponding to a reverse transmission voltage drop of the transmission line; a third signal terminal for receiving a reference voltage; a feedback circuit, for generating a feedback signal according to the first signal; and a adder circuit, for generating the reference signal according to the second signal and the reference voltage. | 06-27-2013 |
20130187626 | Soft Switch Driving Circuit - A soft switch driving circuit is disclosed for a DC converter, to transform an input voltage into an output voltage. The soft switch driving circuit includes a regulating module for outputting a reference voltage, a first bootstrap circuit for generating a first voltage value according to a DC voltage, a second bootstrap circuit for generating a second voltage value according to the reference voltage, a control module for generating a plurality of control signals according to a control voltage, a switch module having one end coupled to the first bootstrap circuit and another end coupled to the second bootstrap circuit for outputting a voltage signal, and an output circuit connected to the control module and the switch module for transforming the input voltage into the output voltage according to the voltage signal and one of the plurality of controlling signals. | 07-25-2013 |
20130293203 | Current Balance Circuit and Multiphase DC-DC Converter and Current Balance Method Thereof - The present invention discloses a current balance circuit for a multiphase DC-DC converter. The current balance circuit comprises a current error calculation circuit, for generating a plurality of current balance signals indicating imbalance levels of a plurality of inductor currents of a plurality of channels of the multiphase DC-DC converter according to a plurality of current sensing signals of the plurality of channels, a time shift circuit, for adjusting pulse widths of a plurality of clock signals according to the plurality of current balance signals, and a ramp generator, for deciding shift levels of a plurality of ramp signals according to the plurality of clock signals. | 11-07-2013 |
20140163700 | CONTROL DEVICE, CONTROL METHOD AND RELATED POWER MANAGEMENT SYSTEM - A control device for controlling a power management system to enter an operating mode includes a power converting device, for providing input power for the control device; an operating mode control signal, for controlling the power management system to enter the operating mode, wherein the operating mode control signal is a first signal of the power management system; and an operating result displaying signal, for displaying at least one operating result in the operating mode, wherein the operating result displaying signal is a second signal of the power management system. | 06-12-2014 |
20160079775 | Charging Current Setting Method and Charging Module - A charging current setting method for a charging module includes detecting at least one voltage value of an input voltage signal in an input terminal of the charging module to calculate an input resistance; setting a lower limit voltage value according to the input resistance; controlling an input current to increase, so that the input voltage signal decreases in accordance with the increasing input current; controlling the input voltage signal to remain on the lower limit voltage value when the input voltage signal decreases to the lower limit voltage value, and recording a magnitude of the input current as an upper limit current value after the input current becomes stable; and determining a charging current value of the charging module according to the upper limit current value. | 03-17-2016 |
Chih-Hung Su, Hsinchu City TW
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20090093082 | ORGANIC LIGHT-EMITTING DIODE AND METHOD OF FABRICATING THE SAME - An organic light-emitting diode and method of fabricating the same. The organic light-emitting diode includes a first substrate, a first electrode installed on an inner surface of the first substrate, an organic light-emitting layer installed on the first electrode, a second electrode installed on the organic light-emitting layer, an oxide layer formed on the second electrode, and a second substrate bound to the inner surface of the first substrate to form an airtight space. | 04-09-2009 |
Chih-Pin Su, Hsinchu City TW
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20110314538 | Computing System Providing Normal Security and High Security Services - A computing system and method providing normal security services and high security services are disclosed. The computing system includes hardware resources, a processor core and an access right checker. The hardware resources are grouped into resource security levels. The processor, switching between a normal security and a high security state, assigns a user access right to a request. In comparison with the normal security state, user access right assigned in the high security state further allows the request to use the hardware resources of a higher resource security level. According to the assigned user access right and the resource security levels of required hardware resources of the request, the access right checker determines whether the request has the authority to use the hardware resources, and thereby, the access right checker executes the request or responds the issued request with an exception. | 12-22-2011 |
Chi-Hsi Su, Hsinchu City TW
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20090316839 | Apparatus and method for adaptively correcting I/Q imbalance - An apparatus and method for adaptively correcting I/Q imbalance, which is used in a receiver for correcting a received I/Q imbalanced signal to thus eliminate the I/Q imbalance. First, an interference amount caused by interference from an imbalanced in-phase signal to an imbalanced quadrature-phase signal is computed and accordingly subtracted from the quadrature-phase signal, so that a corrected quadrature-phase signal without phase imbalance is obtained. Next, a power of output in-phase signal, a power of output quadrature-phase signal, and a target are compared to thus determine an in-phase scaling factor and a quadrature-phase scaling factor. Finally, the imbalanced in-phase signal is multiplied by the in-phase scaling factor to thus obtain the output in-phase signal, and the corrected quadrature-phase signal is multiplied by the quadrature-phase scaling factor to thus obtain the output quadrature-phase signal. | 12-24-2009 |
20100235707 | Wireless receiver system and method with automatic gain control - A wireless receiver system with automatic gain control, which includes a receiving path, an analog to digital converter, an automatic gain control (AGC) device and a controller. The controller has an adjacent channel interference off mode, an adjacent channel interference acquisition mode and an adjacent channel interference tracking mode to accordingly set the AGC device for adjusting the gains of a plurality of modules of the receiving path. Namely, the strengths of different adjacent channel interferences are appropriately adjusted to thereby obtain the best received signal quality. | 09-16-2010 |
Ching-Hou Su, Hsinchu City TW
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20120235301 | SEMICONDUCTOR APPARATUS - A method of integrated circuit fabrication is provided, and more particularly fabrication of a semiconductor apparatus with a metallic alloy. An exemplary structure for a semiconductor apparatus comprises a first silicon substrate having a first contact comprising a silicide layer between the substrate and a first metal layer; a second silicon substrate having a second contact comprising a second metal layer; and a metallic alloy between the first metal layer of the first contact and the second metal layer of the second contact. | 09-20-2012 |
20120313246 | SEMICONDUCTOR APPARATUS - The disclosure relates to integrated circuit fabrication, and more particularly to a semiconductor apparatus with a metallic alloy. An exemplary structure for an apparatus comprises a first silicon substrate; a second silicon substrate; and a contact connecting each of the first and second substrates, wherein the contact comprises a Ge layer adjacent to the first silicon substrate, a Cu layer adjacent to the second silicon substrate, and a metallic alloy between the Ge layer and Cu layer. | 12-13-2012 |
20130086786 | BONDING ALIGNMENT TOOL AND METHOD - An apparatus is disclosed for detecting flag velocity during a eutectic process for bonding two wafers. The apparatus includes a plurality of sensors for detecting a time and/or velocity of a plurality of flags within a flag-out mechanism. The apparatus also includes one or more displays displaying time durations associated with the movement of the flags during the bonding process. Also disclosed is a method of aligning wafers in a eutectic bonding process. The method includes determining one or more time durations associated with the movement of the flags in the plurality of flags. The method also includes determining if a misalignment has occurred based on the one or more time durations associated with the movement of the flags. | 04-11-2013 |
20130130496 | SEMICONDUCTOR APPARATUS - A method for fabricating a semiconductor apparatus including providing a first silicon substrate having a first contact, wherein providing the first silicon substrate comprises forming a silicide layer between the first silicon substrate and a first metal layer. The method further includes providing a second silicon substrate having a second contact comprising a second metal layer and placing the first contact in contact with the second contact. The method further includes heating the first and second metal layers to form a metallic alloy, whereby the metallic alloy bonds the first contact to the second contact. | 05-23-2013 |
20130187245 | MICRO ELECTRO MECHANICAL SYSTEM STRUCTURES - A micro electro mechanical system (MEMS) structure includes a first substrate structure including a bonding pad structure. The bonding pad structure has at least one recess therein. A second substrate structure is bonded with the bonding pad structure of the first substrate structure. | 07-25-2013 |
20140209159 | SEMICONDUCTOR STRUCTURE AND FABRICATING PROCESS FOR THE SAME - A semiconductor structure and a fabricating process for the same are provided. The semiconductor structure includes a micro battery cell coupled to a solar cell by a semiconductor fabricating process. | 07-31-2014 |
20150340337 | BONDING ALIGNMENT TOOL - An apparatus includes a bonding system configured to bond at least two wafers. The bonding system has a flag-out mechanism configured to remove a plurality of flags from an area between the at least two wafers. The apparatus also includes sensors configured to detect data related to a flag-out condition of the flags of the plurality of flag. The apparatus further includes at least one processor configured to receive inputs from the sensors, to calculate at least one value related to flag-out timing, and to drive a display indicating an alignment of the at least two wafers. | 11-26-2015 |
20160126587 | Semiconductor Structures Having a Micro-Battery and Methods for Making the Same - The present disclosure provides an embodiment of an integrated structure that includes a first electrode of a first conductive material embedded in a first semiconductor substrate; a second electrode of a second conductive material embedded in a second semiconductor substrate; and a electrolyte disposed between the first and second electrodes. The first and second semiconductor substrates are bonded together through bonding pads such that the first and second electrodes are enclosed between the first and second semiconductor substrates. The second conductive material is different from the first conductive material. | 05-05-2016 |
Chin-Hsing Su, Hsinchu City TW
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20150177745 | GAS-SUPPLY SYSTEM AND METHOD - A gas-supply system includes a gas container filled with gas, a gas flow controller coupled to the gas container, and an operation device electrically connected to the gas flow controller. The gas-supply system further includes a buffer tank coupled to the gas flow controller and configured to receive the gas from the gas container via the gas flow controller. Furthermore, a pressure transducer disposed on the buffer tank and configured to generate a pressure signal to the operation device according to the pressure of the gas in the buffer tank. The operation device is configured to generate a control signal to the gas flow controller according the pressure signal, and the gas flow controller is configured to adjust the flow rate of the gas according to the control signal to keep the pressure of the gas in the buffer tank in a predetermined pressure range. | 06-25-2015 |
Chin-Jung Su, Hsinchu City TW
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20150228360 | MEMORY-TESTING DEVICE AND MEMORY-TESTING METHOD - A memory-testing device for testing a memory is provided. The memory-testing device includes a testing circuitry and a register. The testing circuitry is coupled to the memory for testing performance of the memory. The register is coupled to the testing circuitry and inputted by a testing clock signal, wherein the testing clock signal is different from an original clock signal of the memory and/or the testing circuitry. The testing clock signal is utilized for adjusting the time when the memory-testing device latches data from the memory to decrease a timing slack of the memory-testing device. | 08-13-2015 |
Chun-Hsien Su, Hsinchu City TW
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20090004620 | Surface treating device and surface treating method - A surface treating method for treating a tooth surface and a surface treating device thereof are provided. First, a working gas is filled into a tube. Next, a voltage is provided to the working gas for exciting the working gas into plasma. After that, the plasma is discharged through an opening of the tube for contacting the tooth surface. | 01-01-2009 |
20090064933 | FILM COATING SYSTEM AND ISOLATING DEVICE THEREOF - A film coating system for coating an object includes a working station and an isolating device. The object is disposed on the working station, and the isolating device is utilized to isolate the object. The isolating device includes a body generating a first power, a first working fluid, a second working fluid, a first guiding portion and a second guiding portion. The first guiding portion guides the first working fluid to pass through the body, thereby forming a first working region to coat the object thereon. The second guiding portion guides the second working fluid excited by the first power of the body to pass through the body, thereby forming a second working region to separate the first working region from the object. | 03-12-2009 |
20100098600 | PLASMA SYSTEM - A plasma system for generating a plasma is generated. The plasma system includes a tube, a positive electrode and a negative electrode. The tube has a plasma jet opening, a first end surface and a second end surface. The plasma jet opening penetrates the wall of the tube. The plasma passes through the plasma jet opening and is emitted to the outside of the tube. The positive electrode has a side surface facing and adjacent to the tube. The negative electrode is separated from the positive electrode by a first predetermined distance. The negative electrode has a negative electrode side surface facing and adjacent to the tube. The first positive electrode and the first negative electrode are disposed between the first end surface and the second end surface, and a portion of the plasma jet opening is disposed between the positive electrode and the negative electrode. | 04-22-2010 |
20110100556 | Plasma System with Injection Device - A plasma system with an injection device is provided. The plasma system comprises a plasma cavity and an injection device. The plasma cavity comprises a first electrode and a second for generating plasma. The injection device comprises a plasma injection tube and at least a reactant injection tube. The plasma injection tube is connected to the plasma cavity. The plasma injection tube comprises an inlet, an outlet and an outer sidewall. The plasma injection tube injects the plasma from the inlet and guides the plasma out through the outlet. The outer sidewall has a width decreasing from the inlet to the outlet. The reactant injection tube is disposed outside of the outer sidewall. The reactant injection tube injects a reactant to the outer sidewall so that the reactant flows along the outer sidewall toward the outlet and mixes with the plasma at the outlet. | 05-05-2011 |
20130167920 | CONDUCTIVE SUBSTRATE AND FABRICATING METHOD THEREOF, AND SOLAR CELL - A fabricating method of a conductive substrate including the following steps is provided. A substrate is provided. A barrier layer having a first roughened surface is formed on the substrate by an atmospheric pressure plasma process, wherein the surface roughness (Ra) of the first roughened surface formed by the atmospheric pressure plasma process is between 10 nanometers (nm) and 100 nm. A first electrode layer is formed on the first roughened surface of the barrier layer by a vacuum sputter process, wherein a second roughened surface with the surface roughness (Ra) between 10 nm and 100 nm is formed on a surface of the first electrode layer. Furthermore, a photoelectric conversion layer is formed on the second roughened surface of the first electrode layer. A second electrode layer is formed on the photoelectric conversion layer. A solar cell and a conductive substrate are also provided. | 07-04-2013 |
20140102616 | METHOD OF DIE BONDING AND APPARATUS THEREOF - A method of die bonding, the method has steps of: heating a substrate to a predetermined temperature; sucking at least one die, the at least one die with a base temperature, the base temperature being less than the predetermined temperature; the at least one die bonding on the substrate; cooling the substrate with the bonded die; and moving the substrate with the bonded die to a loading and unloading position, heating another substrate to a predetermined temperature, and repeating the said steps. | 04-17-2014 |
Han-Tang Su, Hsinchu City TW
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20140126031 | Method for Fabricating a Self-Aligned Vertical Comb Drive Structure - In a method for fabricating a self-aligned vertical comb drive structure, a multi-layer structure is first formed. The multi-layer structure includes inter-digitated first and second comb structures formed via etching using a first mask layer as a mask. The first comb structure includes a plurality of first comb fingers, each having a first finger portion formed in a first device layer and a second finger portion formed in a second device layer and separated from the first finger portion by a self-aligned pattern on a stop layer. The second comb structure includes a plurality of second comb fingers formed solely in the second device layer. The second finger portions of the first comb fingers are subsequently removed. | 05-08-2014 |
Hsuan-Yi Su, Hsinchu City TW
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20150188494 | Active mixer and active mixing method - The present disclosure discloses an active mixer capable of improving linearity while giving consideration to both gain and noise reduction, including: a voltage-to-current converting circuit operable to generate a conversion signal according to an input signal; a switching circuit operable to carry out a switching action according to a clock signal and thereby electrically connect the voltage-to-current converting circuit with a load circuit; the load circuit operable to provide an output signal for a first and a second output nodes according to the conversion signal through the switching action; a first supplement current source, coupled to a first node between the switching circuit and the first output node, operable to supply a first supplemental current to the switching circuit; and a second supplement current source, coupled to a second node between the switching circuit and the second output node, operable to supply a second supplemental current to the switching circuit. | 07-02-2015 |
20150214936 | Negative resistance generator, load including negative resistance and load of amplifier - A negative resistance generator is disclosed herein. The negative resistance generator includes a first signal end for receiving a first signal which includes first AC/DC components, a second signal end for receiving a second signal which includes second AC/DC components, first and second transistors, a power source circuit, a first and a second DC level setting circuits. The power source circuit is coupled to the first and second transistors. The first DC level setting circuit provides a second gate voltage for a second gate of the second transistor according to a first DC voltage and the first AC component. The second DC level setting circuit provides a first gate voltage for a first gate of the first transistor according to a second DC voltage and the second AC component. The second gate voltage and first gate voltage are lower than the voltages of the first and the second signal respectively. | 07-30-2015 |
20160119974 | FRONT-END CIRCUIT FOR WIRELESS COMMUNICATION SYSTEM AND WIRELESS COMMUNICATION SYSTEM THEREOF - A front-end circuit for a wireless communication system includes a first amplifier, a second amplifier and an antenna switch. The first amplifier is disposed at a receiving path, wherein the first amplifier has an input terminal and an output terminal, and the input terminal of the first amplifier is coupled to a first pad. The second amplifier is disposed at a transmission path, wherein the second amplifier has an input terminal and an output terminal, and the output terminal of the second amplifier is coupled to a second pad different from the first pad. The antenna switch is coupled between the input terminal of the first amplifier and the output terminal of the second amplifier. | 04-28-2016 |
Huan-Ping Su, Hsinchu City TW
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20100272261 | Data Security Transmission Wirelessly with Zigbee Chips - A wireless network system for data transmitting securely is disclosed. The system comprises a central control end for generating a cipher password per predetermined time unit. The central control end has a first Zigbee chip, a computer terminal for a user to input parameters, and a cryptographic algorithm program provided wherein the cryptographic algorithm program and the parameters are provided for password encryption using the cryptographic algorithm program is run by a microprocessor of the first Zigbee chip. The system also comprises a data transmitting end and a several data receiving ends. The data transmitting end using the Zigbee decrypts the cipher password and encrypts the data file using the plain password and the Zigbee chip. The data receiving ends using the Zigbee decrypt the cipher password and decrypt the cipher data file into plain data file by the WiFi chips using plain password. | 10-28-2010 |
Hung-Ju Su, Hsinchu City TW
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20090110598 | FULLY AUTOMATED MICROARRAY PROCESSING SYSTEM - An automated microarray processing system includes a microarray housing assembly module, an incubation module, a washing module and at least one automated transport module. With the automated transport module being mechanically moved among the microarray housing assembly module, the incubation module and the washing module, biochemical reaction of a reaction region of a microarray and a biological sample solution disposed therebetween is automatically performed, and the reacted microarray is automatically cleaned when the biochemical reaction of the microarray is completed. | 04-30-2009 |
Hung-Pin Su, Hsinchu City TW
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20090174927 | Method and Apparatus for Manufacturing Electrophoretic Displays - A method for manufacturing an electrophoretic display includes the steps of: providing a substrate; forming a flexible plate on the substrate; forming an electrophoretic layer on the flexible plate; forming a transparent protection layer on the electrophoretic layer; forming an edge protection member between the flexible plate and the transparent protection member, the edge protection member surrounding the electrophoretic layer; and providing a laser beam to irradiate the flexible plate from a side of the substrate facing away from flexible plate, so as to release the substrate from the flexible plate. | 07-09-2009 |
20090230280 | Carrier and Method for Manufacturing Flexible Display Panel - A carrier applicable to a laser releasing process and for carrying at least a flexible display panel is provided. The flexible display panel is formed on a transparent substrate and includes a display main body and a driving circuit module connected to an edge of the display main body. The carrier includes a carrying plate having at least a carrying area for carrying the flexible display panel and a protecting cover disposed on the carrying plate and located at an edge of the carrying area. A receiving space is formed between the protecting cover and the carrying plate for receiving the driving circuit module. The protecting cover is for shielding the driving circuit module to prevent the driving circuit module from being irradiated by a laser beam in the laser releasing process. A method for manufacturing flexible display panel also is provided. | 09-17-2009 |
I-Feng Su, Hsinchu City TW
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20140269309 | METHOD OF MANAGING COMMUNICATION TRAFFIC FOR MULTIPLE COMMUNICATION TECHNOLOGIES AND COMMUNICATION DEVICE THEREOF - A method and a communication device for managing communication traffic for multiple communication technologies are provide. The method, performed by a communication device to manage communications with a first and a second network having a first and a second communication technology, respectively, includes: determining, by a second communication module, whether a first transmission of the first communication technology is in progress before proceeding with a second transmission having the second communication technology; when the first transmission is in progress, initiating, by a second communication module, an unavailable period of the first communication technology; initiating, by a second communication module, notification of the unavailability of the first communication technology to the first network; and proceeding, by the second communication module, with the second transmission. | 09-18-2014 |
20150071259 | Scheduling method and electronic device using the same - A scheduling method for an electronic device is disclosed. The electronic device comprises a first wireless module and a second wireless module for transmitting and receiving wireless signals of a first wireless communication system and a second wireless communication system respectively. The scheduling method comprises determining an arrival timing of specific frame periodically transmitted by a base station of the first wireless communication system; determining an interval covering the arrival timings of the specific frame; disabling the second wireless module during the interval for facilitating the first wireless module to hunt the specific frame; and enabling the second wireless module when the interval expires. | 03-12-2015 |
20150237505 | Coexistence Operation Method And Related Wireless System - The present invention provides a coexistence operation method for a wireless system, wherein the wireless system is capable of establishing a first wireless link and a plurality of second wireless link. The coexistence operation method comprises applying different time slots to the first wireless link and a first link of the second wireless links; and applying a different frequency band to a second link of the second wireless links when is the different time slots are applied to the first wireless link and the first link of the second wireless links. | 08-20-2015 |
Jin-Chern Su, Hsinchu City TW
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20100100721 | METHOD AND SYSTEM OF SECURED DATA STORAGE AND RECOVERY - A method and a system of secured data storage and recovery are provided. First, a secured key and an encrypted user password of a storage device are obtained by using a controller of a storage device. Then, the secured key is encrypted by using the encrypted user password to generate a first private key, the encrypted user password is encrypted by using the secured key to generate a second private key, and data to be stored is encrypted by using the secured key. Finally, the encrypted data, the first private key, and the second private key are transmitted to a remote device for storage through a host. Thereby, the security of data storage is enhanced and data recovery mechanism is provided when the storage device is damaged or lost. | 04-22-2010 |
Kai-Shu Su, Hsinchu City TW
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20130038349 | TIME-TO DIGITAL CONVERTER AND DIGITAL-CONTROLLED CLOCK GENERATOR AND ALL-DIGITAL CLOCK GENERATOR - An all-digital clock generator includes a digitally-controlled clock generator and a processing unit. The digitally-controlled clock generator generates a clock signal in response to an enable signal and a digital signal. The processing unit has a frequency multiplier and a reference signal having a period, digitizes the period to generate a quantized signal, generates the digital signal according to the quantized signal and the frequency multiplier, and generates the enable signal according to the reference signal, the clock signal and the frequency multiplier. | 02-14-2013 |
Ke-Ming Su, Hsinchu City TW
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20120105047 | PROGRAMMABLE LOW DROPOUT LINEAR REGULATOR - The present invention provides a programmable low dropout linear regulator using a reference voltage to convert an input voltage into a regulated voltage according to a control signal. The programmable low dropout linear regulator includes an operational amplifier having a negative input coupled to receive the reference voltage, a first transistor having a gate coupled to an output terminal of the operational amplifier and a first source/drain coupled to an output terminal of the regulated voltage, a first impedance coupled between a positive input of the operational amplifier and the output terminal of the regulated voltage, and a second impedance coupled between the positive input of the operational amplifier and a ground. The second impedance includes a second transistor having a gate coupled to receive the control signal. | 05-03-2012 |
Keng-Li Su, Hsinchu City TW
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20090141574 | Memory accessing circuit and method - The present invention relates to a memory accessing circuit, which is for accessing a memory circuit with 2 | 06-04-2009 |
20100118617 | MEMORIES WITH IMPROVED WRITE CURRENT - A memory with improved write current is provided, including a bit line, a write switch and a control circuit. The write switch is coupled between a voltage source and the bit line, and has a control terminal. Based on a bit line select signal, the control circuit controls the electric conductance of the write switch and discharges/charges the parasitic capacitors of the write switch. The voltage source is turned on after the control terminal of the write switch reaches a pre-determined voltage level. | 05-13-2010 |
20100153043 | MONITORING METHOD FOR THROUGH-SILICON VIAS OF THREE-DIMENSIONAL INTERGRATED CIRCUIT (3D IC) AND APPARATUS USING THE SAME - A monitoring method for Through-Silicon Vias (TSVs) of a three-dimensional integrated circuit (3D IC) is provided, wherein the 3D IC includes a plurality of TSVs, and the method includes: providing a plurality of inverters; connecting the inverters with the TSVs as a circuit; enabling the circuit to oscillate; measuring an output signal on an output end of one of the inverters; and determining the characteristic of TSVs of the 3D IC based on the output signal. | 06-17-2010 |
20100237386 | ELECTROSTATIC DISCHARGE STRUCTURE FOR 3-DIMENSIONAL INTEGRATED CIRCUIT THROUGH-SILICON VIA DEVICE - An electrostatic discharge (ESD) structure for a 3-dimensional (3D) integrated circuit (IC) through-silicon via (TSV) device is provided. The ESD structure includes a substrate, a TSV device which is formed through the substrate and is equivalent to a resistance-inductance-capacitance (RLC) device, and at least one ESD device which is disposed in the substrate and electrically connected to one end of the TSV device. The ESD structure can protect the 3D IC TSV device. | 09-23-2010 |
20120018723 | STRUCTURE AND METHOD FOR TESTING THROUGH-SILICON VIA (TSV) - A test structure including at least one ground pad, an input pad, at least one first through-silicon via (TSV), at least one second TSV and an output pad is disclosed. The ground pad receives a ground signal during a test mode. The input pad receives a test signal during the test mode. The first TSV is coupled to the input pad. The output pad is coupled to the second TSV. No connection line occurs between the first and the second TSVs. During the test mode, a test result is obtained according to the signal of at least one of the first and the second TSVs, and structural characteristics can be obtained according to the test result. | 01-26-2012 |
20120139092 | MULTI-CHIP STACK STRUCTURE - A multi-chip stack structure including a first chip, a second chip, a shielding layer, and a plurality of conductive bumps is provided. The second chip is stacked on the first chip. The second chip has a plurality of through silicon via (TSV) structures to conduct a reference voltage. The shielding layer and the plurality of conductive bumps are disposed between the first chip and the second chip, and are electrically connected to the plurality of TSV structures. The shielding layer can isolate noises and improve signal coupling between two adjacent chips. | 06-07-2012 |
20120249178 | MONITORING METHOD FOR THREE-DIMENSIONAL INTERGRATED CIRCUIT (3D IC) AND APPARATUS USING THE SAME - A monitoring method of a three-dimensional integrated circuit (3D IC) is provided, wherein the method includes: providing a plurality of TSVs, providing a plurality of inverters; connecting the inverters with the plurality of TSVs as a circuit loop; enabling the circuit loop to oscillate; measuring an output signal on an output end of one of the plurality of inverters; and determining the manufacturing state of the plurality of TSVs of the 3D IC based on the output signal and apparatus using the same. | 10-04-2012 |
Ko Ching Su, Hsinchu City TW
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20080225034 | Image sticking erasing circuit and method for using the same - The image sticking erasing circuit includes a detection circuit and a switching circuit connected to the detection circuit. The detection circuit is for use in detecting a first voltage signal, which closely follows the variation of the voltage source, and a reference voltage, which loosely follows the variation of the voltage source. When the detection circuit determines that the first voltage signal is lower than a first threshold value, the switching circuit switches the gate of a driving transistor to a second voltage signal, which loosely follows the voltage source. When the detection circuit determines that the reference voltage signal is lower than a second threshold value, the switching circuit switches the gate of a driving transistor to a low voltage state. | 09-18-2008 |
20140062435 | CHARGING CONTROL CIRCUIT - The present invention discloses a charge control circuit for supplying power from an external power source to a first common node and charging a second common node from the first common node. A regulator circuit is coupled between the external power source and the first common node, and a transistor is coupled between the first common node and the second common node. The present invention detects an operation parameter of the transistor and controls an internal voltage source to generate a non-predetermined voltage difference accordingly. When the sum of the voltage at the second common node and the non-predetermined voltage is equal to or higher than the reference voltage, the voltage at the first common node is regulated to a level higher than the voltage at the second common node, and the transistor is in an optimum conductive state. | 03-06-2014 |
Kuan-Cheng Su, Hsinchu City TW
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20080270056 | WAFER-LEVEL RELIABILITY YIELD ENHANCEMENT SYSTEM AND RELATED METHOD - A yield enhancement system has a fabrication line with semiconductor fabrication devices for fabricating a wafer, an inspection and measurement monitoring system coupled to the fabrication line for determining process data corresponding to semiconductor fabrication devices, and a post-process testing line coupled to the fabrication line for performing in-line wafer-level testing. The post-process testing line includes a wafer acceptance tester, a yield monitor coupled to the wafer acceptance tester, and a wafer level reliability tester coupled to the wafer acceptance tester for estimating a life span of a device on the wafer. | 10-30-2008 |
20090027074 | Test structure and test method - The present invention discloses a wafer level test structure and a test method; in which, a heating plate is formed on the wafer for heating a structure to be tested positioned above or adjacent to the heating plate. The heating plate produces heat by electrically connecting to a current. Thus, the heat provided by the heating plate and the electric input/output into/from the structure to be tested are controlled separately and not influenced each other. | 01-29-2009 |
20090058455 | Test structure and test method - The present invention discloses a wafer level test structure and a test method; in which, a heating plate is formed on the wafer for heating a structure to be tested positioned above or adjacent to the heating plate. The heating plate produces heat by electrically connecting to a current. Thus, the heat provided by the heating plate and the electric input/output into/from the structure to be tested are controlled separately and not influenced each other. | 03-05-2009 |
20090278170 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A method for manufacturing a semiconductor device includes providing a substrate having at least a gate structure formed thereon, forming LDDs in the substrate respectively at two side of the gate structure and a spacer at sidewalls of the gate structure, forming a source/drain in the substrate at two side of the gate structure, performing ant etching process to form recesses respectively in the source/drain, forming a barrier layer in the recesses; and performing a salicide process. | 11-12-2009 |
20120166130 | METHOD FOR EVALUATING FAILURE RATE - A method for evaluating failure rate, which is applied to a plurality of semiconductor chips with error checking and correcting function includes the following steps. A first read-write test operation is applied to the semiconductor chips, thereby obtaining a plurality of first failure bit counting values. The error checking and correcting function of each of the semiconductor chips is off. An aging test is applied to the semiconductor chips. A second read-write test operation as the first read-write test operation is applied to the semiconductor chips, thereby obtaining a plurality of second failure bit counting values. The number of the semiconductor chips, the first failure bit counting values, the second failure bit counting values and an error checking and correcting coefficient are calculated to obtain a failure rate of the semiconductor chips. | 06-28-2012 |
20120170160 | ESD protection circuit and ESD protection device thereof - The ESD protection circuit is electrically connected between a first power rail and a second power rail, and includes an ESD protection device, a switching device electrically connected between the ESD protection device and a first power rail, and a low-pass filter electrically connected between the first power rail and the first switching device. The ESD protection device includes a BJT and a first resistor electrically connected between a base of the BJT and a first power rail. When no ESD event occurs, a potential of the base is larger than or equal to a potential of an emitter of the BJT. When the ESD event occurs, the potential of the base is smaller than the potential of the emitter. | 07-05-2012 |
20130250462 | ESD protection circuit and ESD protection device thereof - The ESD protection circuit is electrically connected between a first power rail and a second power rail, and includes an ESD protection device, a switching device electrically connected between the ESD protection device and a first power rail, and a low-pass filter electrically connected between the first power rail and the first switching device. The ESD protection device includes a BJT and a first resistor electrically connected between a base of the BJT and a first power rail. When no ESD event occurs, a potential of the base is larger than or equal to a potential of an emitter of the BJT. When the ESD event occurs, the potential of the base is smaller than the potential of the emitter. | 09-26-2013 |
Kuan-Hua Su, Hsinchu City TW
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20100003403 | PHOTORESIST COATING PROCESS - A photoresist coating process including a first step and a second step is provided. In the first step, a wafer is accelerated by a first average acceleration. In the second step, the wafer is accelerated by a second average acceleration. The first acceleration and the second acceleration are both larger than zero, and photoresist material is provided to the wafer only in the second step. | 01-07-2010 |
Mei-Ju Su, Hsinchu City TW
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20120161960 | BODY FLUID ABSORPTION OBJECT WETTING ALARM METHOD AND APPARATUS - A body fluid absorption object wetting alarm method and an apparatus associated are revealed. A light wavelength sensor is disposed on a body fluid absorption unit for detecting wavelength of the body fluid absorption unit. After the body fluid absorption unit becoming wet, the wavelength thereof changes. Then warning signals are sent to the receiving and checking unit. Thus, a caregiver at a management end of the receiving and checking unit knows that the body fluid absorption object worn by a care recipient was already wet and there is a need to replace the wet body fluid absorption unit with a new one immediately. | 06-28-2012 |
Ming-Gunn Su, Hsinchu City TW
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20090005193 | WEIGHTED PART OF GOLF CLUB HEAD - A weighted part of a golf club head is provided. The compositions of the weighted part by weight percent are 12% to 15% iron, 11% to 13% chromium, 25% to 30% tungsten, and some nickel. The alloy for the weighted part has the advantages of being heavier than stainless steel and titanium alloys in weight, enjoying higher tensile strength, providing higher plastic deformation for the weighted part, and forming more complicated trademarks or patterns directly at specific locations during weighted part formation. In addition, the mechanical properties of the weighted part of a golf club head can be improved by adding ingredients including carbon below 0.01%, 0.1% to 0.6% silicon, manganese below 0.01%, phosphorus below 0.01%, sulphur below 0.01%, and copper below 0.01%. | 01-01-2009 |
Pei-Ju Su, Hsinchu City TW
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20100309541 | DUAL DISPLAY - A dual display is disclosed, including a first electrowetting display device and a second electrowetting display device, and a reflection transmission switching device therebetween, wherein the first electrowetting display device and the second electrowetting display device have a function of displaying images and can be switched to a transmissive mode. The invention further provides a dual display, comprising a first substrate, a second substrate opposite the first substrate, a first patterned electrode and a second patterned electrode disposed on the first substrate, a reflective layer disposed on the first patterned electrode, a first patterned hydrophobic layer over the first patterned electrode, a second patterned hydrophobic layer over the second patterned electrode, a wall defining a pixel of the dual display, a first non-polar liquid disposed on the first patterned hydrophobic layer, and a second non-polar liquid disposed on the second patterned hydrophobic layer. | 12-09-2010 |
20110286073 | DUAL DISPLAY - A dual display is disclosed, including a first substrate and a second substrate comprising a plurality of pixels, wherein each pixel comprises a plurality of subpixels. The first substrate comprises a reflective region and a transmissive region for each subpixel, and a first color fluid is movable by an electric field on the reflective region and the transmissive region of a first subpixel, wherein when the first color fluid covers the transmissive region, the dual display provides a first viewing side at the first substrate side under a transmissive mode, and when the first color fluid covers the reflective region or covers the reflective region and the transmissive region, the dual display provides a second viewing side at the second substrate side under a reflective mode. | 11-24-2011 |
20120146984 | ELECTROFLUIDIC DEVICE AND OPERATION METHOD THEREOF - An electrofluidic device includes first structural layer and second structural layer. First structural layer includes first substrate; and first electrode and second electrode on the first substrate. The second electrode has an indent region surrounding and without contacting first electrode. First hydrophobic layer is at least over the second electrode. Second structural layer at one side of the first structural layer with a gap includes second substrate and groove structure layer. The groove structure layer includes an indent groove, corresponding to the indent region of the second electrode. Second hydrophobic layer is over the groove structure layer. Polar fluid is disposed in the indent groove and remains in contact with the first electrode. Non-polar fluid is disposed in the gap between the first and second structural layers. | 06-14-2012 |
20140242318 | SUBSTRATE STRUCTURES APPLIED IN FLEXIBLE DEVICES - A substrate structure applied in flexible devices is provided. The substrate structure includes a carrier; a release layer with a first area formed on the carrier, which has a first adhesion force to the carrier; and a flexible substrate with a second area overlying part of the first area of the release layer and contacting the carrier, which has a second adhesion force to the release layer and a third adhesion force to the carrier, wherein the first area is larger than or equal to the second area, the third adhesion force is greater than the first adhesion force, and the first adhesion force is greater than the second adhesion force. | 08-28-2014 |
Peter Su, Hsinchu City TW
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20130037067 | SHAFT STRUCTURE OF AUTOMATIC UMBRELLA - The present invention provides a structure of shaft of automatic umbrella, which includes a shaft assembly including a second section having a top end fixed to an internal plug. An inner tube is fixed at a top end thereof to the internal plug and receives therein an operation tube having a bottom coupled to an operation plug. The inner tube receives in a top portion thereof a pulley around which an operation cable wraps. An end of the operation cable is fixed to the bullet-like member and an opposite end fixed to the operation plug. To open the umbrella, a push button is depressed and an expansion spring pushes upward the second section so that the runner cable and the operation cable drive the runner and a third shaft section upward to completely open the umbrella. | 02-14-2013 |
Pi-Guey Su, Hsinchu City TW
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20100288637 | Gas Sensor and Manufacturing Method Thereof - A gas sensor and manufacturing method thereof. The gas sensor includes a substrate, a pair of electrodes disposed on the substrate, and a gas sensing thin film covering the electrodes, the gas sensing thin film is made up of carbon nanotubes and tin oxide. | 11-18-2010 |
20100310792 | Gas Sensor and Manufacturing Method Thereof - A gas sensor and manufacturing method thereof. The gas sensor includes a substrate, a pair of electrodes disposed on the substrate, and a gas sensing thin film covering the electrodes, the gas sensing thin film is made up of carbon nanotubes and tin oxide. | 12-09-2010 |
Shu-Hsuan Su, Hsinchu City TW
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20090278168 | STRUCTURE OF SILICON CONTROLLED RECTIFIER - A silicon controlled rectifier structure is provided in a substrate having a first conductive type. A well region formed within the substrate has a second conductive type. A first dopant region formed within the substrate and the well region has the first conductive type. A second dopant region formed within the substrate and a portion of the well region has the second conductive type. A third dopant region formed under the second dopant region has the first conductive type, in which the second and the third regions form a vertical Zener diode. A fourth dopant region formed within the substrate and separated from the second dopant region by a separation structure has the second conductive type. A fifth dopant region is formed within the substrate in a manner that the fourth dopant region is between the isolation structure and the fifth dopant region, and has the first conductive type. | 11-12-2009 |
Ting-Han Su, Hsinchu City TW
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20160077986 | ELECTRONIC APPARATUS PROVIDING REAL-TIME SWITCHING AND SHARING OF USB ELECTRONIC DEVICES AMONG HOSTS - The present disclosure provides an electronic apparatus that comprises a number of Universal Serial Bus (USB) device control modules, a microprocessor, a priority arbitration module, a USB host control module and a USB hub module. The USB device control modules are configured to receive from and send to a host a USB electric signal. The microprocessor is configured to generate a number of virtual USB hub modules in a memory. Each of the virtual USB hub modules is configured to generate a USB device enumeration signal, in response to an electric connection status between a USB electronic device and the USB hub module, and to send the USB device enumeration signal via a corresponding one of the USB device control modules to the host. The priority arbitration module is configured to, in response to the availability of the USB electronic device, transmit the USB electric signal issued from the host to the USB electronic device via the USB host control module and the USB hub module. | 03-17-2016 |
Tsai-Tien Su, Hsinchu City TW
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20100069678 | HYDROFORMYLATION PROCESS - The disclosed is about a hydroformylation of a cyclic olefin with rhodium catalyst, and specifically about the recovering of the rhodium catalyst. Aldehyde and the cyclic olefin are added into a rhodium catalyst solution to process a hydroformylation, thereby forming the product cycloalkyl aldehyde. Afterwards, the result is divided into two layers. The upper layer is substantially rhodium catalyst solution, and the lower layer is substantially cycloalkyl aldehyde and the aldehyde. After separation, the upper layer is reserved to process next hydroformylation reaction with newly added cyclic olefin. | 03-18-2010 |
Tzung Min Su, Hsinchu City TW
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20120098795 | OPTICAL TOUCH SCREEN SYSTEM AND SENSING METHOD FOR THE SAME - An optical touch screen system includes a touch screen, an image-sensing device, and a processing device. The image-sensing device generates a plurality of light-shielding information of an object at a plurality of time points. The processing device coupled to the image-sensing device includes a computing unit calculating a projected size difference value according to the plurality of light-shielding information, wherein the projected size difference value is a difference value between the projected sizes of the object on the touch screen at two different time points. | 04-26-2012 |
20120327035 | OPTICAL TOUCH SYSTEM AND IMAGE PROCESSING METHOD THEREOF - An optical touch system includes an image sensor module and a processor. The image sensor module includes a plurality of image sensing elements that can be independently controlled to achieve different exposure times. The plurality of image sensor elements can produce a picture including a plurality of pixel groups. The processor is configured to extract an intensity value of each pixel group and to select a set of successive pixel groups as an object image according to the intensity values of the pixel groups. | 12-27-2012 |
20120327037 | OPTICAL TOUCH SYSTEM AND CALCULATION METHOD THEREOF - A method of calculating the coordinate data of an object includes the steps of: providing a mirror surface for generating a reflection of an object; providing an image sensor for capturing an image of the object and an image of the reflection; obtaining an individual image of the object when the image of the object and the image of the reflection overlap to form an overlapped image; and calculating the coordinate data of the object based on the overlapped image and the individual image. | 12-27-2012 |
20130033456 | OPTICAL TOUCH SYSTEM AND ELECTRONIC APPARATUS INCLUDING THE SAME - An optical touch system includes a touch surface having a first touch region and a second touch region, a reflective member for generating a reflection of an object on the touch surface, an image sensor for providing an image of the object and an image of the reflection, and a processing unit. The image sensor is represented by either first reference coordinate data or second reference coordinate data. The processing unit is configured to compute the coordinate data of the object using the first reference coordinate data, the image of the object, and the image of the reflection to when the object is in the first touch region, and configured to compute the coordinate data of the object using the second reference coordinate data, the image of the object, and the image of the reflection when the object is in the second touch region. | 02-07-2013 |
20130033457 | IMAGE SENSOR AND OPTICAL TOUCH SYSTEM INCLUDING THE SAME - An image sensor includes a plurality of light detecting elements. The plurality of light detecting elements are arranged in a plurality of rows and a plurality of columns, wherein a flat field picture generated by the image sensor, the intensity standard deviation of pixels in each pixel column is greater than that of pixels in any pixel row, or the intensity standard deviation of pixels in each pixel row is greater than that of pixels of any pixel column. | 02-07-2013 |
20130063402 | OPTICAL TOUCH SYSTEM - An optical touch system includes an image sensor for detecting at least one object and a processor coupled to the image sensor. The processor is configured to determine the number of pixel clusters created by the at least one object on an image generated from the image sensor and to generate gesture information when the number of pixel clusters is greater than a predetermined pixel cluster number. | 03-14-2013 |
20130106785 | OPTICAL TOUCH SYSTEM | 05-02-2013 |
20130271369 | ELECTRONIC SYSTEM - An electronic system includes a device having a screen and an optical touch device. The optical touch device monitors the activity of an object on the screen of the device. When the object performs an operation in a first region of the screen, the optical touch device generates first data; and when the object performs an operation outside the first region, the optical touch device generates second data, wherein the first data and the second data are of different data types. | 10-17-2013 |
20130271429 | TOUCH-CONTROL SYSTEM - A touch-control system adapted to be used with a plurality of pointers is provided. The touch-control system includes a touch-control panel, a first pointer sensing module, a second pointer sensing module and a processing circuit. The first pointer sensing module is configured to sense a first set of image information of the pointers and accordingly calculate a first candidate coordinate group of the pointers. The second pointer sensing module is configured to sense a second set of image information of the pointers. The processing circuit is electrically coupled to the first and second pointer sensing modules and configured to select, according to the second set of image information, two or more coordinate positions in the first candidate coordinate group to as actual coordinate positions of the pointers. | 10-17-2013 |
20140043297 | Optical Touch System and Optical Touch Control Method - An optical touch control method includes steps of: providing a bright background from at least one edge of a touch surface in a first period; providing illumination light to the touch surface in a second period; capturing a first image of an indicator object blocking a portion of the bright background in the first period; and capturing a second image of the indicator object reflecting the illumination light in the second period. An optical touch system is also provided. | 02-13-2014 |
20140055416 | Optical Touch System and Operation Method Thereof - An operation method of an optical touch system is provided. The optical touch system includes a touch surface, a light sensing unit, a switch unit and an analog-to-digital conversion unit. The light sensing unit includes a plurality of light sensing elements. The operation method includes: turning on one specific light sensing element group and thereby configuring the light sensing elements thereof to sense the light on the touch surface; and controlling the switch unit to electrically connect the light sensing elements of the turned-on light sensing element group to the input terminals of the analog-to-digital conversion unit, respectively, so as to transmit the sensing signals outputted from the turned-on light sensing element group to the input terminals, and thereby configuring the analog-to-digital conversion unit to generate at least one digital output signal according to the sensing signals supplied to the input terminals thereof. An optical touch system is also provided. | 02-27-2014 |
20140176964 | OPTICAL TOUCH SYSTEM - An optical touch system comprises a first light-emitting unit, a second light-emitting unit, a first image sensor having a first filter, and a second image sensor having a second filter. The first light-emitting unit generates first wavelength band light. The second light-emitting unit generates second wavelength band light. The first light-emitting unit generates first wavelength band light when the first image sensor is capturing an image. The first filter allows first wavelength band light to enter into the first image sensor and blocks second wavelength band light. The second light-emitting unit generates second wavelength band light when the second image sensor is capturing an image. The second filter allows second wavelength band light to enter into the second image sensor and block first wavelength band light. | 06-26-2014 |
Wei-Chia Su, Hsinchu City TW
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20100073747 | Wavelength-multiplex and space-multiplex holographic storage device - The present invention discloses a wavelength-multiplex and space-multiplex holographic storage device, which comprises a storage medium, a plurality of signal light beams and at least one reference light beam. The signal light beams have different wavelengths and illuminate the storage medium. The reference light beam illuminates the storage medium and interferes with the signal light beams to form a plurality of interference patterns. The interference patterns are respectively stored on different-depth storage layers of the storage medium. The present invention not only has a high access rate but also has a large storage capacity. | 03-25-2010 |
Wei-Chuan Su, Hsinchu City TW
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20110080129 | SINGLE-PIN MULTIFUNCTIONAL DEVICE AND METHOD FOR INPUT AND OUTPUT IN CONTROLLING A DIRECT-CURRENT FAN - A single-pin multifunctional device and method for input and output in controlling a direct-current fan use a control chip to control an operation of the fan, thereby protecting issues generated by too high a temperature. The control chip uses a value of a temperature induction unit to determine a range of protection and maintains the fan at an idle speed operation through an idle speed regulation unit. Meanwhile, the temperature induction unit notifies an over-temperature protection unit to switch from the idle speed regulation unit to the over-temperature protection unit. Therefore, the fan is controlled through a single pin to input and output simultaneously. | 04-07-2011 |
Wei-Lu Su, Hsinchu City TW
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20120089754 | HYBRID SERIAL PERIPHERAL INTERFACE DATA TRANSMISSION ARCHITECTURE AND METHOD OF THE SAME - A hybrid serial peripheral interface (SPI) data transmission architecture adapted in a network device for connecting a host and a network is provided. The architecture comprises a RX buffer and RX SPI for maintaining a data receiving process, a TX buffer and TX SPI for maintaining a data transmission process, a configuration and status register and a hybrid SPI processing module. The hybrid SPI processing module makes the RX SPI performs the data transmission process as well when the RX SPI idles and the data transmission process proceeds at the same time and makes the TX SPI to performs the data receiving process as well when the TX SPI idles and the data receiving process proceeds at the same time. A hybrid SPI data transmission method is disclosed herein as well. | 04-12-2012 |
20120096194 | UNIVERSAL SERIAL BUS DEVICE AND BULK TRANSFER CONTROL CIRCUIT AND CONTROL METHOD THEREOF - A bulk transfer control method of a universal serial bus (USB) device includes a timer for counting transmission time of a buck transfer. When the transmission time counted reaches a transmission time setting value, a trigger signal is issued to a transfer end event generator. Then, the transfer end event generator issues a transfer end event signal to a data processing unit so as to end the bulk transfer. Moreover, a USB device and its bulk transfer control circuit are also provided. | 04-19-2012 |
Wei-Lun Su, Hsinchu City TW
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20100097297 | Flat Display Panel and Active Device Array Substrate and Light-on Testing Method thereof - A flat display panel and an active device array substrate and a light-on testing method thereof are provided. The active device array substrate comprises a plurality of first pixel units, a plurality of second pixel units, a first light-on testing circuit, a second light-on testing circuit and a plurality of sets of signal lines. The first light-on testing circuit and the second light-on testing circuit disposed in a peripheral circuit region of the active device array substrate are electrically connected with the first pixel units and the second pixel units disposed in a display region of the active device array substrate respectively. Each two adjacent sets of signal lines disposed in the peripheral circuit region of the active device array substrate are alternatively electrically connected to the first pixel units or the second pixel units respectively. When a testing signal inputted to first/second pixel units through the first/second light-on testing circuit results in any second/first pixel units being lighted-on, there are at least two adjacent sets of signal lines shorted to each other. | 04-22-2010 |
Wei-Sheng Su, Hsinchu City TW
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20140312311 | OPTOELECTRONIC MATERIALS FOR OLED AND OLED ELEMENTS USING THE SAME - An optoelectronic materials for OLED is represented by formula (I): | 10-23-2014 |
Wen-Yi Su, Hsinchu City TW
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20090102929 | WEB CAMERA MODULE AND OPERATION METHOD THEREOF - A web camera module and an operation method thereof are provided. The web camera module includes a sensor and a back-end circuit coupled to the sensor. The sensor provides an image signal. The back-end circuit receives a firmware program from a personal computer and executes the firmware program to perform an image processing on the image signal, and then the back-end circuit provides a result of the image processing to the personal computer. | 04-23-2009 |
Wen-Yu Su, Hsinchu City TW
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20110037133 | Semiconductor Photodetector Structure and the Fabrication Method Thereof - A semiconductor photodetector structure is provided. The structure includes a substrate, a photodetecting element and a semiconductor layer disposed on the photodetecting element. The substrate includes a first semiconductor material and includes a deep trench. The surface of the deep trench includes a first type dopant. The photodetecting element is disposed in the deep trench. The photodetecting element includes a second semiconductor material. The semiconductor layer includes a second type dopant. | 02-17-2011 |
Win Jim Su, Hsinchu City TW
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20100200885 | LIGHT-EMITTING DEVICE AND MANUFACTURING METHOD THEREOF - A light emitting device and a method of fabricating thereof are provided. The method of fabricating the light emitting device comprises: providing a substrate having a first major surface and a second major surface; forming a plurality of light-emitting stacks on the first major surface; forming an etching protection layer on each of the light emitting stacks; forming a plurality of holes by a discontinuous laser beam on the substrate; etching the plurality of holes; and slicing off the substrate along the plurality of holes to form a light emitting device. The light emitting device has a substrate wherein the sidewall of the substrate comprising a first area with a substantially flat surface and a second area with substantially textured surface. | 08-12-2010 |
20130302927 | Light-Emitting Device and Manufacturing Method Thereof - A light emitting device and a method of fabricating thereof are provided. The method of fabricating the light emitting device comprises: providing a substrate having a first major surface and a second major surface; forming a plurality of light-emitting stacks on the first major surface; forming an etching protection layer on each of the light emitting stacks; forming a plurality of holes by a discontinuous laser beam on the substrate; etching the plurality of holes; and slicing off the substrate along the plurality of holes to form a light emitting device. The light emitting device has a substrate wherein the sidewall of the substrate comprising a first area with a substantially flat surface and a second area with substantially textured surface. | 11-14-2013 |
Yan-Kui Su, Hsinchu City TW
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20150194739 | SMALL-CALIBER, HIGH-PERFORMANCE BROADBAND RADIATOR - A small-caliber, high-performance broadband radiator allows two unit arms of the first and second group of dipoles to be folded inwards, an included angle of 40°-50° is formed between two unit arms of the first/second groups of dipoles and the first/second unit racks, and the unit arms of the first and second groups of dipoles are arranged linearly at interval while flexural loading sections are provided and also connected by dielectric medium. Hence, the broadband radiator allows significant reduction of the aperture of the broadband radiator, and there is a larger adjustment space for the gap of the radiator array, so the interference of low and high bands is less. This allows for improved performance, thus reducing the configuration size and manufacturing cost of antennas, and creating better industrial benefits with improved applicability. | 07-09-2015 |
Yao-Chun Su, Hsinchu City TW
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20150339253 | ELECTRONIC DEVICE WITH ENHANCED MANAGEMENT DATA INPUT/OUTPUT CONTROL - An electronic device has a management data input/output (MDIO) bus, a control unit, and an MDIO master. The control circuit receives a host command from a host device, and outputs a plurality of MDIO commands in response to the host command. The MDIO master receives the MDIO commands from the control circuit, and transmits the MDIO commands to the MDIO bus. | 11-26-2015 |
Yi-Feng Su, Hsinchu City TW
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20100267339 | Method for Preventing Collision and Wireless Transceiver Using the Same - A wireless transceiver device capable of preventing collision includes a first wireless module and a second wireless module. The first wireless module includes a first wireless transceiver unit for transmitting and receiving wireless signals of a first wireless communication system, and an indication signal generating unit for generating an indication signal indicating that the first wireless transceiver unit starts to transmit or receive a wireless signal at a first time point before the first wireless transceiver unit transmits or receives the wireless signal. The second wireless module includes a second wireless transceiver unit for transmitting and receiving wireless signals of a second wireless communication system, and a transmission control unit for controlling the second wireless transceiver unit to stop transmitting or receiving wireless signals from the first time point according to the indication signal. | 10-21-2010 |
Yi-Heng Su, Hsinchu City TW
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20110274608 | Process for purifying silicon source material by high gravity rotating packed beds - A process is disclosed for purification of silicon source material including trichlorosilane. First, the silicon source material in liquid state with impurities vapor and the other chlorosilane or silane are passing a first high gravity rotating packed bed with spongy metal, at a temperature lower than the boiling point of the silicon source material, the impurities vapor and the other chlorosilane or silane are separated from the liquid silicon source material; second, the silicon source material in liquid state is fed to a second high gravity rotating packed bed, oxygen is also fed to the second high gravity rotating packed bed to form impurity containing siloxane complexes with higher boiling point. Finally distilling to remove the impurity containing siloxane complexes from the silicon source material. | 11-10-2011 |
Yi Jen Su, Hsinchu City TW
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20100287519 | METHOD AND SYSTEM FOR CONSTRUCTING A CUSTOMIZED LAYOUT FIGURE GROUP - A method and a system for constructing a customized layout figure group are disclosed. The method provides improved options for users to flexibly create a customized figure group design. During the layout process, the layout shape, the leaf device and the nest device with design parameters can be created with built-in figure groups, user's scripts and/or by capturing the user's existing layout. | 11-11-2010 |
Ying-Hao Su, Hsinchu City TW
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20140065554 | Method and Apparatus for Developing Process - The present disclosure involves a method of fabricating a semiconductor device. The method includes providing a substrate having a material layer formed thereon; depositing a photoresist layer on the material layer, the photoresist layer having a vertical dimension; exposing a region of the photoresist layer to radiation, the exposed region having a horizontal dimension, wherein a first ratio of the vertical dimension to the horizontal dimension exceeds a predetermined ratio; and developing the photoresist layer to remove the exposed region at least in part through applying a developer solution containing a first chemical and a second chemical, wherein: the first chemical is configured to dissolve the exposed region of the photoresist layer through a chemical reaction; the second chemical is configured to enhance flow of the first chemical that comes into contact with the photoresist layer; and an optimized second ratio exists between the first chemical and the second chemical. | 03-06-2014 |
20140121799 | METHOD FOR VALIDATING MEASUREMENT DATA - A method is provided for validating measurement data, such as data obtained from a scanning electron microscope using in a semiconductor fabrication facility. The method includes applying a signal on a material feature by using a source in a measurement tool having a tool setting parameter, collecting a response signal from the material feature by using a detector in the measurement tool to obtain the measurement data, calculating a simulated response signal by a smart, and validating the measurement data by comparing the collected response signal with the simulated response signal. The system also includes a design database having a design feature, a measurement tool collecting a response signal, and a smart review engine configured to connect the measurement tool and the design database. The smart engine generates a simulated response signal using the design feature and a measurement tool setting parameter so that the measurement is validated by comparing a collected response signal and a simulated response signal. | 05-01-2014 |
20140264773 | SYSTEM AND METHOD FOR OPTIMIZATION OF AN IMAGED PATTERN OF A SEMICONDUCTOR DEVICE - In a method, a layout of a device having a pattern of features is provided. The method continues to include identifying a first portion of at least one feature of the plurality of features. An image criteria for the first portion may be assigned. A lithography optimization parameter is determined based on the assigned image criteria for the first portion. Finally, the first portion of the at least one feature is imaged onto a semiconductor substrate using the determined lithography optimization parameter. | 09-18-2014 |
20150214226 | METHOD AND STRUCTURE FOR GAP FILLING IMPROVEMENT - The present disclosure provides a method for forming a semiconductor structure. The method includes providing a substrate including a plurality of fin structures on the substrate; coating a first solution on the substrate to form a first dielectric layer; and coating a second solution on the first dielectric layer to form a second dielectric layer to cover the fin structures. The first solution has a first viscosity. The second solution has a second viscosity. In some embodiments, the second viscosity is greater than the first viscosity. | 07-30-2015 |
20150317424 | SYSTEM AND METHOD FOR OPTIMIZATION OF AN IMAGED PATTERN OF A SEMICONDUCTOR DEVICE - In a method, a layout of a device having a pattern of features is provided. The method continues to include identifying a first portion of at least one feature of the plurality of features. An image criteria for the first portion may be assigned. A lithography optimization parameter is determined based on the assigned image criteria for the first portion. Finally, the first portion of the at least one feature is imaged onto a semiconductor substrate using the determined lithography optimization parameter. | 11-05-2015 |
Ying-Jie Su, Hsinchu City TW
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20090251477 | MEMORY SAVING DISPLAY DEVICE - A display device capable of saving memory storage used for an overdriving function includes a compression unit, a frame buffer, a decompression unit and a look-up table (LUT) unit. The compression unit includes a decimation filter and is used for compressing data of a received frame and reducing a size of the received frame, to generate a compression frame. The frame buffer is coupled to the compression unit and used for storing the compression frame. The decompression unit includes an interpolation filter and is used for decompressing data of the compression frame outputted by the frame buffer and reducing a size of the compression frame, to generate a decompression frame. The LUT unit is coupled to the decompression unit and used for comparing the decompression frame with a next received frame of the received frame to determine an overdriving voltage. | 10-08-2009 |
20090262840 | Synchronization Signal Extraction Device and Related Method - A synchronization signal extraction device includes a signal reception terminal for receiving a composite video signal, a threshold voltage adjuster coupled to the signal reception terminal for adjusting a threshold voltage to a ratio of a first characteristic level and a second characteristic level of the composite video signal according to the first characteristic level and the second characteristic level, a slicer coupled to the signal reception terminal and the threshold voltage adjuster for slicing the composite video signal to extract a synchronization signal in the composite video signal, and a signal output terminal coupled to the slicer for outputting the extracted synchronization signal. | 10-22-2009 |
20090278767 | Data Access Method for a Timing Controller of a Flat Panel Display and Related Device - A data access method for a timing controller of a flat panel display includes forming a line buffer including a plurality of memory cells in the timing controller, dividing the plurality of memory cells into a first section and a second section, wherein the number of memory cells in the first section is greater than the number of memory cells in the second section, writing a first number of pixel data into the first section, wherein the first number of pixel data is included in a plurality of pixel data corresponding to a row of a frame, writing a second number of pixel data into the second section, wherein the second number of pixel data is included in the plurality of pixel data, and the first number is equal to the second number, and reading the plurality of pixel data from the plurality of memory cells according to an order. | 11-12-2009 |
Yi-Nien Su, Hsinchu City TW
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20140110845 | DAMASCENE GAP STRUCTURE - One or more techniques or systems for forming a damascene gap structure are provided herein. In some embodiments, a gap is formed between a first etch stop layer (ESL) and an ESL seal region. For example, the gap is formed by removing a portion of a low-k (LK) dielectric region above an oxide region and removing the oxide region. In some embodiments, the oxide region below the LK dielectric region facilitates removal of the LK dielectric region, at least because the oxide region enhances a bottom etch rate of a bottom of the LK dielectric region such that the bottom etch rate is similar to a wall etch rate of a wall of the LK dielectric region. In this manner, a damascene gap structure associated with a cleaner gap is provided, for example. | 04-24-2014 |
20140272135 | DEPOSITION INJECTION MASKING - In deposition devices, a precursor is directed at a substrate within a deposition chamber, and a block plate comprising a set of block plate apertures adjusts the direction and volume of the outflowing precursor. However, arrangements of block plate apertures that are suitable for some deposition scenarios (such as one type of precursor) are unsuitable for other deposition scenarios, resulting in precursor deposition that is undesirably thick, thin, or inconsistent. A set of block plate masks positioned over respective zones of the block plate are adjustable to align a set of masking apertures with respect to the block plate apertures, such as by operating a block plate motor to rotate a ring-shaped block plate mask over a cylindrical zone of the block plate. This configuration enables adjustable exposure of the block plate apertures to control the adjusted outflow of precursor through the block plate. | 09-18-2014 |
20150318206 | METHOD FOR FORMING SEMICONDUCTOR STRUCTURE - One or more techniques or systems for forming a semiconductor structure having a gap are provided herein. In some embodiments, a gap is formed between a first etch stop layer (ESL) and an ESL seal region. For example, the gap is formed by removing a portion of a low-k (LK) dielectric region above an oxide region and removing the oxide region. In some embodiments, the oxide region below the LK dielectric region facilitates removal of the LK dielectric region, at least because the oxide region enhances a bottom etch rate of a bottom of the LK dielectric region such that the bottom etch rate is similar to a wall etch rate of a wall of the LK dielectric region. | 11-05-2015 |
Yu-Chi Su, Hsinchu City TW
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20120180014 | METHOD OF CONTEXT-SENSITIVE, TRANS-REFLEXIVE INCREMENTAL DESIGN RULE CHECKING AND ITS APPLICATIONS - A computer-implemented method to perform context-sensitive incremental design rule checking (DRC) for an integrated circuit (IC). An incremental DRC engine checks design rule violations between a set of environment shapes and a set of active shapes. If no design rule violations are found, the set of active shapes will be added into the set of environment shapes. Furthermore, the incremental DRC engine can be embedded into placement tools, routing tools, or interactive layout editing tools to check design rule violations and help generate DRC error free layouts. | 07-12-2012 |
20130091481 | METHOD OF SCHEMATIC DRIVEN LAYOUT CREATION - A computer-implemented method is disclosed for layout pattern or layout constraint reuse by identifying sub-circuits with identical or similar schematic structure based on a topology comparison strategy. The selected sub-circuit is transformed into a topology representing the relative positions among the instances of the selected sub-circuit. Based on the topology, one or more sub-circuits with identical or similar topologies in a predefined scope of a schematic are recognized and identified. Accordingly, the layout or the layout constraint of the selected sub-circuit is copied and associated to each of the identified sub-circuits. Furthermore, once the sub-circuits are identified, they can be listed on a user interface with notations to allow users to confirm each of the identified sub-circuits respectively. | 04-11-2013 |
20130254727 | SYSTEM AND METHODS FOR HANDLING VERIFICATION ERRORS - Systems, apparatus and methods for handling verification violations are disclosed. In one aspect, a method stores a list of fix information in addition to geometric shapes for each layer during verification, such as design rule checking For each primitive operation step performed during verification, two tasks are performed. First, if the primitive operation is a dimensional checking operation (i.e., width, spacing or enclosure), then for each violation, the first task creates fix information containing violation edge pairs and adds the created fix information to the fix information list on the output layer. Second, for all operations and after the output shapes on the output layer are generated, a second task passes the fix information on input layers which overlap any output shape of the output layer to the output layer's fix information list. Finally, fix guides for the final violation results are generated and drawn based on the final fix information list. | 09-26-2013 |
Yu-Chung Su, Hsinchu City TW
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20150214226 | METHOD AND STRUCTURE FOR GAP FILLING IMPROVEMENT - The present disclosure provides a method for forming a semiconductor structure. The method includes providing a substrate including a plurality of fin structures on the substrate; coating a first solution on the substrate to form a first dielectric layer; and coating a second solution on the first dielectric layer to form a second dielectric layer to cover the fin structures. The first solution has a first viscosity. The second solution has a second viscosity. In some embodiments, the second viscosity is greater than the first viscosity. | 07-30-2015 |
20150262812 | CMP-FRIENDLY COATINGS FOR PLANAR RECESSING OR REMOVING OF VARIABLE-HEIGHT LAYERS - An IC device manufacturing process effectuates a planar recessing of material that initially varies in height across a substrate. The method includes forming a polymer coating, CMP to form a planar surface, then plasma etching to effectuate a planar recessing of the polymer coating. The material can be recessed together with the polymer coating, or subsequently with the recessed polymer coating providing a mask. Any of the material above a certain height is removed. Structures that are substantially below that certain height can be protected from contamination and left intact. The polymer can be a photoresist. The polymer can be provided with suitable adhesion and uniformity for the CMP process through a two-step baking process and by exhausting the baking chamber from below the substrate. | 09-17-2015 |
20150279660 | Lithography Process and Composition with De-Crosslinkable Crosslink Material - The present disclosure provides a method that includes forming a polymeric material layer on a substrate, wherein the polymeric material layer includes de-crosslinkable crosslink material (DCM); performing a first baking process having a first baking temperature to the polymeric material layer, thereby initiating crosslinking function of the DCM; and performing a second baking process having a second baking temperature to the polymeric material layer, thereby initiating de-crosslinking function of the DCM. | 10-01-2015 |
Yung-Szu Su, Hsinchu City TW
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20100175746 | TANDEM SOLAR CELL - This application is related to a tandem solar cell device including a substrate, a first tunnel junction formed on the substrate, and a first p-n junction formed on the first tunnel junction wherein the first tunnel junction including a heavily doped n-type layer and an alloy layer wherein the alloy layer having an element with atomic number larger than that of Gallium. | 07-15-2010 |
Yu T. Su, Hsinchu City TW
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20100008308 | LINK ADAPTION IN WIRELESS COMMUNICATIONS - Methods and systems for providing generalized link adaptation in an orthogonal frequency-division multiple access wireless communications network can include determining a number of desired resource blocks (RBs) for each user of a plurality of users; calculating a maximal channel gain G | 01-14-2010 |