Patent application number | Description | Published |
20090087577 | METHOD TO IMPROVE ELECTRICAL LEAKAGE PERFORMANCE AND TO MINIMIZE ELECTROMIGRATION IN SEMICONDUCTOR DEVICES - Embodiments of methods for improving electrical leakage performance and minimizing electromigration in semiconductor devices are generally described herein. Other embodiments may be described and claimed. | 04-02-2009 |
20090087969 | METHOD TO IMPROVE A COPPER/DIELECTRIC INTERFACE IN SEMICONDUCTOR DEVICES - Embodiments of methods for improving a copper/dielectric interface in semiconductor devices are generally described herein. Other embodiments may be described and claimed. | 04-02-2009 |
20090104754 | METHOD TO IMPROVE ELECTRICAL LEAKAGE PERFORMANCE AND TO MINIMIZE ELECTROMIGRATION IN SEMICONDUCTOR DEVICES - Embodiments of methods for improving electrical leakage performance and minimizing electromigration in semiconductor devices are generally described herein. Other embodiments may be described and claimed. | 04-23-2009 |
20090233004 | METHOD AND SYSTEM FOR DEPOSITING SILICON CARBIDE FILM USING A GAS CLUSTER ION BEAM - A method for depositing material on a substrate is described. The method comprises maintaining a reduced-pressure environment around a substrate holder for holding a substrate having a surface, and holding the substrate securely within the reduced-pressure environment. Additionally, the method comprises forming a gas cluster ion beam (GCIB) from a pressurized gas comprising a compound having silicon (Si) and carbon (C), accelerating the GCIB to the reduced-pressure environment, and irradiating the accelerated GCIB onto at least a portion of the surface of the substrate to form a thin film containing silicon and carbon, wherein the carbon content is greater than or equal to about 10%. Further the compound may possess a Si—C bond. | 09-17-2009 |
20120164379 | Wide Sheet Wafer - A sheet wafer has a generally flat, generally rectangular shaped body with a length and a width, and first and second filaments generally perpendicular to the width of the body. The first and second filaments are at least partially encapsulated by a wafer material and, together with the wafer material, form at least a portion of the body. The width is between about 145 mm and 165 mm. | 06-28-2012 |
20130167588 | SHEET WAFER FURNACE WITH GAS PRESERVATION SYSTEM - A sheet wafer furnace has a chamber having an opening, and a crucible, within the chamber, and spaced from the opening. The furnace also has a puller configured to pull a sheet wafer from molten material in the crucible and through the opening in the chamber, and a seal across the opening of the chamber. | 07-04-2013 |
20130285177 | MAGNETIC MEMORY AND METHOD OF FABRICATION - In one embodiment a magnetic memory includes a memory device base and a plurality of memory cells disposed on the memory cell base, where each memory cell includes a layer stack comprising a plurality of magnetic and electrically conductive layers arranged in a stack of layers common to each other memory cell. The magnetic memory further includes an implanted matrix disposed between the memory cells and surrounding each memory cell, where the implanted matrix includes component material of the layer stack of each memory cell inter mixed with implanted species, where the implanted matrix comprises a non-conducting material and a non-magnetic material, wherein each memory cell is electrically and magnetically isolated from each other memory cell. | 10-31-2013 |
20130288394 | MAGNETIC MEMORY AND METHOD OF FABRICATION - A method of forming a magnetic memory includes providing a layer stack comprising a plurality of magnetic layers and a plurality of electrically conducting layers on a base portion of a substrate; forming a first mask feature on an outer surface of the layer stack above a first protected region and a second mask feature on the outer surface of the layer stack above a second protected region, the first mask feature and second mask feature defining an exposed region of the layer stack in portions of the layer stack therebetween; and directing ions towards exposed the region of the layer stack in an ion exposure that is effective to magnetically isolate the first protected region from the second protected region and to electrically isolate the first protected region from the second protected region without removal of the exposed region of the layer stack. | 10-31-2013 |
20140374843 | REPLACEMENT METAL GATE TRANSISTOR - A replacement metal gate transistor is described. Various examples provide a replacement metal gate transistor including a trench, a first sidewall and a second sidewall. A layer is disposed in the trench where the layer has a bottom section disposed on a bottom of the trench and sidewall sections disposed on the first and second sidewalls, wherein the sidewall sections of the layer are at least 50% thinner than the bottom section of the layer. | 12-25-2014 |
20140377885 | PROCESS FLOW FOR REPLACEMENT METAL GATE TRANSISTORS - A replacement metal gate transistor and methods of forming replacement metal gate transistors are described. Various examples provide methods of manufacturing a replacement metal gate transistor that includes depositing a dielectric layer into a trench, wherein the dielectric layer is deposited onto the bottom of the trench and the sidewalls of the trench, depositing a first metal layer into the trench, wherein the first metal layer is deposited onto the bottom of the trench and the sidewalls of the trench over the dielectric layer, depositing a second metal layer into the trench, wherein the second metal layer is deposited onto the bottom of the trench and the sidewalls of the trench over the first metal layer, removing at least a portion of the second metal layer from the sidewalls of the trench, and depositing a conducting layer into the trench. Other embodiments are disclosed and claimed. | 12-25-2014 |