Patent application number | Description | Published |
20130184840 | SYSTEM AND METHOD FOR COUPLING AN AUTOMATION CONTROLLER AND SCALEABLE MODULE - System and method related to a control system including an automation controller with a module bay configured to facilitate coupling with scalable modules. The module bay of the automation controller includes a plurality of bay connectors configured to communicatively couple with the scalable module connectors. The module bay may include an open end to facilitate extension beyond an edge of the open end by a module or a closed end. | 07-18-2013 |
20130196405 | POROUS FIBER, METHODS OF MAKING THE SAME AND USES THEREOF - There is provided a porous fiber having a core-shell configuration, wherein the pores on the fiber are configured to encapsulate and thereby retain a biological material therein. | 08-01-2013 |
20140182334 | POROUS WASTE GLASS MEMBRANE - The present invention disclosed in this application relates to a method for producing glass membranes for filtration purposes. The disclosed method for producing cost effective glass membranes utilizes recycled waste glass, has shorter sintering periods and has lower sintering temperatures. | 07-03-2014 |
20140326658 | Triple Layer Hydrophobic-Hydrophilic Membrane for Membrane Distillation Applications - This invention relates to a triple layer composite nanofiber membrane for Membrane Distillation (MD) applications. The triple layer membrane has an extremely hydrophobic nanofiber layer, a hydrophobic microporous middle layer and a hydrophilic backing layer for MD applications. | 11-06-2014 |
20150114818 | Vacuum Air Gap Membrane Distillation System for Desalination - This invention relates to a vacuum air gap membrane distillation system for desalination purposes. More particularly, this invention relates to a membrane distillation system with multiple cells in which the system's flux is increased due to the temperature and pressure differential within the system. The configuration of the vacuum air gap membrane distillation system allows for latent heat within the system to be recycled effectively reducing the energy consumption of the system. | 04-30-2015 |
Patent application number | Description | Published |
20100264485 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - This invention provides a method of manufacturing a semiconductor device, which comprises the steps of: forming a first columnar semiconductor layer on a first flat semiconductor layer; forming a first semiconductor layer of a second conductive type in a lower portion of the first columnar semiconductor layer; forming a first insulating film around a lower sidewall of the first columnar silicon layer; forming a gate insulating film and a gate electrode around the first columnar silicon layer; forming a sidewall-shaped second insulating film to surround an upper sidewall of the first columnar silicon layer; forming a semiconductor layer of a first conductive type between the first semiconductor layer of the second conductive type and a second semiconductor layer of the second conductive type; and forming a metal-semiconductor compound on an upper surface of the first semiconductor layer of the second conductive type. | 10-21-2010 |
20110012090 | SILICON-GERMANIUM NANOWIRE STRUCTURE AND A METHOD OF FORMING THE SAME - A silicon-germanium nanowire structure arranged on a support substrate is disclosed, The silicon-germanium nanowire structure includes at least one germanium-containing supporting portion arranged on the support substrate, at least one germanium-containing nanowire disposed above the support substrate and arranged adjacent the at least one germanium-containing supporting portion, wherein germanium concentration of the at least one germanium-containing nanowire is higher than the at least one germanium-containing supporting portion. A transistor comprising the silicon-germanium nanowire structure arranged on a support substrate is also provided. A method of forming a silicon-germanium nanowire structure arranged on a support substrate and a method of forming a transistor comprising forming the silicon-germanium nanowire structure arranged on a support substrate are also disclosed. | 01-20-2011 |
20110193183 | NANOWIRE SENSOR, NANOWIRE SENSOR ARRAY AND METHOD OF FABRICATING THE SAME - A method of fabricating a sensor comprising a nanowire on a support substrate with a first semiconductor layer arranged on the support substrate is disclosed. The method comprises forming a fin structure from the first semiconductor layer, the fin structure comprising at least two supporting portions and a fin portion arranged there between; oxidizing at least the fin portion of the fin structure thereby forming the nanowire being surrounded by a first layer of oxide; and forming an insulating layer above the supporting portions; wherein the supporting portions and the first insulating layer form a microfluidic channel. A nanowire sensor is also disclosed. The nanowire sensor comprises a support substrate, a semiconducting fin structure arranged on the support substrate, the fin structure comprising at least two semiconducting supporting portions and a nanowire arranged there between; and a first insulating layer on a contact surface of the supporting portions; wherein the supporting portions and the first insulating layer form a microfluidic channel. | 08-11-2011 |
20110303973 | SEMICONDUCTOR DEVICE AND PRODUCTION METHOD - The semiconductor device according to the present invention is an nMOS SGT and is composed of a first n+ type silicon layer, a first gate electrode containing metal and a second n+ type silicon layer arranged on the surface of a first columnar silicon layer positioned vertically on a first planar silicon layer. Furthermore, a first insulating film is positioned between the first gate electrode and the first planar silicon layer, and a second insulating film is positioned on the top surface of the first gate electrode. In addition, the first gate electrode containing metal is surrounded by the first n+ type silicon layer, the second n+ type silicon layer, the first insulating film and the second insulating film. | 12-15-2011 |
20120138437 | Switching device and a method for forming a switching device - Embodiments provide a switching device. The switching device includes a substrate, which includes a contact region. The switching device further includes a vertical layer arrangement extending from the substrate next to the contact region. The vertical layer arrangement includes a control layer. The switching device further includes a freestanding silicon cantilever extending vertically from the contact region. | 06-07-2012 |
20130020631 | Memory Cell and Method of Manufacturing a Memory Cell - A memory cell and a method of manufacturing a memory cell are provided. The memory cell includes a substrate; at least one first electrode disposed above the substrate; at least one second electrode disposed above the at least one first electrode; a moveable electrode disposed between the at least one first electrode and the at least one second electrode; wherein the moveable electrode is configured to move between the at least one first electrode and the at least one second electrode; wherein the moveable electrode comprises metal. | 01-24-2013 |
20130095625 | SEMICONDUCTOR DEVICE AND PRODUCTION METHOD THEREOF - A method for producing a semiconductor device includes preparing a structure having a substrate, a planar semiconductor layer and a columnar semiconductor layer, forming a second drain/source region in the upper part of the columnar semiconductor layer, forming a contact stopper film and a contact interlayer film, and forming a contact layer on the second drain/source region. The step for forming the contact layer includes forming a pattern and etching the contact interlayer film to the contact stopper film using the pattern to form a contact hole for the contact layer and removing the contact stopper film remaining at the bottom of the contact hole by etching. The projection of the bottom surface of the contact hole onto the substrate is within the circumference of the projected profile of the contact stopper film formed on the top and side surface of the columnar semiconductor layer onto the substrate. | 04-18-2013 |
20130200327 | Resistive Memory Arrangement and a Method of Forming the Same - According to embodiments of the present invention, a resistive memory arrangement is provided. The resistive memory arrangement includes a nanowire, and a resistive memory cell including a resistive layer including a resistive changing material, wherein at least a section of the resistive layer is arranged covering at least a portion of a surface of the nanowire, and a conductive layer arranged on at least a part of the resistive layer. According to further embodiments of the present invention, a method of forming a resistive memory arrangement is also provided. | 08-08-2013 |
20130252413 | SURROUND GATE CMOS SEMICONDUCTOR DEVICE - The semiconductor device includes: a columnar silicon layer on the planar silicon layer; a first n+ type silicon layer formed in a bottom area of the columnar silicon layer; a second n+ type silicon layer formed in an upper region of the columnar silicon layer; a gate insulating film formed in a perimeter of a channel region between the first and second n+ type silicon layers; a gate electrode formed in a perimeter of the gate insulating film, and having a first metal-silicon compound layer; an insulating film formed between the gate electrode and the planar silicon layer, an insulating film sidewall formed in an upper sidewall of the columnar silicon layer; a second metal-silicon compound layer formed in the planar silicon layer; and an electric contact formed on the second n+ type silicon layer. | 09-26-2013 |
20130270508 | Non-Volatile Memory Device and Method of Forming the Same - According to embodiments of the present invention, a non-volatile memory device is provided. The non-volatile memory device includes a nanowire transistor including a nanowire channel, and a resistive memory cell arranged adjacent to the nanowire transistor and in alignment with a longitudinal axis of the nanowire channel. According to further embodiments of the present invention, a method of forming a non-volatile memory device is also provided. | 10-17-2013 |
20130328138 | METHOD FOR PRODUCING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE - A method for producing a semiconductor device includes a first step including forming a planar silicon layer and forming first and second pillar-shaped silicon layers; a second step including forming a gate insulating film around each of the first and second pillar-shaped silicon layers, forming a metal film and a polysilicon film around the gate insulating film, the thickness of the polysilicon film being smaller than half of a distance between the first and second pillar-shaped silicon layers, forming a third resist, and forming a gate line; and a third step including depositing a fourth resist so that a portion of the polysilicon film on an upper side wall of each of the first and second pillar-shaped silicon layers is exposed, removing the exposed portion of the polysilicon film, removing the fourth resist, and removing the metal film to form first and second gate electrodes. | 12-12-2013 |
20140091372 | METHOD FOR PRODUCING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE - In a first step, a planar silicon layer is formed on a silicon substrate and first and second pillar-shaped silicon layers are formed on the planar silicon layer; a second step includes forming an oxide film hard mask on the first and second pillar-shaped silicon layers, and forming a second oxide film on the planar silicon layer, the second oxide film being thicker than a gate insulating film; and a third step includes forming the gate insulating film around each of the first pillar-shaped silicon layer and the second pillar-shaped silicon layer, forming a metal film and a polysilicon film around the gate insulating film, the polysilicon film having a thickness that is smaller than one half a distance between the first pillar-shaped silicon layer and the second pillar-shaped silicon layer, forming a third resist for forming a gate line, and performing anisotropic etching to form the gate line. | 04-03-2014 |
20140147955 | METHOD OF ENCAPSULATING A MICRO-ELECTROMECHANICAL (MEMS) DEVICE - A method for encapsulating a micro-electromechanical (MEMS) device, the method comprising: providing a sacrificial layer arrangement over the MEMS device; providing a first encapsulation layer over the sacrificial layer arrangement, the first encapsulation layer defining at least one aperture; providing a second encapsulation layer over the at least one aperture, the second encapsulation layer being provided to allow removal of the sacrificial layer arrangement around the second encapsulation layer; and removing the sacrificial layer arrangement through the at least one aperture to allow the second encapsulation layer to cover the at least one aperture thereby encapsulating the MEMS device. | 05-29-2014 |
20150175408 | METHOD FOR THIN FILM ENCAPSULATION (TFE) OF A MICROELECTROMECHANICAL SYSTEM (MEMS) DEVICE AND THE MEMS DEVICE ENCAPSULATED THEREOF - A method for thin film encapsulation (TFE) of a microelectromechanical system (MEMS) device, including providing a substrate; forming a MEMS device on the substrate; forming one or more etching channels adjacent to the MEMS device; providing one or more cavities below the MEMS device; and forming one or more cavities above the MEMS device. | 06-25-2015 |
Patent application number | Description | Published |
20110303909 | PLANAR CONJUGATED COMPOUNDS AND THEIR APPLICATIONS FOR ORGANIC ELECTRONICS - The invention relates to organic semiconducting materials, methods for their preparation and organic electronic devices incorporating the said organic semiconducting materials. The organic semiconductors contain a compound of formula (I) | 12-15-2011 |
20120156829 | POLYMERIC SEMICONDUCTORS, DEVICES, AND RELATED METHODS - A polymer comprises a polymeric chain represented by formula (I) or (II). In formula (I), a, b, c, d, and n are integers, a from 0 to 3, b from 1 to 5, c from 1 to 3, d from 1 to 5, and n from 2 to 5000; R | 06-21-2012 |
20140231784 | POLYMERIC SEMICONDUCTORS, DEVICES, AND RELATED METHODS - A polymer comprises a polymeric chain represented by formula (I) or (II). In formula (I) a, b, d, and n are integers, a from 0 to 3, b from 1 to 5, c from 1 to 3, d from 1 to 5, and n from 2 to 5000; R | 08-21-2014 |
Patent application number | Description | Published |
20100287085 | ALTERABLE ACCOUNT NUMBER - Embodiments of the invention are directed to apparatuses, systems, and methods that allow for personalized data to be embedded in a primary account number associated with a consumer device. In one embodiment, a consumer device comprises a body and personalized data embedded into a primary account number, associated with the body. The primary account number includes a bank identification number and the bank identification number and the personalized data overlap. | 11-11-2010 |
20110161230 | System and Method for Processing Payment Transaction Receipts - Embodiments of the invention are directed to systems and methods for processing payment transaction receipts. When an authorization request message for a transaction of a consumer is received, it is determined whether an account associated with the consumer's portable consumer device is enrolled in an electronic receipt program. If the account is enrolled, an electronic receipt for the transaction is sent to the consumer. | 06-30-2011 |
20110218871 | Portable Account Number for Consumer Payment Account - A system, apparatus, and method for providing and using a payment account or payment device identifier when conducting a transaction. The bank identification number (BIN) is decoupled from the primary account number (PAN) or other form of device identifier when generating the payment account or payment device identifier. The payment account or payment device identifier is used to access information regarding the issuer, with that information being used to route a transaction authorization request message to the appropriate entity. | 09-08-2011 |
20120191525 | Systems and Methods to Facilitate Loyalty Reward Transactions - A communications system for financial transactions, such as payment transactions made via credit accounts, debit accounts, prepaid accounts, bank accounts, stored value accounts and the like, is enhanced and/or used to support reward transactions. Thus, the reward communications can be processed as transactions over the communications system in a way similar to and/or together with credit/debit transactions. | 07-26-2012 |
20130023294 | Message Routing Using Logically Independent Recipient Identifiers - Embodiments are directed to methods for routing messages using logically independent recipient identifiers and server computers operable to implement those methods. In one embodiment, an authorization request message is received at the server computer from a sending institution. The authorization request message comprises a non-financial institution identifier and a recipient identifier separate from the non-financial institution identifier, the non-financial institution identifier identifying a non-financial institution, the recipient identifier associated with a recipient, wherein the authorization request message requests authorization for a transaction between a sender and the recipient. The server computer then determines the non-financial institution from a number of different non-financial institutions, routes the authorization request message to the non-financial institution, and receives, from the non-financial institution, an authorization response message, the authorization response message indicating whether or not the transaction is approved. | 01-24-2013 |
20130144787 | ALTERABLE ACCOUNT NUMBER - Embodiments of the invention are directed to apparatuses, systems, and methods that allow for personalized data to be embedded in a primary account number associated with a consumer device. In one embodiment, a consumer device comprises a body and personalized data embedded into a primary account number, associated with the body. The primary account number includes a bank identification number and the bank identification number and the personalized data overlap. | 06-06-2013 |
20130218778 | SYSTEM AND METHOD FOR PROCESSING PAYMENT TRANSACTION RECEIPTS - Embodiments of the invention are directed to systems and methods for processing payment transaction receipts. When an authorization request message for a transaction of a consumer is received, it is determined whether an account associated with the consumer's portable consumer device is enrolled in an electronic receipt program. If the account is enrolled, an electronic receipt for the transaction is sent to the consumer. | 08-22-2013 |
20140214675 | PUSH PAYMENT SYSTEM AND METHOD - Embodiments of the invention introduce systems and methods for using a payment processing network to conduct transactions between accounts not associated with the payment processing network. One embodiment of the invention discloses a method for conducting a funds transfer transaction. The method comprises receiving a recipient bank identifier and a recipient account identifier associated with a recipient account, determining a recipient bank primary account number (PAN) using the recipient bank identifier, generating an authorization request message comprising the recipient bank PAN and the recipient account identifier, sending an authorization request message for a transaction to a recipient bank computer, wherein the recipient bank PAN is used to route the authorization request message to the recipient bank computer, and receiving an authorization response message. | 07-31-2014 |