Shu, CA
Angela Shu, Rancho Santa Margarita, CA US
Patent application number | Description | Published |
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20100076482 | EMBOLI GUARDING DEVICE - A device including a stent structure or frame to which a sheet is attached for use in minimizing or preventing emboli, particles. and/or air bubbles from migrating into certain areas of the anatomy. The device can be placed in the blood stream in an area of the heart, such as the aortic arch, to direct particles toward the descending aorta rather than toward the brain. The sheet of the device can be a thin film material, which may include multiple fenestrations that are smaller in size than the particles that are to be filtered. | 03-25-2010 |
Cassandra Shu, Belmont, CA US
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20160038496 | NOVEL FORMULATIONS OF A BRUTON'S TYROSINE KINASE INHIBITOR - Described herein is the Bruton's tyrosine kinase (Btk) inhibitor 1-((R)-3-(4-amino-3-(4-phenoxyphenyl)-1H-pyrazolo[3,4-d]pyrimidin-1-yl)piperidin-1-yl)prop-2-en-1-one, including novel pharmaceutical formulations thereof. Also disclosed are pharmaceutical compositions that include the Btk inhibitor, as well as methods of using the Btk inhibitor, alone or in combination with other therapeutic agents, for the treatment of autoimmune diseases or conditions, heteroimmune diseases or conditions, cancer, including lymphoma, and inflammatory diseases or conditions. | 02-11-2016 |
Charlie J. Shu, Santa Clara, CA US
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20140160662 | BRACKET OF ADD-IN CARD OF COMPUTER, ADD-IN CARD SYSTEM AND COMPUTER - A bracket of an add-in card of an electronic device is provided. The bracket, in one embodiment, includes a body in a shape of a sheet, wherein the body is provided with an opening, the opening configured to correspond to an interface adapter on the add-in card and expose an interface part of the interface adapter in an installed state when the bracket is installed to the add-in card. The bracket, in this embodiment, further includes a conductive component in electrical connection with the body, the conductive component configured to electrically connect with a housing of the interface adapter in the installed state, wherein at least a portion of the body is made of a conductive material so that the conductive component is electrically connected with a chassis via the body when installed. | 06-12-2014 |
Charlie Junde Shu, San Ramon, CA US
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20150092344 | PUSH PIN AND GRAPHICS CARD WITH THE PUSH PIN - The invention discloses a push pin and a graphics card with the push pin. The push pin comprises a rod, a head, an expansion lock and a first spring. The head is disposed at a first end of the rod and having a radial dimension larger than that of the rod. The expansion lock is disposed at a second end of the rod which is opposite to the first end and having a radial dimension larger than that of the rod, wherein the expansion lock is configured to be elastically contractible when entering a component to be installed in an installing direction, and wherein the installing direction is from the first end to the second end. The first spring made of a conducting material and configured to be installable onto the rod from the second end in a direction opposite to the installing direction. | 04-02-2015 |
Chengyi J. Shu, Los Angeles, CA US
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20090105184 | POSITRON EMISSION TOMOGRAPHY PROBES FOR IMAGING IMMUNE ACTIVATION AND SELECTED CANCERS - Compounds for use as PET probes and methods for synthesizing and using these, comprising [ | 04-23-2009 |
Chiao-Fe Shu, San Mateo, CA US
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20120128242 | SYSTEM AND METHOD FOR DETECTING SCENE CHANGES IN A DIGITAL VIDEO STREAM - A system and method that processes video to extract a keyframe-based adequate visual representation is disclosed. Certain embodiments utilize a hierarchical processing technique. A first stage in the hierarchy extracts a chromatic difference metric from a pair of video frames. An initial set of frames is chosen based on the chromatic metric and a threshold. A structural difference measurement is extracted from this initial set of frames. A second threshold is used to select key frames from the initial set. The first and second thresholds can be user selectable. The output of this process is the visual representation. The method is extensible to any number of metrics and any number of levels. | 05-24-2012 |
David B. Shu, West Hills, CA US
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20120144205 | Cryptographic Architecture with Instruction Masking and other Techniques for Thwarting Differential Power Analysis - An apparatus and method for preventing information leakage attacks that utilize timeline alignment. The apparatus and method inserts a random number of instructions into an encryption algorithm such that the leaked information can not be aligned in time to allow an attacker to break the encryption. | 06-07-2012 |
Emily Y. Shu, Santa Clara, CA US
Patent application number | Description | Published |
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20080204694 | Controlling shape of a reticle with low friction film coating at backside - In an embodiment of the invention, an apparatus includes a reticle having a frontside including a pattern to be imaged onto a semiconductor wafer, a thin film located over a backside of the reticle to form a global convex shape and to reduce friction when sliding on a chuck, and the chuck having a topside to which the backside of the reticle conforms. | 08-28-2008 |
Fontaine H. Shu, San Diego, CA US
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20140108912 | SYSTEMS AND METHODS FOR INTEGRATED APPLICATION PLATFORMS - Systems and methods for integrated application platforms in accordance with embodiments of the invention are disclosed. In one embodiment, a computing device configured to execute an application platform application includes a processor, an operating system configuring the processor to create a computing environment, the application platform application at least partially natively implemented and creates an application runtime environment for cross-platform applications to execute non-natively, the application platform application including a rendering engine process configured to render pages by interpreting instructions and implement a virtual machine configured to execute instructions and an integration process that enables instructions executing within the virtual machine to launch natively implemented applications wherein the application platform application includes a pop up page file containing instructions written in the rendering language that cause the rendering engine process to render a pop up page and wherein the application platform application is configured to launch a natively implemented application. | 04-17-2014 |
20140108913 | SYSTEMS AND METHODS FOR INTEGRATED APPLICATION PLATFORMS - Systems and methods for integrated application platforms in accordance with embodiments of the invention are disclosed. In one embodiment, a computing device configured to execute an application platform application includes a processor, an operating system configuring the processor to create a computing environment, the application platform application at least partially natively implemented and creates an application runtime environment for cross-platform applications to execute non-natively, the application platform application including a rendering engine process configured to render pages by interpreting instructions and implement a virtual machine configured to execute instructions and an integration process that enables instructions executing within the virtual machine to launch natively implemented applications wherein the application platform application includes a pop up page file containing instructions written in the rendering language that cause the rendering engine process to render a pop up page and wherein the application platform application is configured to launch a natively implemented application. | 04-17-2014 |
Fontaine Hanying Shu, San Diego, CA US
Patent application number | Description | Published |
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20120089675 | SYSTEMS AND METHODS FOR USER INTERACTION BASED ON LICENSE OR OTHER IDENTIFICATION INFORMATION - Methods and systems for facilitating user interaction are described. One such method includes receiving, from a first user device, identification information associated with a targeted user and retrieving, from a database, contact information associated with the identification information. The method may further include providing the contact information to the first user device to facilitate communication between the first user device and a user device of the targeted user and/or providing a message to the user device of the targeted user. | 04-12-2012 |
20140337756 | SYSTEMS AND METHODS FOR USER INTERACTION BASED ON LICENSE OR OTHER IDENTIFICATION INFORMATION - Methods and systems for facilitating user interaction are described. One such method includes receiving, from a first user device, identification information associated with a targeted user and retrieving, from a database, contact information associated with the identification information. The method may further include providing the contact information to the first user device to facilitate communication between the first user device and a user device of the targeted user and/or providing a message to the user device of the targeted user. | 11-13-2014 |
Frank H. Shu, Solana Beach, CA US
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20130139432 | SUPERTORREFACTION OF BIOMASS INTO BIOCOAL - A torrefaction system includes at least one pool containing a liquid heat transfer agent and a conveyor system. The heat transfer agent provides thermal contact with biomass fragments to heat the biomass fragments into biocoal. The conveyor system transports the biomass through the at least one pool in a first direction and transporting the biocoal in a second direction opposite to the first direction in the at least one pool. The heat transfer agent may be oil, paraffin, or molten salt. The conveyor system transports a continuous stream of the biomass fragments into the pools. The torrefaction apparatus further includes a gas collecting system that collects and separates condensable volatile organic compounds during the torrefaction process. | 06-06-2013 |
Gang Shu, Alhambra, CA US
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20100272835 | Use of volatile oil from plants in preparing medicaments for preventing and treating diabetes - The use of plants or volatile oils thereof containing high d-Limonene in manufacturing medicaments for treatment of diabetes including type 2 diabetes and type 1 diabetes. Natural products above, as parent plants of d-Limonene, have effect to reduce blood glucose as strong as compound d-Limonene. | 10-28-2010 |
Guoqiang Shu, San Jose, CA US
Patent application number | Description | Published |
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20120266166 | HOST SELECTION FOR VIRTUAL MACHINE PLACEMENT - In one embodiment, a method for placing virtual machines in a collection is provided. A plurality of equivalence sets of hosts is determined prior to placing virtual machines in the collection. The hosts in an equivalence set of hosts are considered similar. An equivalence set of hosts in the plurality of equivalence sets is selected to place the virtual machines in the collection. The method then places at least a portion of the virtual machines in the collection on one or more hosts in the selected equivalence set of hosts. | 10-18-2012 |
20120278801 | MAINTAINING HIGH AVAILABILITY OF A GROUP OF VIRTUAL MACHINES USING HEARTBEAT MESSAGES - Embodiments maintain high availability of software application instances in a fault domain. Subordinate hosts are monitored by a master host. The subordinate hosts publish heartbeats via a network and datastores. Based at least in part on the published heartbeats, the master host determines the status of each subordinate host, distinguishing between subordinate hosts that are entirely inoperative and subordinate hosts that are operative but partitioned (e.g., unreachable via the network). The master host may restart software application instances, such as virtual machines, that are executed by inoperative subordinate hosts or that cease executing on partitioned subordinate hosts. | 11-01-2012 |
20120297236 | HIGH AVAILABILITY SYSTEM ALLOWING CONDITIONALLY RESERVED COMPUTING RESOURCE USE AND RECLAMATION UPON A FAILOVER - In one embodiment, a method attempts, by a computing device, to determine a placement of a set of virtual machines on available hosts upon failure of a host. The placement considers the set of virtual machines as being not powered on any of the available hosts. The method further determines, by the computing device, a placed list of virtual machines in the set of virtual machines as a recommendation to power on to the available hosts. The determination of the placed list of virtual machines is used to determine a power off list of virtual machines in the set of virtual machines to power off, wherein virtual machines in the power off list of virtual machines are currently powered on available hosts but were considered to be powered off to determine the placement. | 11-22-2012 |
20120311576 | SYSTEM AND METHOD FOR RESTARTING A WORKLOAD BASED ON GLOBAL LOAD BALANCING - A method for restarting a virtual machine in a virtual computing system having a plurality of hosts and a resource scheduler for the plurality of hosts includes writing a placement request for the virtual machine to a shared channel that is accessible by the resource scheduler. The method further includes reading a placement result from the shared channel, wherein the placement result is generated by the resource scheduler responsive to the placement request; and restarting the virtual machine in accordance with the placement result. | 12-06-2012 |
20130036404 | TESTING OF A SOFTWARE SYSTEM USING INSTRUMENTATION AT A LOGGING MODULE - In one embodiment, a method includes determining an instrumentation action to perform with the software program when a logging statement is encountered during execution of a software program. The instrumentation action is performed by an instrumentation service associated with a logging service and the execution of the software program is monitored based on the instrumentation action being performed. | 02-07-2013 |
20140122920 | HIGH AVAILABILITY SYSTEM ALLOWING CONDITIONALLY RESERVED COMPUTING RESOURCE USE AND RECLAMATION UPON A FAILOVER - In one embodiment, a method determines a first set of virtual machines and a second set of virtual machines. The first set of virtual machines is associated with a first priority level and the second set of virtual machines is associated with a second priority level. A first set of computing resources and a second set of computing resources are associated with hosts. Upon determining a failure of a host, the method performs: generating a power off request for one or more of the second set of virtual machines powered on the second set of computing resources and generating a power on request for one or more virtual machines from the first set of virtual machines that were powered on the failed host, the power on request powering on the one or more virtual machines from the first set of virtual machines on the second set of computing resources. | 05-01-2014 |
20140280956 | METHODS AND SYSTEMS TO MANAGE COMPUTER RESOURCES IN ELASTIC MULTI-TENANT CLOUD COMPUTING SYSTEMS - Methods and systems to reconfigure clusters in elastic multi-tenant cloud computing system. An example method includes partitioning a first resource reservation of a first virtual data center between a first cluster and a second cluster and partitioning a second resource reservation of a second virtual data center between the first cluster and the second cluster, and based on the partitioning of the first resource reservation and the second resource reservation, collectively adjusting a first portion of the first resource reservation allotted to the first cluster and a second portion of the second resource reservation allotted to the first cluster in a same reconfiguration operation. | 09-18-2014 |
20140317620 | HOST SELECTION FOR VIRTUAL MACHINE PLACEMENT - In one embodiment, a method for placing virtual machines in a collection is provided. A plurality of equivalence sets of hosts is determined prior to placing virtual machines in the collection. The hosts in an equivalence set of hosts are considered similar. An equivalence set of hosts in the plurality of equivalence sets is selected to place the virtual machines in the collection. The method then places at least a portion of the virtual machines in the collection on one or more hosts in the selected equivalence set of hosts. | 10-23-2014 |
20140344805 | Managing Availability of Virtual Machines in Cloud Computing Services - Recovery of virtual machines when one or more hosts fail includes identifying virtual machines running on the remaining functioning hosts. Some of the identified powered on virtual machines are suspended in favor of restarting some of the failed virtual machines from the failed host(s). A subsequent round of identifying virtual machines for suspension and virtual machines for restarting is performed. Virtual machines for suspension and restarting may be identified based on their associated “recovery time objective” (RTO) values or their “maximum number of RTO violations” value. | 11-20-2014 |
20150089272 | MAINTAINING HIGH AVAILABILITY OF A GROUP OF VIRTUAL MACHINES USING HEARTBEAT MESSAGES - Embodiments maintain high availability of software application instances in a fault domain. Subordinate hosts are monitored by a master host. The subordinate hosts publish heartbeats via a network and datastores. Based at least in part on the published heartbeats, the master host determines the status of each subordinate host, distinguishing between subordinate hosts that are entirely inoperative and subordinate hosts that are operative but partitioned (e.g., unreachable via the network). The master host may restart software application instances, such as virtual machines, that are executed by inoperative subordinate hosts or that cease executing on partitioned subordinate hosts. | 03-26-2015 |
20150212856 | SYSTEM AND METHOD FOR PERFORMING RESOURCE ALLOCATION FOR A HOST COMPUTER CLUSTER - A system and method for performing resource allocation for a host computer cluster uses a copy of a cluster resource allocation hierarchy of the host computer cluster to generate a host resource allocation hierarchy of a host computer in the host computer cluster. | 07-30-2015 |
20150248305 | EXTENDING PLACEMENT CONSTRAINTS FOR VIRTUAL MACHINE PLACEMENT, LOAD BALANCING MIGRATIONS, AND FAILOVER WITHOUT CODING - Techniques are described for placing virtual machines (VM) on computer hosts. In one embodiment, a user may compose a constraint specification document which includes VM and host properties and how they are retrieved, as well as constraint predicates that define valid VM placements on hosts. Use of the constraint specification document permits new constraints, including constraints that involve new properties, to be handled without requiring changing the underlying code for collecting required input data and processing said data to determine whether placement constraints are satisfied. Instead, based on the constraint specification document, a resource scheduler or high availability module may program a programmable data collector to fetch the needed properties from the appropriate places. Then, the resource scheduler or high availability module may parse the constraint predicates, evaluate potential placements to determine whether the constraint predicates are satisfied, and place VMs according to placements that satisfy the constraint predicates. | 09-03-2015 |
Henry Shu, Walnut, CA US
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20140270411 | Verification of User Photo IDs - The presence of a target object within a query image may be identified based on the spatial consistency of feature points matched between the query image and a template image describing the target object. A query image and a template image describing a target object to be sought in a query image are received. Feature points are extracted from the query image and the template image using a SIFT method. Query feature points are each matched to the nearest neighbor template feature point. A matched pair of query points is assigned a confidence indicator based on the distance between each parameter of the query feature point and template feature point. The confidence indicators are mapped within a binned four-dimensional space. If the number of confidence indicators mapped to any bin is greater than a threshold value, then the target object has been detected within the query image. | 09-18-2014 |
Henry K. Shu, Laguna Niguel, CA US
Patent application number | Description | Published |
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20090032647 | PROTECTIVE SHIELD ASSEMBLY FOR SPACE OPTICS AND ASSOCIATED METHODS - A protective shield assembly capable of being deployed from a launch vehicle is provided, and methods for assembling and deploying the protective shield assembly are also provided. The protective shield assembly includes a shroud, and a flexible sheet of material within the shroud. The flexible sheet of material is capable of substantially conforming to a contour of at least a portion of the launch vehicle to provide a protective barrier. | 02-05-2009 |
20110000065 | PROTECTIVE SHIELD ASSEMBLY FOR SPACE OPTICS AND ASSOCIATED METHODS - A protective shield assembly capable of being deployed from a launch vehicle is provided, and methods for assembling and deploying the protective shield assembly are also provided. The protective shield assembly includes a shroud, and a flexible sheet of material within the shroud. The flexible sheet of material is capable of substantially conforming to a contour of at least a portion of the launch vehicle to provide a protective barrier. | 01-06-2011 |
Hua Shu, Sunnyvale, CA US
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20100268803 | RAPID PROVISIONING OF NETWORK DEVICES USING AUTOMATED CONFIGURATION - Various exemplary embodiments relate to a method and related network node including one or more of the following: receiving a selection of a configuration template and a second network node to serve a first network node, the configuration template including at least one template field; receiving at least one value for the at least one template field of the configuration template; configuring the first network node according to the configuration template and the at least one value; receiving, in the network management system, configured device information from the first network node; using the configured device information to identify at least one configuration operation to perform on the second network node to provide connectivity to the first network node; generating at least one configuration module for performing the at least one configuration operation; and applying the at least one configuration module to the second network node. | 10-21-2010 |
20110188379 | METHOD AND APPARATUS FOR TRACING MOBILE SESSIONS - A method and apparatus for a method and apparatus for determining a path supporting a mobile session to identify the underlying transport elements supporting the path. In various embodiments mobile session tracing is implemented within a network such as a Long Term Evolution (LTE) wireless network by determining elements in a path supporting a mobile session of a user equipment (UE) having an specific identifier, such as an IP address or terminal identification number. | 08-04-2011 |
20110188384 | METHOD AND APPARATUS FOR AUDITING 4G MOBILITY NETWORKS - A method and apparatus for auditing mobile services delivery to provide a coherent, path-based awareness of the quality level of the mobile services and the corresponding underlying transport elements supporting each service or path. In various embodiments, service or connection audits triggered within a network such as a 4G Long Term Evolution (LTE) wireless network result in the execution of one or more test sequences adapted to provide service, connection or other information pertaining to the network or the supported mobile services. | 08-04-2011 |
20110188403 | METHOD AND APPARATUS FOR ANALYZING MOBILE SERVICES DELIVERY - A method and apparatus for analyzing mobile services delivery to provide a coherent, path-based awareness of the mobile services and the corresponding underlying transport elements supporting each service or path. In various embodiments, configuration information, status information and connections information associated with elements within a network such as a Long Term Evolution (LTE) wireless network are used to help infer or determine the connections between network elements to be managed. | 08-04-2011 |
20110188457 | METHOD AND APPARATUS FOR MANAGING MOBILE RESOURCE USAGE - A method and apparatus for managing network resource consumption. In various embodiments, excessive resource consumption within a network such as a Long Term Evolution (LTE) wireless network attributed to one or more user devices (UDs) is constrained by adjusting a Policy Control and Charging (PCC) rule associated with a network element serving the UD such that the corresponding network resource consumption level is reduced. | 08-04-2011 |
20110267980 | METHOD AND APPARATUS FOR HINT-BASED DISCOVERY OF PATH SUPPORTING INFRASTRUCTURE - A method and apparatus for rapidly discovering unknown or unmanaged portions of network using hints defining possible transport layer infrastructure topology and the like | 11-03-2011 |
I-Hsiang Shu, Pasadena, CA US
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20130012319 | MECHANISM FOR FACILITATING HYBRID CONTROL PANELS WITHIN GAMING SYSTEMS - A mechanism is described for facilitating hybrid control panels within gaming systems according to one embodiment of the invention. A method of embodiments of the invention includes employing one or more hybrid control panels at a computing device. The computing device may include a gaming device. The method may further include detecting user movements across a surface of each of the one or more hybrid control panels. The detecting may be performed at least in part using sensors of the hybrid control panels. The method may further include interpreting the user movements, and facilitating actions based on the interpreted user movements. | 01-10-2013 |
Jen Shu, Saratoga, CA US
Patent application number | Description | Published |
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20090311635 | DOUBLE EXPOSURE PATTERNING WITH CARBONACEOUS HARDMASK - Methods to pattern features in a substrate layer by exposing a photoresist layer more than once. In one embodiment, a single reticle may be exposed more than once with an overlay offset implemented between successive exposures to reduce the half pitch of the reticle. In particular embodiments, these methods may be employed to reduce the half pitch of the features printed with 65 nm generation lithography equipment to achieve 45 nm lithography generation CD and pitch performance. | 12-17-2009 |
20100136792 | SELF-ALIGNED MULTI-PATTERNING FOR ADVANCED CRITICAL DIMENSION CONTACTS - Embodiments of the present invention pertain to methods of forming patterned features on a substrate having a reduced pitch in two dimensions as compared to what is possible using standard photolithography processing techniques using a single high-resolution photomask. A spacer layer is formed over a two-dimensional square grid of cores with a thickness chosen to leave a dimple at the center of four cores on the corners of a square. The spacer layer is etched back to reveal the substrate at the centers of the square. Removing the core material results in double the pattern density of the lithographically defined grid of cores. The regions of exposed substrate may be filled again with core material and the process repeated to quadruple the pattern density. | 06-03-2010 |
20110136286 | METHOD OF CLEANING AND FORMING A NEGATIVELY CHARGED PASSIVATION LAYER OVER A DOPED REGION - The present invention generally provides a method of forming a high efficiency solar cell device by preparing a surface and/or forming at least a part of a high quality passivation layer on a silicon containing substrate. Embodiments of the present invention may be especially useful for preparing a surface of a p-type doped region formed on a silicon substrate so that a high quality passivation layer can be formed thereon. In one embodiment, the methods include exposing a surface of the solar cell substrate to a plasma to clean and modify the physical, chemical and/or electrical characteristics of the surface. | 06-09-2011 |
20110287577 | METHOD OF CLEANING AND FORMING A NEGATIVELY CHARGED PASSIVATION LAYER OVER A DOPED REGION - The present invention generally provides a method of forming a high efficiency solar cell device by preparing a surface and/or forming at least a part of a high quality passivation layer on a silicon containing substrate. Embodiments of the present invention may be especially useful for preparing a surface of a p-type doped region formed on a silicon substrate so that a high quality passivation layer can be formed thereon. In one embodiment, the methods include exposing a surface of the solar cell substrate to a plasma to clean and modify the physical, chemical and/or electrical characteristics of the surface. | 11-24-2011 |
20130288424 | CONTACT AND INTERCONNECT METALLIZATION FOR SOLAR CELLS - A fabrication line includes a texturizing module configured to texture a substrate, an emitter module configured to form an emitter region, a passivation layer module configured to form a passivation layer, a barrier contact module configured to form a barrier contact region, a firing module configured to anneal the barrier contact region, a top metal contact module configured to form a top metal contact region, and a soldering module configured to solder the barrier contact region to the top metal contact region. The modules are integrated by one or more automated substrate handlers into a single fabrication line. A method for fabricating a solar cell includes sequentially, in an automated fabrication line: doping a dopant in a substrate; disposing a passivation layer; disposing and annealing a barrier metal paste to form a barrier contact; and disposing and annealing a metal contact paste to form a top metal contact region. | 10-31-2013 |
Jenny Shu, Los Angeles, CA US
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20110129850 | MICROFLUIDIC PLATFORM FOR CELL CULTURE AND ASSAY - A microfluidic chip for at least one of cell culturing and cell assay has a cell culture chamber defined by the microfluidic chip, a first microchannel defined by the microfluidic chip and constructed to provide a fluid path to said cell culture chamber, the microchannel having a pneumatic valve formed therein to permit selective opening and closing of a fluid path to said cell culture chamber, and a second microchannel defined by the microfluidic chip and constructed to provide a fluid path from the cell culture chamber. | 06-02-2011 |
Jesse Shu, Palo Alto, CA US
Jesse C. Shu, Palo Alto, CA US
Patent application number | Description | Published |
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20110069663 | INTERCEPTING GPRS DATA - GPRS Tunneling Protocol (“GTP”) packets are intercepted by receiving a GTP tunnel packet, determining whether the GTP tunnel packet is to be intercepted, intercepting GTP tunnel packets if it is determined that the GTP tunnel packet is to be intercepted, and processing the intercepted GTP tunnel packets. Multiple tunnels may be intercepted simultaneously and GTP tunnel packets from different tunnels may be processed differently. Implementations include both inline and offline interception of GTP traffic between SGSN and GGSN. | 03-24-2011 |
20140321278 | SYSTEMS AND METHODS FOR SAMPLING PACKETS IN A NETWORK FLOW - A method for sampling packets for a network flow, includes: receiving a packet at a network port of a network switch appliance, the network switch appliance comprising an instrument port for communication with a network monitoring instrument; determining whether the packet belongs to a network flow that is desired to be monitored, wherein the act of determining is performed based at least in part on one or more information in a control plane using a processing unit; and passing the packet to the instrument port if the packet belongs to the network flow. | 10-30-2014 |
Jessica Shu, San Francisco, CA US
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20130121917 | Lipid-Peptide-Polymer Conjugates and Nanoparticles Thereof - The present invention provides a conjugate having a peptide with from about 10 to about 100 amino acids, wherein the peptide adopts a helical structure. The conjugate also includes a first polymer covalently linked to the peptide, and a hydrophobic moiety covalently linked to the N-terminus of the peptide, wherein the hydrophobic moiety comprises a second polymer or a lipid moiety. The present invention also provides helix bundles form by self-assembling the conjugates, and particles formed by self-assembling the helix bundles. Methods of preparing the helix bundles and particles are also provided. | 05-16-2013 |
John Yanjiang Shu, Livermore, CA US
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20090024347 | Thermal Simulation Using Adaptive 3D and Hierarchical Grid Mechanisms - A thermally aware design automation suite integrates system-level thermal awareness into design of semiconductor chips, performing fine-grain static and/or transient thermal simulations of the chips based on thermal models and boundary conditions. The thermal simulations are performed in accordance with one or more grids, with boundaries and/or resolutions being determined by adaptive and/or hierarchical multi-dimensional techniques. The adaptive grid techniques include material-boundary, rate-of-change, and convergence-information heuristics. For example, a finer grid is used in a region having higher temperature gradients compared to a region having lower temperature gradients. The hierarchical grid techniques are based on critical, intermediate, and boundary regions specified manually or automatically, each region having a respective grid resolution. For example, a critical region is analyzed according to a grid that is finer than a grid of an intermediate region, and resolution of a grid of a boundary region is adapted to boundary conditions. | 01-22-2009 |
Leelean Shu, Los Altos, CA US
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20130148414 | SYSTEMS AND METHODS OF SECTIONED BIT LINE MEMORY ARRAYS - A sectioned bit line of an SRAM memory device, an SRAM memory device having a sectioned bit line, and associated systems and methods are described. In one illustrative implementation, the sectioned bit line may comprise a local bit line, a memory cell connected to the local bit line, and a pass gate coupled to the local bit line, wherein the pass gate is configured to be coupled to a global bit line. In other implementations, an SRAM memory device may be configured involving sectioned bit lines and a global bit line wherein the pass gates are configured to connect and isolate the sectioned bit line and the global bit line. | 06-13-2013 |
20130148415 | SYSTEMS AND METHODS OF SECTIONED BIT LINE MEMORY ARRAYS, INCLUDING HIERARCHICAL AND/OR OTHER FEATURES - A hierarchical sectioned bit line of an SRAM memory device, an SRAM memory device having a sectioned bit line in hierarchy, and associated systems and methods are described. In one illustrative implementation, each sectioned bit line may comprise a local bit line, a memory cell connected to the local bit line, and a pass gate coupled to the local bit line, wherein the pass gate is configured to be coupled to a global bit line, and wherein the sectioned bit lines are arranged in hierarchical arrays. In other implementations, a hierarchical SRAM memory device may be configured involving sectioned bit lines and a global bit line wherein the pass gates are configured to connect and isolate the sectioned bit line and the global bit line. | 06-13-2013 |
Lee-Lean Shu, Los Altos, CA US
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20140219011 | SYSTEMS AND METHODS OF SECTIONED BIT LINE MEMORY ARRAYS, INCLUDING HIERARCHICAL AND/OR OTHER FEATURES - A sectioned bit line of an SRAM memory device, an SRAM memory device having a sectioned bit line, and associated systems and methods are described, including embodiments having sectioned bit lines with hierarchical aspects. In one illustrative implementation, each sectioned bit line may comprise a local bit line, a memory cell connected to the local bit line, and a pass gate coupled to the local bit line, wherein the pass gate is configured to be coupled to a global bit line. Further, in some embodiments, the sectioned bit lines are arranged in hierarchical arrays. In other implementations, SRAM memory devices may be configured involving sectioned bit lines (including hierarchical) and a global bit line wherein the pass gates are configured to connect and isolate the sectioned bit line and the global bit line. | 08-07-2014 |
20140286083 | SYSTEMS AND METHODS OF PIPELINED OUTPUT LATCHING INVOLVING SYNCHRONOUS MEMORY ARRAYS - Systems and methods of synchronous memories and synchronous memory operation are disclosed. According to one illustrative implementation, a memory device is disclosed comprising memory circuitry having a memory output, the memory circuitry including a sense amplifier having a first output and a second output, a first data path coupled to the first output of the sense amplifier, the first data path including 2 latches/registers, and a second data path coupled to the second output of the sense amplifier, the second data path including a plurality latches/registers. In further implementations, various control circuitry, connections and control signals may be utilized to operate the latches/registers in the first and second data paths according to specified configurations, control, modes, latency and/or timing domain information, to achieve, for example, pipelined output latching and/or double data rate output. | 09-25-2014 |
20140289440 | SYSTEMS AND METHODS INVOLVING DATA BUS INVERSION MEMORY CIRCUITRY, CONFIGURATION AND/OR OPERATION - Systems, methods and fabrication processes relating to memory devices involving data bus inversion are disclosed. According to one illustrative implementation, a memory device may comprise a memory core, circuitry that receives a data bus inversion (DBI) bit associated with a data signal as input directly, without transmission through DBI logic associated with an input buffer, and circuitry that stores the DBI bit into the memory core, reads the DBI bit from the memory core, and provides the DBI bit as output. In further implementations, memory devices herein may store and process the DBI bit on an internal data bus as a regular data bit. | 09-25-2014 |
20140289460 | SYSTEMS AND METHODS INVOLVING DATA BUS INVERSION MEMORY CIRCUITRY, CONFIGURATION AND/OR OPERATION INCLUDING DATA SIGNALS GROUPED INTO 10 BITS AND/OR OTHER FEATURES - Systems, methods and fabrication processes relating to dynamic random access memory (DRAM) devices involving data signals grouped into 10 bits are disclosed. According to one illustrative implementation a DRAM device may comprise a memory core, circuitry that receives a data bus inversion (DBI) bit associated with a data signal as input directly, without transmission through DBI logic associated with an input buffer, circuitry that stores the DBI bit into the memory core, reads the DBI bit from the memory core, and provides the DBI bit as output. In further implementations, DRAM devices herein may store and process the DBI bit on an internal data bus as a regular data bit. | 09-25-2014 |
20150357027 | Systems and Methods Involving Multi-Bank Memory Circuitry - Multi-bank SRAM devices, systems, methods of operating multi-bank SRAMs, and/or methods of fabricating multi-bank SRAM systems are disclosed. For example, illustrative multi-bank SRAMs and methods may include or involve features for capturing read and write addresses at a particular frequency, splitting and/or combining them via one or more splitting/combining processes, and bussing them to each SRAM bank, where they may be split and/or combined via one or more splitting/combining processes to read and write to a particular bank. Some implementations herein may also involve features for capturing two beats of write data at a particular frequency, splitting and/or combining them via one or more splitting/combining processes, and bussing them to each SRAM bank, where they may be split and/or combined via one or more splitting/combining processes for writing to a particular bank. Reading and writing to banks may occur at less than or equal to half the frequency of capture. | 12-10-2015 |
20150357028 | Systems and Methods Involving Multi-Bank, Dual-Pipe Memory Circuitry - Multi-bank, dual-pipe SRAM systems, methods, processes of operating such SRAMs, and/or methods of fabricating multi-bank, dual-pipe SRAM are disclosed. For example, one illustrative multi-bank, dual-pipe SRAM may comprise features for capturing read and write addresses, splitting and/or combining them via one or more splitting/combining processes, and/or bussing them to the SRAM memory banks, where they may be read and written to a particular bank. Illustrative multi-bank, dual-pipe SRAMs and methods herein may also comprise features for capturing two beats of write data, splitting and/or combining them via one or more splitting/combining processes, and bussing them to each SRAM bank, where they may be split/combined/recombined via one or more processes to write data to particular memory bank(s). | 12-10-2015 |
20160005458 | Systems and Methods of Sectioned Bit Line Memory Arrays, Including Hierarchical and/or Other Features - A sectioned bit line of an SRAM memory device, an SRAM memory device having a sectioned bit line, and associated systems and methods are described, including embodiments having sectioned bit lines with hierarchical aspects. In one illustrative implementation, each sectioned bit line may comprise a local bit line, a memory cell connected to the local bit line, and a pass gate coupled to the local bit line, wherein the pass gate is configured to be coupled to a global bit line. Further, in some embodiments, the sectioned bit lines are arranged in hierarchical arrays. In other implementations, SRAM memory devices may be configured involving sectioned bit lines (including hierarchical) and a global bit line wherein the pass gates are configured to connect and isolate the sectioned bit line and the global bit line. | 01-07-2016 |
Li Shu, Arcadia, CA US
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20110027546 | Label assembly and method of using the same to label articles durably yet removably - A label assembly and method of using the same to label articles durably, yet removably. In one embodiment, the label assembly is used to label fabric articles, such as clothing, and comprises (a) an image forming laminate for forming an image on the fabric article, the image forming laminate comprising an ink layer, the ink layer being bondable to the fabric article; and (b) an image removing laminate for removing the image from the fabric article, the image removing laminate comprising a remover layer, the remover layer, upon being activated by heat and/or light, being bondable to the ink layer of the image forming laminate; (c) whereby, upon bonding of the image removing laminate to the ink layer, the bonding between the image removing laminate and the ink layer is stronger than the bonding between the ink layer and the fabric article. | 02-03-2011 |
20110079651 | Method for labeling fabrics and heat-transfer label well-suited for use in said method - A method for labeling fabrics, such as fabric garments, and a heat-transfer label well-suited for use in the method. In one embodiment, the heat-transfer label includes (a) a support portion; and (b) a transfer portion, the transfer portion being positioned over the support portion for transfer of the transfer portion from the support portion to an article of fabric under conditions of heat and pressure, the transfer portion including (i) an ink design layer; (ii) a heat-activatable adhesive layer; and (iii) an RFID device. | 04-07-2011 |
20110308718 | Label assembly and method of using the same to label articles durably yet removably - A label assembly and method of using the same to label articles durably, yet removably. In one embodiment, the label assembly is used to label fabric articles, such as clothing, and comprises (a) an image forming laminate for forming an image on the fabric article, the image forming laminate comprising an ink layer, the ink layer being bondable to the fabric article; and (b) an image removing laminate for removing the image from the fabric article, the image removing laminate comprising a remover layer, the remover layer, upon being activated by heat and/or light, being bondable to the ink layer of the image forming laminate; (c) whereby, upon bonding of the image removing laminate to the ink layer, the bonding between the image removing laminate and the ink layer is stronger than the bonding between the ink layer and the fabric article. | 12-22-2011 |
20120298293 | LABEL ASSEMBLY AND METHOD OF USING THE SAME TO LABEL ARTICLES DURABLY YET REMOVABLY - A label assembly and method of using the same to label articles durably, yet removably. In one embodiment, the method includes providing an image removing laminate. The image removing laminate includes (i) a remover support, and (ii) a remover layer secured to the remover support, the remover layer, upon being activated by at least one of heat and light, being bondable to an ink image on a garment in such a way that the bonding between the remover layer and the ink image is stronger than the bonding between the ink image and the garment. The method then includes bonding the remover layer of the image removing laminate to the ink image on the garment and, then, detaching the ink image from the garment by separating the image removing laminate away from the garment. | 11-29-2012 |
20140110042 | HEAT-TRANSFER LABEL WELL-SUITED FOR LABELING FABRICS AND METHODS OF MAKING AND USING THE SAME - A method for labeling fabrics, such as fabric garments, and a heat-transfer label well-suited for use in said method. In one embodiment, the heat-transfer label comprises (i) a support portion, the support portion comprising a carrier and a release layer; (ii) a wax layer, the wax layer overcoating the release layer; and (iii) a transfer portion, the transfer portion comprising an adhesive layer printed onto the wax layer and an ink design layer printed onto the adhesive layer. Preferably, at least a portion of the ink design layer is printed using a variable printing technique, such as thermal transfer printing. | 04-24-2014 |
Mark Shu, Rancho Santa Margarita, CA US
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20110190878 | Suture Locking Assembly and Method of Use - A suture locking assembly for use with a heart valve repair device. The suture locking assembly including a rim and a suture band. The rim defines a first flange and a second flange spaced from the first flange. The rim is configured to extend at least partially around a periphery of the heart valve repair device. The suture band is maintained between the first flange and the second flange. The suture locking assembly is configured to securely maintain a suture segment that is pulled from a first position to a second position relative the suture locking assembly, the second position being at least partially defined near an outer periphery of the rim. | 08-04-2011 |
Mark C.s. Shu, Rancho Santa Margarita, CA US
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20130103141 | Pharmacological Delivery Implement for Use with Cardiac Repair Devices - A pharmacological delivery implement for use with cardiac repair devices. The pharmacological delivery implement comprises a porous member defining an outer surface, an internal channel configured to selectively house a pharmacological agent, and a plurality of release holes each extending from the outer surface to the internal channel. Following implantation of the pharmacological delivery implement, at least a portion of the pharmacological agent exits the internal channel through the plurality of release holes. | 04-25-2013 |
20140371783 | EMBOLI GUARDING DEVICE - A device including a stent structure or frame to which a sheet is attached for use in minimizing or preventing emboli, particles, and/or air bubbles from migrating into certain areas of the anatomy. The device can be placed in the blood stream in an area of the heart, such as the aortic arch, to direct particles toward the descending aorta rather than toward the brain. The sheet of the device can be a thin film material, which may include multiple fenestrations that are smaller in size than the particles that are to be filtered. | 12-18-2014 |
Mark C. S. Shu, Rancho Santa Margarita, CA US
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20100076482 | EMBOLI GUARDING DEVICE - A device including a stent structure or frame to which a sheet is attached for use in minimizing or preventing emboli, particles. and/or air bubbles from migrating into certain areas of the anatomy. The device can be placed in the blood stream in an area of the heart, such as the aortic arch, to direct particles toward the descending aorta rather than toward the brain. The sheet of the device can be a thin film material, which may include multiple fenestrations that are smaller in size than the particles that are to be filtered. | 03-25-2010 |
Michelle Liu Shu, Saratoga, CA US
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20110190056 | Motion-Sensing Controller, Related Apparatus and Methods - Improved motion-sensing controllers of the invention comprise: a base that allows the motion-sensing controller to transmit any necessary signals remotely; at least one primary button configured for continual actuation of the motion-sensing controller upon being pressed and released; and, optionally, at least one auxiliary button. A motion-sensing controller apparatus of the invention comprises: a case for insertion of a motion-sensing controller therein; at least one retainer capable of securing the motion-sensing controller in the case; optionally, at least one retainer button coupled to the retainer for mechanically facilitating continual and/or momentary actuation of the motion-sensing controller; optionally, at least one connector mechanically coupled to the case for attaching the case to at least one piece of simulated sports, recreation, or similar equipment or portion thereof; and, optionally, at least one retaining clip mechanically coupled to the case for attaching the apparatus to at least one piece of actual sports, recreation, or similar equipment. Various embodiments of apparatus of the invention comprise different combinations and details of such components. Assemblies of the invention comprise such apparatus attached to at least one piece of actual or simulated sports, recreation, or similar equipment or portion thereof. Methods of using controllers and assemblies of the invention to play video games are also disclosed. | 08-04-2011 |
Paul Shu, Sunol, CA US
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20140177777 | STARTUP/SHUTDOWN HYDROGEN INJECTION SYSTEM FOR BOILING WATER REACTORS (BWRS), AND METHOD THEREOF - A system and a method for injecting hydrogen into Boiling Water Reactor (BWR) reactor support systems in operation during reactor startup and/or shutdown to mitigate Inter-Granular Stress Corrosion Cracking (IGSCC). The system may provide hydrogen at variable pressures (including relatively higher pressures) that match changing operating pressures of the reactor supports systems as the reactor cycles through startup and shutdown modes. | 06-26-2014 |
Paul Shu, Fremont, CA US
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20130288747 | PERSONAL COMPUTER WITH DETACHABLE WIRELESS TELEPHONE - A Subscriber Identification Module (SIM) card enclosure is formed with an internal cavity adapted to receive a SIM card and a cellular transceiver. A wireless telephone is adapted for docking with the SIM card enclosure. A personal computer includes a docking receptacle for holding the SIM card enclosure and wireless telephone. The personal computer may communicate over a cellular telephone network when the SIM card enclosure is docked to the personal computer. The wireless telephone may conduct voice calls over a wireless link with the personal computer when the wireless telephone is undocked from both the personal computer and SIM card enclosure. The wireless telephone may communicate over a cellular telephone network when the SIM card enclosure is docked to the wireless telephone. Voice communications between the wireless telephone and personal computer may be conducted concurrently with data communications between the personal computer and the cellular telephone network. | 10-31-2013 |
Paul Y. Shu, San Jose, CA US
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20090154636 | Chemical injection system and chemical delivery process/method of injecting into an operating power reactor - An injection system designed to deliver a chemical solution into a reactor through feedwater system taps during normal operating condition of a power reactor is disclosed. The process of delivery is via positive displacement pumps. Injection of chemical is in a concentrated solution form, which is internally diluted by the system prior to discharging from the skid. The injection system minimizes chemical loss due to deposition on the transit line, enables a higher concentrated solution to be used as the injectant, eliminates the time consuming laborious process of chemical dilution, raises chemical solution to the pressure required for injection, prevents solid precipitations out of solution at the injection pump head through the use of a flush solution, and deposits fresh chemical on new crack surfaces that develop during a power reactor start-up, shutdown and operation. | 06-18-2009 |
20110158879 | METHODS OF CONTROLLING HYDROGEN CONCENTRATIONS IN AN OFFGAS SYSTEM OF A NUCLEAR REACTOR BY PASSIVE AIR INJECTION - Example embodiments relate to methods of controlling hydrogen concentrations in an offgas system of a nuclear reactor by passive air injection. A method according to a non-limiting embodiment may include passively injecting ambient air through the hydrogen water chemistry system into an existing offgas line of the offgas system. The offgas line is configured to transport non-condensable gases, including hydrogen, from a condenser to a recombiner. As a result of the passive air injection, the combined flow of hydrogen and oxygen react in the recombiner to form water vapor, thereby reducing the hydrogen concentration of the offgas exiting the recombiner. | 06-30-2011 |
Qi-Ze Shu, Cupertino, CA US
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20090190623 | EXTERNAL-CAVITY OPTICALLY-PUMPED SEMICONDUCTOR-LASER WITH A RESONATOR STOP - An optically pumped semiconductor-laser (OPS-laser) resonator includes an arrangement for delivering optical pump radiation on an OPS-chip to cause fundamental radiation to circulate in the resonator. The resonator includes second and third-harmonic generating crystals and is arranged deliver third-harmonic radiation. The resonator also includes a stop positioned and configured to stabilize the laser output. The pump radiation arrangement delivers the pump radiation at an angle to the resonator axis and includes wedged GRIN lens arranged such that the pump radiation forms a circular spot on the OPS chip. The third harmonic generating crystal acts as a polarizer for the fundamental radiation and angularly separates fundamental and third harmonic beams. | 07-30-2009 |
20120257647 | COOLING APPARATUS FOR OPTICALLY PUMPED SEMICONDUCTOR LASER - An OPS-chip is soldered mirror-structure-side down on an upper surface of diamond-heat spreader. A metal frame is also soldered to the upper surface of the heat-spreader. The lower surface of the diamond heat-spreader is either soldered to, or clamped against, a surface of a heat-sink. The dimensions of the frame and the heat spreader are selected such that at a solidification temperature of the solder at the center of the upper surface of the heat-spreader has an effective CTE comparable with that of the OPS-chip. The lower surface of the heat-spreader can be soldered to the heat sink surface or clamped against the heat-sink surface by the frame. | 10-11-2012 |
20140016657 | MULTI-CHIP OPS-LASER - A two-chip OPS laser includes first and second OPS-chips each emitting the same fundamental wavelength in first and second resonators. The first and second resonators are interferometrically combined on a common path terminated by a common end-mirror. The interferometric combination provides for automatic wavelength-locking of the laser, which can eliminate the need for a separate wavelength selective device in the laser. | 01-16-2014 |
Stephanie Shu, Davis, CA US
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20100266717 | CHEMICAL AND BIOLOGICAL AGENTS FOR THE CONTROL OF MOLLUSCS - Compositions and methods for controlling molluscs, members of the Gastropoda and Bivalvia classes which includes but is not limited to lactones, lactams, carbamates, amides, and/or carboxylic acid containing compounds as active ingredients and/or compounds derived from | 10-21-2010 |
Stephen K. Shu, Irvine, CA US
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20120130484 | ARTIFICIAL HEART - Disclosed herein is a fully implantable artificial heart. The use of flat helical springs to align and reciprocate a bellows structure allows the bellows to pump blood, the multiple solenoids with floating magnetized rods and permanent magnet assemblies held by the flat helical springs provide the power. The artificial heart pumps blood with virtually no friction and no parts to wear out. The use of solenoids advantageously move blood in a gentle, controllable manner. | 05-24-2012 |
20130231738 | ARTIFICIAL HEART - Disclosed herein is a fully implantable artificial heart. The use of flat helical springs to align and reciprocate a bellows structure allows the bellows to pump blood, the multiple solenoids with floating magnetized rods and permanent magnet assemblies held by the flat helical springs provide the power. The artificial heart pumps blood with virtually no friction and no parts to wear out. The use of solenoids advantageously move blood in a gentle, controllable manner. | 09-05-2013 |
Tzi-Hsiung Shu, San Jose, CA US
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20090318095 | DC Offset Calibration for a Radio Transceiver Mixer - An apparatus, method, and system for DC offset cancellation are provided herein. For instance, the apparatus can include a first commutating mixer switch and a second commutating mixer switch. The first commutating mixer switch can have a first input port configured to receive a first differential signal and a first differential output port. The second commutating mixer switch can have a second input port configured to receive a second differential offset signal and a second differential output port. The first and second differential output ports can be coupled to one another to provide a combined differential output signal. | 12-24-2009 |
Victor Shu, Tustin, CA US
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20110099061 | PRODUCT DISPLAY AND PROCESS FOR SUGGESTING RELATED PRODUCTS - A product display unit may include a display device and a sensor to identify a product selected for purchase by a customer. Information relating to at least one related product suggested for use with the selected product may be presented on the display device. Other embodiments are disclosed herein. | 04-28-2011 |
Wei Shu, Emery Ville, CA US
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20100048561 | QUINAZOLINES FOR PDK1 INHIBITION - The invention provides quinazoline compounds that are inhibitors of PDK1. Also provided are pharmaceutical compositions including the compounds, and methods of treating proliferative diseases, such as cancers, with the compounds or compositions. | 02-25-2010 |
Wei Shu, Emeryville, CA US
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20100216767 | QUINAZOLINES FOR PDK1 INHIBITION - The invention provides novel compounds that are inhibitors of PDK1. Also provided are pharmaceutical compositions including the compounds, and methods of treating proliferative diseases, such as cancers, with the compounds or compositions. | 08-26-2010 |
William Shu, Palo Alto, CA US
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20080197878 | ENHANCED FIELD PROGRAMMABLE GATE ARRAY - An enhanced performance field programmable gate array integrated circuit comprises a field programmable gate array and other functional circuitry such as a mask-programmable gate array in the same integrated circuit. A circuit interface provides communication between the field programmable gate array, the mask-programmable gate array and the integrated circuit I/O. | 08-21-2008 |
20100244894 | ENHANCED FIELD PROGRAMMABLE GATE ARRAY - An enhanced performance field programmable gate array integrated circuit comprises a field programmable gate array and other functional circuitry such as a mask-programmable gate array in the same integrated circuit. A circuit interface provides communication between the field programmable gate array, the mask-programmable gate array and the integrated circuit I/O. | 09-30-2010 |
20110234258 | ENHANCED FILED PROGRAMMABLE GATE ARRAY - An enhanced performance field programmable gate array integrated circuit comprises a field programmable gate array and other functional circuitry such as a mask-programmable gate array in the same integrated circuit. A circuit interface provides communication between the field programmable gate array, the mask-programmable gate array and the integrated circuit I/O. | 09-29-2011 |
William Chiu-Ting Shu, Palo Alto, CA US
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20100281444 | MULTIPLE-POWER-DOMAIN STATIC TIMING ANALYSIS - Embodiments of a computer system, a method, an integrated circuit and a computer-program product (i.e., software) for use with the computer system are described. These devices and techniques may be used to perform STA for circuits that include multiple power domains. Power-domain crossing information and optionally the delay in each power domain can be propagated during the full circuit graph-based STA to accurately perform STA without enumerating all paths. Some embodiments can use a tag-based engine to track power-domain crossing(s) during graph-based STA. If a power-domain is crossed in a path, pessimism may be added to the cumulative delay at the end point of the path. For those paths that do not cross a power domain, pessimism may be removed from the cumulative delay at their end points. In some embodiments, pessimism may be removed from the cumulative delay at end points for paths that cross power domains. | 11-04-2010 |
20110185335 | DETERMINING AN ORDER FOR VISITING CIRCUIT BLOCKS IN A CIRCUIT DESIGN FOR FIXING DESIGN REQUIREMENT VIOLATIONS - Some embodiments of the present invention provide techniques and systems for determining an order for visiting circuit blocks of a circuit design for fixing design requirement violations. Fixing design requirement violations by visiting circuit blocks in this order can improve performance and quality of results. During operation, a system can determine a set of equal value segments in the circuit design. In some embodiments, the system determines equal value segments for multiple corners and combines the equal value segments to obtain the set of equal value segments. Next, the system can determine an order for visiting circuit blocks of the circuit design for fixing design requirement violations based at least on the set of equal value segments. Note that circuit block pins in an equal value segment are associated with the same parameter value, and parameter values indicate an amount or degree of a design requirement violation. | 07-28-2011 |
20120131525 | METHOD AND APPARATUS FOR FIXING DESIGN REQUIREMENT VIOLATIONS IN MULTIPLE MULTI-CORNER MULTI-MODE SCENARIOS - Systems and techniques for fixing design requirement violations in a circuit design in multiple scenarios are described. During operation, a system can receive a scenario image and a multi-scenario ECO database. The scenario image can store parameter values for circuit objects in a scenario, and the multi-scenario ECO database can store a subset of parameter values for a subset of circuit objects in multiple scenarios. Next, the system can determine an engineering change order to fix one or more design requirement violations, which can involve estimating parameter values for circuit objects in multiple scenarios using parameter values stored in the scenario image and the multi-scenario ECO database. | 05-24-2012 |
William C.t. Shu, Palo Alto, CA US
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20080204074 | DEDICATED INTERFACE ARCHITECTURE FOR A HYBRID INTEGRATED CIRCUIT - An interface design for a hybrid IC that utilizes dedicated interface tracks to allow signals to interface distributively with the logic blocks of the FPGA portion providing for faster and more efficient communication between the FPGA and ASIC portions of the hybrid IC. | 08-28-2008 |
William Kuang-Hue Shu, Sunnyvale, CA US
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20080202799 | EMBEDDING AN ELECTRONIC COMPONENT BETWEEN SURFACES OF A PRINTED CIRCUIT BOARD - A pre-drilled hole, providing a passageway between an upper and a lower surface of a printed circuit board layer, receives a passive component, for example a resistor or a capacitor. In one embodiment the component is cylindrical, with an electrically conductive contact point at each end. The hole diameter is approximately the same as the diameter of the cylindrical component. The hole is similar to a via in a printed circuit board, except that the hole is not plated through (such would cause an electrical short). Electrically conductive lines are provided to the openings of the hole on the upper and the lower surfaces of the PCB. The area of the exposed end of the cylindrical component and the termination of the conducting line is less than the area of a surface mounted component equivalent to the cylindrical component. In some embodiments the hole and inserted component are located directly below a pin pad for a surface mounted device, for example an integrated circuit, providing the equivalent of zero wire and line lengths with no net increase in printed circuit board area. | 08-28-2008 |
20080206927 | ELECTRONIC COMPONENT STRUCTURE AND METHOD OF MAKING - An external component, typically a surface mount passive, is attached to a semiconductor die. In some embodiments the passive is placed directly over exposed pads on the semiconductor die and attached using conductive tape or conductive epoxy. In some embodiments the passive is attached to the semiconductor die using non-conductive adhesive and wire bonded to bond pads on the semiconductor die and/or to pads on a substrate to which the semiconductor die is attached. | 08-28-2008 |
Xianbiao Shu, San Diego, CA US
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20150030247 | SYSTEM AND METHOD OF CORRECTING IMAGE ARTIFACTS - Certain aspects relate to systems and techniques for correction of color artifacts including both color aberration and color spot artifacts using a unified framework. For example, both color aberration and color spot artifacts can be corrected using a post-processing method implementing directional median filtering on chroma channels. A pixel-by-pixel correction ratio map can be built by analyzing the luma and chroma components of the image to indicate a type of color artifact associated with each pixel in the image, and a directional median filter can be selected for each pixel based on the corresponding correction ratio map value. | 01-29-2015 |
20150042844 | DYNAMIC COLOR SHADING CORRECTION - Certain embodiments relate to systems and methods for dynamic color shading correction, which can estimate the color shading in a captured image on the fly. The color shading may be estimated from the scene statistics of the captured image, and the estimated shading may be used for color shading correction. The color shading estimation method may separate out the color shading component from the actual image content by its unique characteristic in the gradient domain. | 02-12-2015 |
Xiaokun Shu, San Francisco, CA US
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20150353609 | MONOMERIC AND BRIGHT INFRARED FLUORESCENT PROTEINS - The invention described herein features variants related to infrared fluorescent proteins, in particular to mutants of a phytochrome from the bacterium | 12-10-2015 |
Xiaokun Shu, San Diego, CA US
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20110177003 | PROTEINS THAT FLUORESCE AT INFRARED WAVELENGTHS OR GENERATE SINGLET OXYGEN UPON ILLUMINATION - This invention provides novel truncation mutants of a phytochrome from the bacterium | 07-21-2011 |
20130330718 | PROTEINS THAT EFFICIENTLY GENERATE SINGLET OXYGEN - The present invention provides miniSOG proteins, polynucleotides, and methods of use. When expressed in a bacterial or mammalian cell, miniSOG proteins spontaneously incorporate flavin mononucleotide and produce fluorescence and singlet oxygen upon excitation. Uses include optical and electron microscope imaging, in vivo imaging, detection and localization of protein-protein interactions, and photoablation. | 12-12-2013 |
Xuan Shu, San Francisco, CA US
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20130118944 | PACKAGING FOR HEADPHONES, PACKAGED HEADPHONES, AND RELATED METHODS - Packaging inserts for headphones include a unitary body having two or more integral portions configured to fold relative to one another so as to partially enclose, support, and retain a headphone within the folded unitary body between the integral portions. Methods of packaging headphones include positioning a headphone on such a unitary body, and folding the unitary body around at least a portion of the headphones. Packaged headphone assemblies include a headphone, and such a packaging insert folded around at least a portion of the headphone. | 05-16-2013 |