Patent application number | Description | Published |
20080303567 | DELAY LOCKED LOOP CIRCUIT - A delay element generates a delayed clock signal which transitions with a delay from a rising (or falling) of a reference clock signal by a delay amount determined based on an output of a loop filter. A signal generation circuit generates two signals which complementarily change according to rising and falling of the reference clock signal and a transition of the delayed clock signal. A charge pump circuit performs on the loop filter, according to these two signals, a push (or pull) operation during an interval extending from a rising (or falling) of the reference clock signal to the transition of the delayed clock signal and a pull (or push) operation during an interval extending from the transition of the delayed clock signal to a falling (or rising) of the reference clock signal. | 12-11-2008 |
20080315933 | PULSE SYNTHESIS CIRCUIT - A high-level period of each of n first pulse signals partially or wholly overlaps a period during which all of n second pulse signals are at the low level. A high-level period of each of the n second pulse signals partially or wholly overlaps a period during which all of the n first pulse signals are at the low level. Each of n first drive transistors includes a source connected to a ground node, a drain connected to a first node, and a gate receiving a corresponding one of the first pulse signals. Each of n second drive transistors includes a source connected to the ground node, a drain connected to a second node, and a gate receiving a corresponding one of the second pulse signals. A current mirror circuit allows a current corresponding to a current flowing through the second node to flow through the first node. | 12-25-2008 |
20090040089 | A-TO-D CONVERTER - A successive approximation type A-to-D converter includes a cyclic D-to-A converter ( | 02-12-2009 |
20090134931 | MULTIPHASE LEVEL SHIFT SYSTEM - Each of n level shifters (LS | 05-28-2009 |
20090167400 | DEVICE AND METHOD FOR GENERATING CLOCK SIGNAL - In a device for generating a clock signal having a desired phase from input multi-phase clock signals, an intermediate clock generator generates, by using one of the input multi-phase clock signals as a reference clock signal, multi-phase intermediate clock signals in which one cycle is equal to a plurality of cycles of the reference clock signal. A first phase selector selects one of the multi-phase intermediate clock signals. A second phase selector selects one of the multi-phase clock signals. A latch circuit latches the intermediate clock signal selected by the first phase selector with the clock signal selected by the second phase selector. | 07-02-2009 |
20090237281 | A/D CONVERTER - An A/D converter includes: a plurality of A/D conversion circuits ( | 09-24-2009 |
20090278614 | PHASE SYNCHRONIZING CIRCUIT - A constant determination unit ( | 11-12-2009 |
20100149010 | PIPELINED AD CONVERTER - A pipelined AD converter ( | 06-17-2010 |
20100182181 | A-TO-D CONVERTER - A successive approximation type A-to-D converter includes a cyclic D-to-A converter ( | 07-22-2010 |
20100225518 | DIGITAL/ANALOG CONVERTER CIRCUIT - A selection section ( | 09-09-2010 |
20100271142 | COUPLED RING OSCILLATOR AND METHOD FOR LAYING OUT THE SAME - A coupled ring oscillator includes n ring oscillators ( | 10-28-2010 |
20110018752 | FLASH A/D CONVERTER, FLASH A/D CONVERSION MODULE, AND DELTA-SIGMA A/D CONVERTER - In a flash A/D converter, a predictor predicts next analog input data based on a digital output signal from an A/D converter, and outputs prediction data. Based on the prediction data from the predictor, a controller turns on comparators having reference voltages near the prediction data, and in order to ensure a certain degree of A/D conversion accuracy even when the prediction fails, also turns on even-numbered comparators | 01-27-2011 |
20110050476 | INTEGRATOR, RESONATOR, AND OVERSAMPLING A/D CONVERTER - An integrator includes an operational amplifier, a first filter connected to an inverting input terminal of the operational amplifier, and a second filter connected between the inverting input terminal and an output terminal of the operational amplifier. The first filter includes n resistive elements connected in series, and (n−1) capacitive elements each having one end connected to an interconnecting node of the resistive elements and the other end connected to ground. The second filter includes n capacitive elements connected in series, and (n−1) resistive elements each having one end connected to an interconnecting node of the capacitive elements and the other end connected to ground. | 03-03-2011 |
20110080821 | COUPLED RING OSCILLATOR AND METHOD FOR INITIALIZING THE SAME - In a coupled ring oscillator including q ring oscillators each including p inverter circuits connected together to form a ring shape, and a phase coupling ring including (p×q) phase coupling circuits each of which is configured to couple an output of one of the p inverter circuits of one of the q ring oscillators to an output of one of the p inverter circuits of another one of the q ring oscillators in a predetermined phase relationship, and which are connected together to form a ring shape, for at least one group made up of one of the p inverter circuits in each of the q ring oscillators, outputs of the q inverter circuits belonging to the at least one group are fixed in phase with one another, the q ring oscillators are caused to oscillate in the in-phase fixed state, and then, the outputs of the q inverter circuits are released from the in-phase fixed state. | 04-07-2011 |
20110133964 | OVERSAMPLING A/D CONVERTER - An oversampling A/D converter includes a first filter including a first resistive element, a first capacitive element, a second resistive element, an operational amplifier, and a second capacitive element; a second filter receiving an output of the first filter; a third filter including a third resistive element, a third capacitive element, and a fourth resistive element; a quantizer receiving an output of the third filter and generating a digital signal; and a D/A converter converting the digital signal to an analog current signal. The D/A converter inputs the generated analog current signal to an inverting input terminal of the operational amplifier. | 06-09-2011 |
20110140754 | REFERENCE FREQUENCY GENERATION CIRCUIT, SEMICONDUCTOR INTEGRATED CIRCUIT, AND ELECTRONIC DEVICE - An oscillator circuit increases and reduces signal levels of first and second oscillation signals in a complementary manner in response to a transition of a signal level of a reference clock. An oscillation control circuit compares each of the signal levels of the first and second oscillation signals to a comparison voltage, and causes the signal level of the reference clock to transition according to results of the comparison. A reference control circuit increases or reduces the comparison voltage so that a difference between a signal level of an intermediate signal which is proportional to respective swings of the first and second oscillation signals and a reference voltage is reduced. | 06-16-2011 |
20110169677 | RESONATOR AND OVERSAMPLING A/D CONVERTER - Two resistive elements and a capacitive element are coupled between a first node and each of an inverting input terminal of an operational amplifier, an output terminal of the operational amplifier, and a common node. A resistive element and a capacitive element are coupled between the first node and a signal input terminal. Two capacitive elements and a resistive element are coupled between a second node and each of the inverting input terminal, the output terminal, and the common node. Two capacitive elements are coupled between the second node and each of the signal input terminal, and the common node. | 07-14-2011 |
20110200077 | DELTA-SIGMA MODULATOR AND WIRELESS COMMUNICATION DEVICE - In a DSM including a loop in which an output signal of a quantizer is digitally processed, and fed back through a DAC to an analog filter, the quantizer quantizes an analog signal from an analog filter section to output a digital signal. The digital signal from the quantizer is digitally processed in a first-order recursive filter circuit including a variable gain amplifier and a delay element. A LUT receives both the digital signal from the quantizer and a table control signal, which is an output signal from the recursive filter circuit, and stores in advance compensation values corresponding to the both signals. A compensation value from the LUT is used to provide a digital output signal compensated for a delay. The digital output signal is converted into an analog signal in the DAC, and then subtracted from an analog input signal in the analog filter section. | 08-18-2011 |
20110254718 | INTEGRATOR AND DELTA-SIGMA MODULATOR INCLUDING THE SAME - An integrator is provided which can reduce a disturbance in the current waveform of a current DA converter in order to improve the SNR of a ΔΣ modulator, for example. The integrator includes an operational amplifier, and feedback paths provided in parallel between the output terminal and inverting input terminal of the operational amplifier. In one of the feedback paths, an integrating capacitor and at least one resistor are connected in series. In the other feedback path, a second integrating capacitor whose capacitance value is smaller than that of the integrating capacitor is provided. | 10-20-2011 |
20120161990 | INTEGRATOR AND OVERSAMPLING A/D CONVERTER HAVING THE SAME - A high order integrator is configured using an operational amplifier, a first filter connected between an input terminal of the integrator and an inverted input terminal of the operational amplifier, and a second filter connected between the inverted input terminal and output terminal of the operational amplifier. The first filter includes n serially-connected first resistance elements, n-1 first capacitance elements each connected between each interconnecting node of the first resistance elements and the ground, and n-1 second resistance elements each connected between each interconnecting node of the first resistance elements and the ground. The second filter includes n serially-connected second capacitance elements, n-1 third resistance elements each connected between each interconnecting node of the second capacitance elements and the ground, and n-1 third capacitance elements each connected between each interconnecting node of the second capacitance elements and the ground. | 06-28-2012 |
20120161999 | COMPLEX SECOND-ORDER INTEGRATOR AND OVERSAMPLING A/D CONVERTER HAVING THE SAME - An oversampling A/D converter with a few operational amplifiers is configured using a complex second-order integrator including first and second second-order integrators and first and second coupling circuits configured to couple these integrators together. Each of the second-order integrators includes an operational amplifier, four resistance elements, and three capacitance elements. The first coupling circuit cross-couples one of two serially-connected capacitance elements inserted between the inverted input terminal and output terminal of the operational amplifier in the first second-order integrator to the counterpart in the second second-order integrator using two resistance elements. The second coupling circuit cross-couples the other capacitance element in the first second-order integrator to the counterpart in the second second-order integrator using two resistance elements. | 06-28-2012 |
20120262320 | RESONATOR, DELTA-SIGMA MODULATOR, AND WIRELESS COMMUNICATION DEVICE - Two T filters, one of which includes two resistive elements and one capacitive element and the other of which includes two capacitive elements and one resistive element, are inserted in a negative-feedback section of an operational amplifier, and a resistive element and a capacitive element are connected between each of intermediate nodes and a signal input terminal. A resistive element and a capacitive element which are connected to each other in parallel are connected between the signal input terminal and an inverting input terminal of the operational amplifier. With this configuration, overall admittances where elements connected to the corresponding intermediate nodes are in parallel connection are equal to each other. | 10-18-2012 |
20120313803 | TIME-TO-DIGITAL CONVERSION STAGE AND TIME-TO-DIGITAL CONVERTER INCLUDING THE SAME - In a time-to-digital conversion stage, a time-to-digital conversion circuit outputs an n-bit digital signal, which represents an integer value ranging from −(2 | 12-13-2012 |
20130154867 | A/D CONVERTER - An A/D converter having high accuracy and high throughput irrespective of characteristic variations of analog circuits is provided. The A/D converter includes a voltage-to-time converter configured to synchronize with a sampling clock signal and convert an input analog voltage to a time difference between two signals, and a plurality of time-to-digital converters each configured to convert the time difference between the two signals to a digital value. The plurality of time-to-digital converters operate in an interleaved manner. | 06-20-2013 |
20130169460 | DELTA-SIGMA MODULATOR, INTEGRATOR, AND WIRELESS COMMUNICATION DEVICE - A delta-sigma modulator includes: an integrator having an operational amplifier; a quantizer quantizing an output of the integrator; a first D-A converter converting an output of the quantizer to a current signal to provide negative feedback to the operational amplifier; a feedforward path feeding forward an input of the integrator to the quantizer; and a second D-A converter converting the output of the quantizer to a current signal to provide negative feedback to the quantizer. The integrator includes a resistive element having a first end connected to the input of the integrator and a second end connected to an inverting input of the operational amplifier, n capacitive circuits connected in series between the inverting input and an output of the operational amplifier, and (n−1) resistive elements each having a first end connected to an interconnecting node of the capacitive circuits and a second end connected to a common node. | 07-04-2013 |
20130249718 | OVERSAMPLING A/D CONVERTER - An oversampling A/D converter includes a first filter including a first resistive element, a first capacitive element, a second resistive element, an operational amplifier, and a second capacitive element; a second filter receiving an output of the first filter; a third filter including a third resistive element, a third capacitive element, and a fourth resistive element; a quantizer receiving an output of the third filter and generating a digital signal; and a D/A converter converting the digital signal to an analog current signal. The D/A converter inputs the generated analog current signal to an inverting input terminal of the operational amplifier. | 09-26-2013 |
20130335251 | TIME-TO-DIGITAL CONVERSION CIRCUIT AND TIME-TO-DIGITAL CONVERTER INCLUDING THE SAME - A time-to-digital conversion circuit for converting a time difference between two input signals to a 1-bit digital value, and adjusting the time difference between the two input signals to generate two output signals includes: a phase comparator configured to compare phases of the two input signals with each other to generate the digital value; a phase selector configured to output one of the two input signals which has a leading phase as a first signal, and the other of the two input signals which has a lagging phase as a second signal; and a delay unit configured to output the first signal with a delay, wherein the time-to-digital conversion circuit outputs the signal output from the delay unit and the second signal as the two output signals. | 12-19-2013 |
20140055294 | RESONATOR AND OVERSAMPLING A/D CONVERTER - Two resistive elements and a capacitive element are coupled between a first node and each of an inverting input terminal of an operational amplifier, an output terminal of the operational amplifier, and a common node. A resistive element and a capacitive element are coupled between the first node and a signal input terminal. Two capacitive elements and a resistive element are coupled between a second node and each of the inverting input terminal, the output terminal, and the common node. Two capacitive elements are coupled between the second node and each of the signal input terminal, and the common node. | 02-27-2014 |
20140104090 | TIME DIFFERENCE ADJUSTMENT CIRCUIT AND TIME-TO-DIGITAL CONVERTER INCLUDING THE SAME - A time difference adjustment circuit includes two flip-flop circuits, a delay circuit, and a reset circuit. The delay circuit includes first and second transistors of a first polarity and third and fourth transistors of a second polarity, wherein drains of the first and third transistors are coupled to each other, drains of the second and fourth transistors are coupled to each other, the drains of the first and third transistors and a gate of the fourth transistor are coupled to each other, an input signal is coupled to a gate of the first transistor, an output signal is supplied from the drains of the second and fourth transistors, and first and second reset signals are respectively coupled to gates of the second and third transistors. | 04-17-2014 |
20140113575 | DELTA SIGMA MODULATOR, AS WELL AS RECEIVER DEVICE AND WIRELESS COMMUNICATION DEVICE PROVIDED WITH SAME - A delta sigma modulator includes a filter circuit including an integrator having an operational amplifier; a first addition circuit provided between an output section of the filter circuit and an input section of a quantizer, and including a first resistive element; and a second addition circuit including at least one of a first feedforward circuit including a second resistive element or a first feedback circuit configured to feed back, as an analog signal, a digital output signal having been quantized by the quantizer, to an input section of the quantizer, wherein at least one of the first addition circuit or the first feedback circuit includes a phase compensator. | 04-24-2014 |
20140152484 | OVERSAMPLING TIME-TO-DIGITAL CONVERTER - An oversampling time-to-digital converter includes an input pulse generation circuit generating two pulse signals, a reference pulse generation circuit generating two pulse signals, a swap circuit swapping two pulse signals, a multiplexer selecting an output of the input pulse generation circuit or the swap circuit, a time-to-current conversion circuit outputting two pulse currents in accordance with an output of the multiplexer, a current mirror circuit whose input and output terminals receive the two pulse currents, an integration circuit integrating a differential current between the pulse current connected to the output terminal of the current mirror circuit and an output current of the current mirror circuit, and a comparison circuit comparing an output signal of the integration circuit to a threshold voltage. An output signal of the comparison circuit is given to the swap circuit as a control signal. | 06-05-2014 |
20140320329 | TIME-TO-DIGITAL CONVERTER - An edge detector includes flip-flops receiving phase signals of a ring oscillator, a resetter canceling the reset states of the flip-flops at the edge timing of an input signal, and a logical operator performing a logical operation on output signals of the flip-flops. A phase state detector detects a phase state of the ring oscillator occurring at the edge timing of the input signal based on the output signals of the flip-flops. A time-to-digital converter converts an edge interval between the input signal and an output signal of the logical operator into a digital value. A latch latches a value of a counter counting the number of cycles of an output signal of the ring oscillator, at the edge timing of the input signal. An operator calculates a digital value of a received signal from output signals of the latch, the phase state detector, and the time-to-digital converter. | 10-30-2014 |
20140340250 | TIME INTEGRATOR AND DELTA-SIGMA TIME-TO-DIGITAL CONVERTER - A time integrator integrates time axis information represented by a phase difference between two signals. The time integrator includes a pulse generation circuit configured to convert a time difference between edges of two input signals to a difference between pulse widths of two pulse signals, and to output the two pulse signals, a load circuit having load characteristics changed by the two pulse signals, and an oscillation circuit coupled to the load circuit, and having an oscillation frequency changing in accordance with the load characteristics of the load circuit. An output of the oscillation circuit is output as a result of time integration. | 11-20-2014 |
20140347205 | TIME-TO-DIGITAL CONVERTER AND AN A/D CONVERTER INCLUDING THE SAME - A time-to-digital converter includes first and second phase distribution circuits and N time-to-digital conversion circuits. The first and second phase distribution circuits each includes a plurality of frequency dividers connected in a tree structure. The first and second phase distribution circuits each divides a signal received by the frequency dividers of root nodes into N signals. The first and second phase distribution circuits each outputs the N signals each having a different phase. The N time-to-digital conversion circuits each converts a phase difference between an i-th signal (where i is an integer from 0 to N-1) that is output from the first phase distribution circuit and another i-th signal that is output from the second phase distribution circuit into a digital value. | 11-27-2014 |