Sheng-Chen
Sheng-Chen Liao, Toufen Township TW
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20160137786 | COPOLYMER OF DCPD-CONTAINING BENZOXAZINE (DCPDBZ) AND CYANATE ESTER RESIN, AND METHOD OF MANUFACTURING THE COPOLYMER - A copolymer of DCPD-containing benzoxazine (DCPDBz) and cyanate ester resin forms a low-dielectric thermosetting polymeric material for making electronic components. A method of manufacturing the copolymer is also introduced. The method includes allowing DCPD-phenol oligomer, aniline, and paraformaldehyde to react at 110° C. for 6-12 hours before being extracted and baked to obtain DCPDBz; and mixing cyanate ester and the DCPDBz at 150° C.; heating the mixture up to 220° C. | 05-19-2016 |
Sheng-Chen Wang, Taichung City TW
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20130122613 | Localized CMP to Improve Wafer Planarization - To provide improved planarization, techniques in accordance with this disclosure include a CMP station that utilizes localized planarization on a wafer. This localized planarization, which is often carried out in a localized planarization station downstream of a CMP station, applies localized planarization to less than the entire face of the wafer to correct localized non-planar features. Other systems and methods are also disclosed. | 05-16-2013 |
20130143474 | Slurry Sluppy System for CMP Process - The present disclosure relates to a slurry distribution system having a distribution tube connected between a mixing tank and a CMP tool. The mixing tank is configured to generate a polishing mixture comprising a diluted slurry having abrasive particles that enable mechanical polishing of a workpiece. The polishing mixture is transported between the mixing tank and a CMP tool by way of a transport piping. An energy source, in communication with the transport piping, transfers energy to the abrasive particles within the polishing mixture, thereby preventing accumulation of the abrasive particles within the transport piping. | 06-06-2013 |
20150126095 | CHEMICAL MECHANICAL POLISHING APPARATUS AND POLISHING METHOD USING THE SAME - A chemical mechanical polishing apparatus includes a platen, a polishing head, a magnetizable polishing pad, and an electromagnetic component. The magnetizable polishing pad is disposed between the polishing head and the platen. The electromagnetic component is configured for fastening the magnetizable polishing pad on the platen. | 05-07-2015 |
20150158140 | POLISHING HEAD, CHEMICAL-MECHANICAL POLISHING SYSTEM AND METHOD FOR POLISHING SUBSTRATE - A polishing head includes a carrier head and a plurality of pressure units arranged on the carrier head. At least two of the pressure units are located on the same circumferential line relative to a center axis of the carrier head. | 06-11-2015 |
Sheng-Chen Wang, Hsinchu TW
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20150294897 | STRUCTURES AND METHODS FOR FORMING FIN STRUCTURES - Structures and methods are provided for forming fin structures. A first fin structure is formed on a substrate. A shallow-trench-isolation structure is formed surrounding the first fin structure. At least part of the first fin structure is removed to form a cavity. A first material is formed on one or more side walls of the cavity. A second material is formed to fill the cavity, the second material being different from the first material. At least part of the STI structure is removed to form a second fin structure including the first material and the second material. At least part of the first material that surrounds the second material is removed to fabricate semiconductor devices. | 10-15-2015 |
Sheng-Chen Wang, Hsin-Chu TW
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20160111334 | FINFET FORMATION PROCESS AND STRUCTURE - A FinFET and methods for forming a FinFET are disclosed. In a method, first trenches are formed in a substrate. First isolation regions are then formed in the first trenches. An epitaxial region is epitaxially grown between the first isolation regions. A second trench is formed by etching in the epitaxial region, forming a plurality of fins. A second isolation region is formed in the second trench. A structure includes a substrate, a first fin on the substrate, a gate dielectric over the first fin, and a gate electrode over the gate dielectric. The first fin comprises an epitaxial layer having a stacking fault defect density less than 1*10 | 04-21-2016 |