Patent application number | Description | Published |
20120147023 | CACHING APPARATUS AND METHOD FOR VIDEO MOTION ESTIMATION AND COMPENSATION - A caching apparatus for video motion estimation and compensation includes: an external memory including a plurality of banks and configured to allocate one pixel row to one bank to store the pixel row; a memory controller configured to cause successively-inputted read requests to access different banks of the external memory and transmit a read command for a next read request to the external memory while reference data corresponding to a first-coming read request is outputted; and a data processor configured to successively make read requests for the reference data to the memory controller when reference data read requests are successively inputted, store the reference data inputted from the memory controller, and output the stored reference data. | 06-14-2012 |
20130101216 | METHOD AND DEVICE FOR IMAGE PROCESSING BY IMAGE DIVISION - Disclosed are a method and a device for processing an image by using image division capable of simultaneously minimizing deterioration of an image quality due to an error in a transmission line and further improving compression efficiency in performing compression and restoration of an image signal by using multiple processors. The method of processing an image by using image division according to an exemplary embodiment of the present disclosure includes dividing an image frame into multiple subblocks having a predetermined pixel size; constituting multiple macroblocks by sampling respective pixels positioned at an identical position within a predetermined number of subblocks; and constituting multiple slices by dividing the multiple macroblocks based on the positions of the sampled pixels within the subblock. | 04-25-2013 |
20130266234 | PARALLEL INTRA PREDICTION METHOD FOR VIDEO DATA - Disclosed is a parallel intra prediction method for video data, including: dividing, by an intra prediction unit, pixels included in at least one prediction unit configuring a coding unit or a sub-coding unit so as to belong to any one of a reference pixel group and a prediction group; generating, by the intra prediction unit, reference sub blocks and prediction sub blocks, respectively, using reference pixels belonging to the reference pixel group and prediction pixels belonging to the prediction pixel group; performing, by the intra prediction unit, encoding processing on the reference sub blocks; and performing, by the intra prediction unit, encoding processing on the prediction sub blocks. | 10-10-2013 |
20140348250 | METHOD AND APPARATUS FOR FILTERING PIXEL BLOCKS - Provided is a method for a plurality of processing elements to filter a plurality of pixel blocks in a plurality of picture partitions for a single frame image. The method for filtering pixel blocks includes: checking the status of a second boundary pixel block adjacent to a picture partition boundary, the second boundary pixel block being one of a plurality of pixel blocks in a second picture partition and neighboring a first boundary pixel block in a first picture partition, the first boundary pixel block neighboring the picture partition boundary; selecting a filtering area for the first boundary pixel block based on the status of the second boundary pixel block; and filtering the filtering area for the first boundary pixel block. | 11-27-2014 |
Patent application number | Description | Published |
20150037663 | BATTERY CELL HAVING DOUBLE SEALING STRUCTURE - Disclosed is a battery cell having a double sealing structure. In particular, the battery cell includes a first sealing portion formed at an outer circumferential surface of a battery case by thermal bonding and a second sealing portion further formed between an electrode assembly and the first sealing portion at at least one side surface of the first sealing portion. | 02-05-2015 |
20150072191 | BATTERY CELL OF IMPROVED COOLING EFFICIENCY - Disclosed herein is a battery cell configured such that at least one electrode assembly of a structure having a cathode, an anode, and a separator interposed between the cathode and the anode is mounted in a battery case, at least one heat dissipation member to dissipate heat generated in the electrode assembly during charge and discharge of the battery cell or upon occurrence of a short circuit is disposed in the electrode assembly and/or is in contact with an outer surface of the electrode assembly, and a portion of the heat dissipation member is exposed outward from the electrode assembly. | 03-12-2015 |
20160064782 | BATTERY CELL OF IMPROVED COOLING EFFICIENCY - Disclosed herein is a battery cell configured such that at least one electrode assembly of a structure having a cathode, an anode, and a separator interposed between the cathode and the anode is mounted in a battery case, at least one heat dissipation member to dissipate heat generated in the electrode assembly during charge and discharge of the battery cell or upon occurrence of a short circuit is disposed in the electrode assembly and/or is in contact with an outer surface of the electrode assembly, and a portion of the heat dissipation member is exposed outward from the electrode assembly. | 03-03-2016 |
Patent application number | Description | Published |
20100056091 | DEVICE AND METHOD FOR REDUCING LEAKAGE SIGNAL - The present invention relates to a leakage signal reducing device and method. The present invention uses a signal with varied phase and gain output by a local oscillator to eliminate a leakage signal leaked by a local oscillator to a frequency converter. | 03-04-2010 |
20100148849 | SIGNAL CONVERTER FOR WIRELESS COMMUNICATION AND RECEIVING DEVICE USING THE SAME - The present invention relates to a signal converting device and receiving device in a wireless communication system. The receiving device of the wireless communication system includes a differential signal converter for receiving a single ended radio frequency signal and converting it into a differential radio frequency signal, and a frequency down converter for down converting the differential radio frequency signal to down frequency signal. | 06-17-2010 |
20110063030 | CMOS VARIABLE GAIN AMPLIFIER - A complementary metal-oxide semiconductor (CMOS) variable gain amplifier includes: a cascode amplifier including a common source field effect transistor and a common gate field effect transistor in a cascode structure; a first current generation unit connected in parallel to a drain of the common gate field effect transistor and configured to vary transconductance of the cascode amplifier; a second current generation unit connected to a common source of the cascode amplifier and configured to control a bias current of the cascode amplifier; a current control unit configured to generate a current control signal for the first and second current generation units; and a load stage connected in series to a drain of the cascode amplifier and configured to output an output current, which is varied by the overall transconductance of the cascode amplifier, as a differential output voltage. | 03-17-2011 |
20120126895 | VARIABLE GAIN AMPLIFIER WITH FIXED BANDWIDTH - Provided is a variable gain amplifier. The variable gain amplifier includes an operational amplifier, a variable feedback impedance unit, a variable compensation impedance unit, and a variable current source. The variable feedback impedance unit is connected between an inverting input terminal and output terminal of the operational amplifier, and has a feedback impedance value which varies for gain control. The variable compensation impedance unit is connected to the inverting input terminal, and has a compensation impedance value which varies in response to change of the feedback impedance value for maintaining a constant feedback factor. The variable current source is connected to the inverting input terminal, and supplies an output current, which varies in response to change of the compensation impedance value, to the variable compensation impedance unit. | 05-24-2012 |
20120154029 | PMOS RESISTOR - Provided is a PMOS resistor. The PMOS resistor includes a PMOS transistor pair, a switching unit, and a negative feedback unit. The PMOS transistor pair is symmetrically connected between first and second nodes. The switching unit compares a voltage of the first node and a voltage of the second node to output one of the voltages of the first and second nodes. The negative feedback unit receives an output of the switching unit to control a current which flows in the PMOS transistor pair, for maintaining a constant resistance value. | 06-21-2012 |
20150017932 | SIGNAL AMPLIFICATION APPARATUS AND METHOD - A signal amplification apparatus includes a first modulator configured to receive an envelope signal, use a predetermined reference level to separate the received envelope signal into a first period and a second period, digitally modulate a signal of the second period to output the digitally modulated signal to a first output terminal, and output a signal of the first period to a second output terminal. Further, the signal amplification apparatus includes a second modulator configured to mix the digital modulated signal input through the first output terminal with a phase modulated carrier signal; an envelope modulator configured to output the signal of the first period as a power supply signal; and a power amplifier configured to amplify the mixed signal output by the second modulator to output the amplified signal. | 01-15-2015 |
20150078500 | METHOD OF CORRECTING TIME MISALIGNMENT BETWEEN ENVELOPE AND PHASE COMPONENTS - Provided is a method of correcting a time misalignment between envelope and phase components in a transmitting apparatus which separates envelope and phase components of a signal, processes them, and then recombines them to transmit the recombined signal. For this, in a method of correcting a time misalignment between envelope and phase components according to an embodiment of the present invention, a time misalignment is corrected by applying a time delay to at least one of envelope and phase components in digital and analog signal processing operations, or applying a time delay to an envelope or phase component by a pre-processing operation. | 03-19-2015 |
20150215147 | SIGNAL TRANSMISSION DEVICE ADJUSTING ELECTRICAL CHARACTERISTIC VALUE CORRESPONDING TO LOGIC LEVEL AND SIGNAL TRANSMITTING METHOD THEREOF - Provided is a signal transmission device including a first modulation unit generating a first modulated signal having at least three logic levels by modulating an input signal; a characteristic adjustment unit generating an adjusted first modulated signal by adjusting the at least one of electrical characteristic values based on an adjustment signal; a second modulation unit generating a second modulated signal by modulating the adjusted first modulated signal; and an adjustment operation unit generating the adjustment signal based on electrical characteristic values respectively corresponding to the at least three logic levels of the first modulated signal and corresponding to at least three logic levels of the second modulated signal. Linearity of the modulated signal generated by the provided signal transmission device is enhanced. | 07-30-2015 |
Patent application number | Description | Published |
20120103008 | HEATER UNIT AND AIR CONDITIONER INCLUDING THE SAME - Provided is a heater unit, which includes a heater-mounting part, a coil, a magnetic member, a cover member, and a coupling member. The heater-mounting part is attached to an outside of an object. The coil is coupled to the heater-mounting part and generates a magnetic field by electric current flowing therein. The magnetic member is disposed at a side of the coil, and is coupled to the heater-mounting part. The cover member covers an outside of the coil and an outside of the magnetic member. The coupling member detachably couples the heater-mounting part to the object. The heater unit is modularized so as to be removably mounted on the air conditioner, whereby the coil can be efficiently replaced and repaired. | 05-03-2012 |
20160003499 | REGENERATIVE AIR-CONDITIONING APPARATUS AND METHOD OF CONTROLLING THE SAME - A regenerative air-conditioning apparatus includes a thermal energy storage unit, first and second valve devices for switching a flow direction of a refrigerant compressed in a compressor, a first branch part disposed on an outlet-side of the compressor, the first branch dividing the refrigerant compressed in the compressor to flow into first and second valve devices or the thermal energy storage unit, a first storage unit connection tube extending from the first branch part to the thermal energy storage unit, a condensed refrigerant tube extending from an outdoor heat exchanger to an indoor heat exchanger, a second storage unit connection tube extending from the thermal energy storage unit to the condensed refrigerant tube, and a first expansion device disposed in the first storage unit connection tube to selectively restrict a flow of the refrigerant from the first branch part to the thermal energy storage unit. | 01-07-2016 |
Patent application number | Description | Published |
20150140625 | GENETICALLY ENGINEERED YEAST CELL CAPABLE OF PRODUCING LACTATE, METHOD OF PRODUCING THE SAME, AND METHOD OF PRODUCING LACTATE BY USING THE CELL - A genetically engineered yeast cell capable of producing lactate having increased TPI activity, a method of preparing the yeast cell, and a method of producing lactate by using the yeast cell. | 05-21-2015 |
20150152447 | YEAST CELL WITH INACTIVATED GLYCEROL-3-PHOSPHATE DEHYDROGENASE AND ACTIVATED GLYCERALDEHYDE-3-PHOSPHATE DEHYDROGENASE AND METHOD OF PRODUCING LACTATE USING THE SAME - A genetically modified yeast cell comprising increased glyceraldehyde-3-phosphate dehydrogenase activity converting glyceraldehyde-3-phosphate to 1,3-diphosphoglycerate as compared to a parent yeast cell of the same type, and reduced glycerol-3-phosphate dehydrogenase activity converting dihydroxyacetone phosphate to glycerol-3-phosphate compared to a parent yeast cell of the same type, and related compositions and methods. | 06-04-2015 |
20150159183 | YEAST CELL WITH INACTIVATED OR DEPRESSED PYRUVATE CARBOXYLASE AND METHOD OF PRODUCING LACTATE USING THE YEAST CELL - A yeast cell with reduced pyruvate to oxaloacetate conversion activity, and a method of producing lactate using the yeast cell. | 06-11-2015 |
20150225752 | ACID RESISTANT YEAST CELL AND USE THEREOF - having acid resistance at a pH of about 2.0 to about 5.0, a method of preparing the | 08-13-2015 |
20150368306 | ACID-RESISTANT YEAST CELL WITH REDUCED FPS1 ACTIVITY AND METHOD OF PRODUCING LACTATE BY USING THE YEAST CELL - Provided are an acid-resistant yeast cell with genetic modification and reduced Fps1 activity compared to that of a parent cell without the genetic modification; and a method of producing lactate by using the yeast cell. | 12-24-2015 |
20160002678 | YEAST HAVING IMPROVED PRODUCTIVITY AND METHOD OF PRODUCING PRODUCT - A recombinant yeast cell capable of consuming glucose at an increased rate, and a method of efficiently producing glycolysis-derived products using the recombinant yeast cell. | 01-07-2016 |
Patent application number | Description | Published |
20090135041 | Analog-to-digital converter for accumulating reference voltages successively divided by two - An analog-to-digital converter includes a ½ powered signal generator configured to generate divided signals by successively dividing a full scale signal by 2 and output one of the divided signals, an accumulator configured to update a reference signal according to a current divided signal and a current output bit, and a comparator configured to compare the updated reference signal with an input signal and generate a next output bit. | 05-28-2009 |
20120229204 | SWITCHED CAPACITOR CIRCUIT - According to the present invention, a switched capacitor circuit comprises: an inverting amplifier for removing the offset by using a chopper stabilization circuit; a sampling unit which is connected between an input terminal and the inverting amplifier; and a feedback unit which is connected to the inverting amplifier in parallel. | 09-13-2012 |
20130134492 | SEMICONDUCTOR MEMORY DEVICES AND METHODS FOR FABRICATING THE SAME - Example embodiments of inventive concepts relate to semiconductor memory devices and/or methods for fabricating the same. The semiconductor memory device may include a plurality of gates vertically stacked on a substrate, a vertical channel penetrating the plurality of gates and a data storage layer between the vertical channel and the plurality of gates. The vertical channel may include a lower channel connected to the substrate and an upper channel on the lower channel. The upper channel may include a vertical pattern penetrating some of the plurality of gates and defining an inner space filled with an insulating layer, and a horizontal pattern horizontally extending along a top surface of the lower channel. The horizontal pattern may be in contact with the top surface of the lower channel. | 05-30-2013 |
20130270625 | THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICES AND METHODS OF FABRICATING THE SAME - A three-dimensional (3D) semiconductor memory device includes a stack structure, a channel structure, and a vertical insulator. The stack structure includes gate patterns and insulating patterns which are alternately and repeatedly stacked on a substrate. A channel structure penetrates the stack structure and is connected to the substrate. A vertical insulator includes a high-k dielectric layer. The vertical insulator is covered by the channel structure and the high-k dielectric pattern of the vertical insulator is in contact with the gate patterns. | 10-17-2013 |
20150194440 | Nonvolatile Memory Devices And Methods Of Fabricating The Same - A nonvolatile memory device includes a gate structure including inter-gate insulating patterns that are vertically stacked on a substrate and gate electrodes interposed between the inter-gate insulating patterns, a vertical active pillar connected to the substrate through the gate structure, a charge-storing layer between the vertical active pillar and the gate electrode, a tunnel insulating layer between the charge-storing layer and the vertical active pillar, and a blocking insulating layer between the charge-storing layer and the gate electrode. The charge-storing layer include first and second charge-storing layers that are adjacent to the blocking insulating layer and the tunnel insulating layer, respectively. The first charge-storing layer includes a silicon nitride layer, and the second charge-storing layer includes a silicon oxynitride layer. | 07-09-2015 |
Patent application number | Description | Published |
20080291737 | PROGRAM AND ERASE METHODS FOR NONVOLATILE MEMORY - Methods of programming or erasing a nonvolatile memory device having a charge storage layer including performing at least one unit programming or erasing loop, each unit programming or erasing loop including applying a programming pulse, an erasing pulse, a time delay, a soft erase pulse, soft programming pulse and/or a verifying pulse as a positive or negative voltage to a portion (for example, a word line or a substrate) of the nonvolatile memory device. | 11-27-2008 |
20090052255 | PROGRAM AND ERASE METHODS FOR NONVOLATILE MEMORY - Methods of programming or erasing a nonvolatile memory device having a charge storage layer including performing at least one unit programming or erasing loop, each unit programming or erasing loop including applying at least one programming pulse, at least one erasing pulse, at least one time delay, at least one soft erase pulse, at least one soft programming pulse and/or at least one verifying pulse as a positive or negative voltage to a portion (for example, a word line or a substrate) of the nonvolatile memory device. | 02-26-2009 |
20090055577 | PROGRAMMING METHODS FOR NONVOLATILE MEMORY - Example embodiments are directed to methods, memory devices, and systems for programming a nonvolatile memory device having a charge storage layer including performing at least one unit programming loop, each unit programming loop including, applying a programming pulse to at least two pages, applying a time delay to the at least two pages, and applying a verifying pulse to the at least two pages. | 02-26-2009 |
20100302861 | Program and erase methods for nonvolatile memory - Methods of programming or erasing a nonvolatile memory device having a charge storage layer including performing at least one unit programming or erasing loop, each unit programming or erasing loop including applying a programming pulse, an erasing pulse, a time delay, a soft erase pulse, soft programming pulse and/or a verifying pulse as a positive or negative voltage to a portion (for example, a word line or a substrate) of the nonvolatile memory device. | 12-02-2010 |
Patent application number | Description | Published |
20140184969 | THIN FILM TRANSISTOR SUBSTRATE AND LIQUID CRYSTAL DISPLAY INCLUDING THE THIN FILM TRANSISTOR SUBSTRATE - A thin film transistor substrate a display area that includes pixels connected to gate lines and data lines crossing the gate lines, a non-display area disposed adjacent to the display area, data pads disposed in the non-display area and each being connected to a first end of a corresponding data line of the data lines, first transistors disposed in the non-display area and each being connected to a second end of the corresponding data line of the data lines, OS pads connected to the second end of the data lines, and repair lines disposed in the non-display area along a vicinity of the display area and arranged while interposing the first transistors therebetween. The OS pads are overlapped with the first transistors and the repair lines. | 07-03-2014 |
20140203835 | THIN FILM TRANSISTOR SUBSTRATE, METHOD OF INSPECTING THE SAME, AND DISPLAY DEVICE INCLUDING THE SAME - A thin film transistor substrate, includes: pixels disposed in a display area of the thin film transistor substrate and connected to gate lines and data lines; gate pad parts connected to first ends of the gate lines; first test transistors each being connected to a second end of a corresponding gate line of the gate lines; data pad parts connected to first ends of the data lines; and second test transistors each being connected to a second end of a corresponding data line of the data lines. The gate pad parts, the data pad parts, the first test transistors, and the second test transistors are disposed in a non-display area of the thin film transistor substrate. The first test transistors are configured to be switched to receive a first inspection signal and the second test transistors are configured to be switched to receive a second inspection signal. | 07-24-2014 |
20150364102 | DISPLAY APPARATUS - A display apparatus includes a first substrate including a channel-forming area, a second substrate facing the first substrate, a thin-film transistor disposed on the first substrate, a pixel electrode electrically connected to the thin-film transistor, a gate line disposed on the first substrate and electrically connected to the thin-film transistor, a data line electrically connected to the thin-film transistor and divided into at least two portions such that the channel-forming area is disposed between the two portions of the data line, and a connection portion electrically connecting the two portions of the data line to each other, in which the thin-film transistor includes a gate electrode branched from the gate line and overlapping the channel-forming area, a semiconductor pattern overlapping the gate electrode and contacting the two portions of the data line so that the channel-forming area is disposed in the semiconductor pattern, and a drain electrode electrically connected to the pixel electrode and overlapping the semiconductor pattern. | 12-17-2015 |
20150378194 | LIQUID CRYSTAL DISPLAY PANEL - A liquid crystal display panel includes a first substrate, a second substrate facing the first substrate, a plurality of first spacers disposed between the first and second substrates, and a plurality of second spacers disposed between the first and second substrates to maintain a cell gap between the first and second substrates in cooperation with the first spacers. Each first spacer includes a first sub-spacer integrally formed with the first substrate and a second sub-spacer disposed on the second substrate that overlaps the first sub-spacer. | 12-31-2015 |
20160062186 | METHOD OF MANUFACTURING CURVED LIQUID CRYSTAL DISPLAY PANEL AND APPARATUS FOR MANUFACTURING CURVED LIQUID CRYSTAL DISPLAY PANEL - A method for manufacturing a curved liquid crystal display panel includes bending a display member including at least one alignment layer at a predetermined curvature using a jig and forming an alignment axis in the alignment layer while the display member is bent using an alignment axis forming part. A control part is used to control an operation of the jig and the alignment axis forming part. | 03-03-2016 |
Patent application number | Description | Published |
20120161594 | LAUNDRY TREATING APPARATUS - There may be disclosed a laundry treating apparatus including a cabinet configured to define a profile thereof, the cabinet comprising a laundry introduction opening formed therein, a door configured to open and close the laundry introduction opening, a hinge unit comprising a first pivot to rotate the door along a first rotational direction and a second pivot to rotate a second rotational direction that is different from the first rotational direction, and a securing member configured to secure the door to the first pivot or the second pivot, when the door is rotated. | 06-28-2012 |
20120187811 | LAUNDRY TREATING APPARATUS - There may be disclosed a laundry treating apparatus including a cabinet configured to define a profile thereof, the cabinet comprising a laundry introduction opening formed therein, a door configured to open and close the laundry introduction opening, a hinge unit comprising a first pivot to rotate the door along a first rotational direction and a second pivot to rotate a second rotational direction that is different from the first rotational direction, a guide part installed in the cabinet, with a guide groove recessed a predetermined depth, and a connection part installed in the door, the connection part comprising a guide projection received in the guide groove of which a moving path is guided, and an opening angle of the opening is variable based on positions of the guide projection. | 07-26-2012 |
20130232725 | UPRIGHT TYPE VACUUM CLEANER - An upright type vacuum cleaner is disclosed. The upright type vacuum cleaner may include a main body, a suction nozzle provided at a lower end of the main body, a first leg assembly configured to support a first side of the main body, and a second leg assembly configured to support a second side of the main body. The main body may further include a coupler configured to pivotally rotatably couple the first leg assembly and the second leg assembly to each other. The first leg assembly and the second leg assembly may be rotated by different angles to support the main body when the main body is tilted leftward or rightward. The first leg assembly and the second leg assembly may be rotated by a same angle to support the main body when the main body is tilted rearward. | 09-12-2013 |
20130291331 | AUTOMATIC CLEANER - An automatic cleaner, which includes a casing including a suction port through which,a foreign substance is suctioned, a moving device that moves the casing, and a side brush assembly movably installed on the casing. The side brush assembly includes a brush rotating to move a foreign substance located outside the footprint of the casing, to the suction port. A rotation shaft of the brush is moved according to a movement of the side brush assembly. | 11-07-2013 |
20140375189 | LAUNDRY TREATING APPARATUS - A laundry treating apparatus is provided that includes a cabinet configured that defines a profile of the laundry treating apparatus, the cabinet including a laundry introduction opening formed therein, a door configured to open and close the laundry introduction opening, a hinge unit including a first pivot to rotate the door along a first rotational direction and a second pivot to rotate along a second rotational direction, which is different from the first rotational direction, and a securing member configured to secure the door to the first pivot or the second pivot, when the door is rotated. | 12-25-2014 |
Patent application number | Description | Published |
20130155655 | DISPLAY APPARATUS - Provided is a display apparatus. The display apparatus includes a display panel, a back cover disposed on a rear side of the display panel, the back cover having a curved shape of which both ends protrude forward, and a fixing part fixing the back cover to maintain the curved shape of the back cover. The display panel is curved in a shape corresponding to that of the back cover. | 06-20-2013 |
20140140023 | DISPLAY APPARATUS - Provided is a display apparatus. The display apparatus includes a display panel, a back cover disposed on a rear side of the display panel, the back cover having a curved shape of which both ends protrude forward, and a fixing part fixing the back cover to maintain the curved shape of the back cover. The display panel is curved in a shape corresponding to that of the back cover. | 05-22-2014 |
20140247566 | DISPLAY APPARATUS - Provided is a display apparatus. The display apparatus includes a display panel, a back cover disposed on a rear side of the display panel, the back cover having a curved shape of which both ends protrude forward, and a fixing part fixing the back cover to maintain the curved shape of the back cover. The display panel is curved in a shape corresponding to that of the back cover. | 09-04-2014 |
20150355689 | DISPLAY DEVICE - A display device according to one embodiment of the present invention includes a display module, and a heat dissipation unit which is coupled to a rear side of the display module. The heat dissipation unit includes a core part including a plurality of hollow polygonal columns extending in a front/back direction, a front sheet which is coupled to a front portion of the core part, and a rear sheet which is coupled to a rear portion of the core part. The core part has a thickness of about 40% to about 60% in the front/back direction with respect to a total thickness of the heat dissipation unit in the front/back direction. | 12-10-2015 |