Patent application number | Description | Published |
20100134745 | LIQUID CRYSTAL DISPLAY AND MANUFACTURING METHOD THEREOF - A liquid crystal display (LCD) includes a first substrate including a display area displaying images and a peripheral area surrounding the display area, a common pad formed in the peripheral area of the first substrate, an insulating layer formed on the common pad and having a common contact hole exposing the common pad, an assistance common pad formed on the insulating layer of the peripheral area and contacting the common pad through the common contact hole, a second substrate corresponding to the first substrate, and a common electrode formed on the second substrate, and a conductive sealant disposed between the assistance common pad and the common electrode of the peripheral area, the conductive sealant electrically connecting the assistance common pad and the common electrode, wherein the common contact hole is disposed between the conductive sealant and the display area. | 06-03-2010 |
20100317415 | BUILT-IN ANTENNA FOR FOLDER TYPE PORTABLE TERMINAL - A built-in antenna for a folder type portable terminal includes a main body including a main board, an openable folder rotated at a predetermined angle with respect to the main body, a metallic hinge module rotating the folder on the main body to provide an opening and closing feeling of the folder, a conductor electrically connected to the metallic hinge module, the conductor being disposed inside the folder, and at least one conductive connection unit electrically connected to a broadcasting signal line of the main board, the at least one conductive connection unit being electrically connected to the hinge module through a non-contact coupling. | 12-16-2010 |
20110037665 | MULTIBAND BUILT-IN ANTENNA FOR PORTABLE TERMINAL - A multiband built-in antenna of a portable terminal is provided. The multiband built-in antenna includes a main board having a ground area and a non-ground area on a front surface and an opposite surface, and an antenna radiator having a specific pattern directly formed on the non-ground area of the main board, wherein the antenna radiator comprises a first antenna radiator of which one end is branched off into two parts on the front surface of the main board so that one part is used for feeding and the other part is electrically connected to the ground area, and of which the other end is extended by a specific length in a widthwise direction of the terminal, and a second antenna radiator which protrudes towards the opposite surface of the main board from the other end of the first antenna radiator and is formed in a specific pattern in the non-ground area on the opposite surface of the main board. | 02-17-2011 |
20110108985 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A method for manufacturing a semiconductor device comprises: etching a semiconductor substrate to form a plurality of pillar patterns; depositing an insulating layer on the surface of the pillar pattern; removing a portion of the insulating layer located at one side of the pillar pattern to form a contact hole that exposes the pillar pattern; forming a barrier film in the contact hole; and forming a junction in the pillar pattern that contacts with the contact hole. In the method, when a buried bit line is formed, a diffusion barrier is formed in the contact hole and a junction is formed in the lower portion of the pillar pattern, thereby improving characteristics of the device. | 05-12-2011 |
20110304028 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device which forms a barrier layer formed of a doped polysilicon layer on a buried bit line to prevent the bit line conductive layer from being exposed during the etching process for forming a buried word line, thereby improving characteristics of the device, and a method of manufacturing the same, are provided. The semiconductor device includes a first pillar pattern and a second pillar pattern, including sidewall contacts, and a buried bit line including a bit line conductive layer disposed over a lower part of a trench between the first pillar pattern and the second pillar pattern, and a barrier layer stacked over the bit line conductive layer. | 12-15-2011 |
20120025296 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device and a method for manufacturing the same are disclosed. The method for manufacturing the semiconductor device comprises: forming a plurality of first pillar patterns each of which includes a sidewall contact by selectively etching a semiconductor substrate; forming a buried bit line at a lower portion of a region between two neighboring first pillar patterns; forming a plurality of second pillar patterns by selectively etching upper portions of the first pillar patterns; and forming a gate coupling second pillar patterns arranged in a direction crossing the bit line, the gate enclosing the second pillar patterns. | 02-02-2012 |
20120044425 | METHOD AND APPARATUS FOR MULTIPLEXING AND DEMULTIPLEXING DATA TRANSMITTED AND RECEIVED BY USING AUDIO/VIDEO INTERFACE - A method and apparatus for multiplexing a plurality of streams transmitted and received via an audio/video (AV) link by allocating to the plurality of streams a plurality of basic units included in a transmission unit, and generating and transmitting an additional plurality of transmission units. | 02-23-2012 |
20120047281 | METHOD AND APPARATUS FOR TRANSMITTING AND RECEIVING DATA BASED ON SECURED PATH BANDWIDTH IN NETWORK ESTABLISHED BY USING AUDIO/VIDEO INTERFACE - A method and apparatus for transmitting and receiving data. The method and apparatus previously determines a validity of a data transmission path for transmitting a stream from a source device to a sink device. The validity of the transmission path is verified by checking and securing the data transmission path, thereby executing a streaming service based on the validity. | 02-23-2012 |
20120102534 | METHOD AND DEVICE FOR TRANSMITTING AND RECEIVING VIDEO STREAM - A method and device for transmitting and receiving a video stream are provided. The transmitting method includes receiving auxiliary information and one or more video streams, and distributing them as one or more pieces of lane data; transmitting the lane data to a receiving device; and receiving a result value that indicates whether a video processing unit for processing one of the one or more video streams works normally. The receiving method includes receiving one or more pieces of lane data that include auxiliary information and one or more video streams; merging the lane data into one or more video streams; selecting a video processing unit based on the auxiliary information, where one or more video processing units process the video streams; generating a result value for the selected video processing unit that indicates whether the video processing unit works normally; and transmitting the result value to a transmitting device. | 04-26-2012 |
20120135586 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A method of manufacturing a semiconductor device includes forming silicon line patterns in a semiconductor substrate, forming an insulating layer over the silicon line patterns, forming a conductive pattern between the silicon line patterns, forming a spacer over the substrate, forming an interlayer insulating layer between the silicon line patterns, removing the spacer on one side of the silicon line patterns to expose the conductive pattern, forming a bit line contact open region by removing the interlayer insulating layer, forming a polysilicon pattern to cover the bit line contact open region, and forming a junction region diffused to the silicon line pattern through the bit line contact open region. Thereby, a stacked structure of a titanium layer and a polysilicon layer are stably formed when forming a buried bit line and a bit line contact is formed using diffusion of the polysilicon layer to prevent leakage current. | 05-31-2012 |
20120300557 | SEMICONDUCTOR CELL AND SEMICONDUCTOR DEVICE - A technology is a semiconductor cell and a semiconductor device capable of reducing the coupling capacitance between adjacent bit lines by forming a bit line junction region in a separated island shape when forming a buried bit line, thereby improving characteristics of the semiconductor devices. The semiconductor cell includes a transistor including a gate and a gate junction region, a plurality of buried bit lines disposed to intersect the gate, and a plurality of bit line junction regions, each bit line junction region having an island shape formed between the buried bit lines and connected to the buried bit line. | 11-29-2012 |
20130105872 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME | 05-02-2013 |
20130105875 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME | 05-02-2013 |
20130241795 | ANTENNA APPARATUS FOR MOBILE TERMINAL - A mobile terminal with an antenna apparatus is provided. The mobile terminal in one embodiment includes an antenna radiator disposed at a first end of the mobile terminal; at least one antenna modifying element disposed at a second, opposing end of the mobile terminal; and a coupling unit for fastening the first and second ends and electrically connecting the at least one antenna modifying element with the antenna device when the first and second ends are fastened. In another embodiment, a deformation detector detects at least one deformation of the mobile terminal, an antenna matching unit is electrically connectable to the first antenna radiator; and a controller is coupled to the deformation detector, for controlling an electrical connection between the antenna matching unit and the first antenna radiator when the at least one deformation is detected. The antenna matching unit may include a second antenna radiator. | 09-19-2013 |
20130241798 | BUILT-IN ANTENNA FOR ELECTRONIC DEVICE - A built-in antenna for an electronic device is provided. The built-in antenna includes a substrate, a 1st antenna radiator with at least two radiating portions, a 2nd antenna radiator, and a switching means. The substrate has a conductive area and a non-conductive area. The 2nd antenna radiator is arranged within the non-conductive area of the substrate and fed by a Radio Frequency (RF) end of the substrate. The 2nd antenna radiator is configured to operate at a band different from at least one operating band of the 1st antenna radiator, and is fed by the RF end in a position adjacent the 1st antenna radiator. The switching means switches to selectively feed the 1st antenna radiator and the 2nd antenna radiator. | 09-19-2013 |
20140021537 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device and a method for forming the same includes a pillar formed over a semiconductor substrate, a buried bit line formed below the semiconductor substrate, a vertical gate formed over a sidewall of the pillar, an insulation film pattern formed to expose one side of the vertical gate disposed between the pillars, and a word line coupled to the exposed vertical gate. The vertical gate is formed to cover a portion of a sidewall of the pillar with a metal material, a word line overlaps with some parts of the vertical gate, and some parts of the pillar are shifted to be coupled to the vertical gate. | 01-23-2014 |
20140353745 | SEMICONDUCTOR DEVICE HAVING VERTICAL CHANNEL - A vertical-channel semiconductor device includes an active pillar including a channel region, a gate located at a sidewall of the active pillar, a buried bit-line formed below the active pillar, and an insulation film formed below the buried bit-line. Some parts of the buried bit-line are replaced with an insulation film, such that a bit-line junction leakage is prevented. | 12-04-2014 |
20150041888 | SEMICONDUCTOR DEVICE INCLUDING BURIED BIT LINE, AND ELECTRONIC DEVICE USING THE SAME - A semiconductor device includes: an active region defined by a device isolation film, an upper portion of which is divided into a first active pillar and a second active pillar; a first gate formed to proceed between the first active pillar and the second active pillar so as to obliquely cross the active region, and formed to contact the first active pillar; a second gate formed to proceed between the first active pillar and the second active pillar so as to obliquely cross the active region, and formed to cross the second active pillar; a conductive line formed below the first gate and the second gate, and commonly coupled to the first pillar and the second pillar; and an insulation film formed to enclose the conductive line within the active region. | 02-12-2015 |
Patent application number | Description | Published |
20090095458 | STRUCTURE OF HEADER-TANK FOR A HEAT EXCHANGER - The structure of header-tank for a heat exchanger comprises a plurality of tubes which are arranged in a row along an air-blowing direction to be spaced apart from each other at a certain intervals; fins which are interposed between the tubes so as to increase a heat exchange surface area with respect to air flowing between the tubes; and a pair of header-tanks which comprises a header having a tube insertion hole and a tank coupled with the header and in which heat exchange medium is flowed, wherein the header is bent at a surface, in which the tube insertion hole is formed, so as to form a bending portion in a height direction, and the bending portion is formed with a plurality of taps | 04-16-2009 |
20100223399 | METHOD AND APPARATUS FOR PROCESSING TIMESTAMP USING SIGNATURE INFORMATION ON PHYSICAL LAYER - A method and apparatus for processing a timestamp using signature information on a physical layer is provided. The timestamp processing terminal uses a pseudo-random binary sequence to assign signature information to a message which is to be sent to another terminal, and verifies the signature information on a physical layer. The signature information is used to identify the message as a sync message. Accordingly, it is possible to precisely process the timestamp. | 09-02-2010 |
20100287402 | TIMESTAMPING APPARATUS AND METHOD - A timestamping apparatus and method are provided. The timestamping apparatus implements timestamping on a synchronization message at a physical layer when the synchronization message is transmitted to the physical layer. At an application layer of the timestamping apparatus, a bit stream including a start indicator bit informing a start of a pseudo random number sequence, the pseudo random number sequence, and an end indicator bit informing an end of the pseudo random number sequence is generated to check whether or not a message received from the physical layer is the synchronization message, and is inserted as signature information of the synchronization message. At the physical layer of the timestamping apparatus, the signature information included in the synchronization message is detected, and timestamping information is generated when the signature information is detected. | 11-11-2010 |
20100329112 | ETHERNET DEVICE AND LANE OPERATING METHOD - An Ethernet device having multiple lanes and a method of operating the lanes are provided. In one general aspect, it is possible to allocate a dummy block to each of one or more lanes such that the lanes do not selectively participate in communications. In addition, on a receiving side, the dummy block can be removed from among the genuine data blocks to enable data to be decoded. In this case, an Ethernet device on a transmission side and an Ethernet device on a receiving side can exchange information of a lane to which the dummy block is allocated by use of a lane status message, and the lane status message may be based on a link fault message specified by Ethernet standards. | 12-30-2010 |
20110016232 | TIME STAMPING APPARATUS AND METHOD FOR NETWORK TIMING SYNCHRONIZATION - A time stamping apparatus and method for network timing synchronization are provided. A receiving apparatus receives data from a transmitting apparatus, generates a synchronization pulse signal synchronized with a local clock of the transmitting apparatus based on the received data, wherein the received data include information regarding the transmission time of the data, measured using the local clock of the transmitting apparatus, and the receiving apparatus measures the reception time of the data using the synchronization pulse signal. Therefore, accurate network timing synchronization may be achieved. | 01-20-2011 |
20120155486 | ETHERNET APPARATUS AND METHOD FOR SELECTIVELY OPERATING MULTIPLE LANES - A high-speed Ethernet apparatus having a multiple lane configuration and method for selectively operating the multiple lanes to allow lanes to participate or not in data transmission and reception. The Ethernet apparatus includes: a transfer rate control unit to set a state of each of multiple physical coding sub-layer (PCS) lanes inside to be the same as a state of corresponding each of multiple physical transmission lanes based on state change information that indicates whether the each physical transmission lane is activated or not, and to remove idle blocks from data blocks which are received at a transfer rate of a physical transmission lane in active state among the multiple physical transmission lanes; and a block allocating unit to allocate the data blocks from which the idle blocks have been removed through PCS lanes in active state that correspond to the physical transmission lanes in active state. | 06-21-2012 |
Patent application number | Description | Published |
20090072900 | APPARATUS AND METHOD FOR COMPENSATING FOR NONLINEARITY IN PORTABLE COMMUNICATION TERMINAL - An apparatus and method for compensating for nonlinearity of a portable communication terminal are provided. The apparatus includes a modem for modulating Transmission (Tx) data, a Digital Pre-Distortion (DPD) mode controller for obtaining power level information and for determining a power on/off state of a DPD unit by using the obtained information in the Tx mode, and the DPD unit for outputting the modulated data input from the modem without performing a DPD operation when power is off, and for outputting the modulated data input from the modem by performing the DPD operation when power is on. | 03-19-2009 |
20090278757 | MOBILE TERMINAL HAVING METAL CASE AND ANTENNA STRUCTURE - A mobile terminal including a metal case and an antenna structure that can exhibit optimum radiation performance is provided. The antenna structure includes an antenna having a radiation unit for transmitting and for receiving electric waves, a Printed Circuit Board (PCB) to which the antenna is mechanically coupled at one surface thereof and having a power supply unit electrically coupled to the radiation unit, and a case constructed using a metal material within which the PCB is disposed, wherein the case has at least one slot formed in a surface thereof opposite to the surface to which the PCB is fastened and adjacent to the radiation unit. | 11-12-2009 |
20090315789 | ANTENNA DEVICE OF MOBILE TERMINAL - An antenna device of a mobile terminal that can secure radiation performance is provided. The antenna device having a battery cover composed of a metal material includes a radiation unit for transmitting and receiving a signal, a feeding unit formed at an end portion of a first side of the radiation unit for electrically connecting the radiation unit to a Printed Circuit Board (PCB), and a ground part disposed a predetermined distance from the feeding unit and formed at a second side of the radiation unit. When the battery cover is fastened to the mobile terminal, the ground part contacts a first side of the battery cover. | 12-24-2009 |
20100090921 | BUILT-IN ANTENNA DEVICE FOR PORTABLE WIRELESS TERMINAL - A built-in antenna device for improving the radiation efficiency in a portable wireless terminal having an external metallic part is provided. The built-in antenna device includes a main board, an antenna radiator, and a conductor. The main board has a feed pad for supplying an electrical signal and a ground pad connected to ground. The antenna radiator is connected electrically to the feed pad and the ground pad of the main board to radiate a signal. The conductor connects the metallic part and the ground pad of the main board. The metallic part and the ground pad of the main board are at the same ground potential. | 04-15-2010 |
20120130075 | R-7-(3-AMINOMETHYL-4-METHOXYIMINO-3-METHYL-PYRROLIDIN-1-YL)-1-CYCLOPROPYL-- 6-FLUORO-4-OXO-1,4-DIHYDRO-[1,8]NAPHTHYRIDINE-3-CARBOXYLIC ACID AND L-ASPARTIC ACID SALT, PROCESS FOR THE PREPARATION THEREOF AND PHARMACEUTICAL COMPOSITION COMPRISING THE SAME FOR ANTIMICROBIAL - Disclosed herein are R-7-(3-aminomethyl-4-methoxyimino-3-methyl-pyrrolidin-1-yl)-1-cyclopropyl-6-fluoro-4-oxo-1,4-dihydro-[1,8]naphthyridine-3-carboxylic acid and L-aspartic acid salt, process for the preparation thereof and pharmaceutical composition comprising the same for antimicrobial. Because the R-7-(3-aminomethyl-4-methoxyimino-3-methyl-pyrrolidin-1-yl)-1-cyclopropyl-6-fluoro-4-oxo-1,4-dihydro-[1,8]naphthyridine-3-carboxylic acid and L-aspartic acid salt is more soluble and less toxic and has less side effects as an antimicrobial agent than hydrochloride and the other salts (D-aspartate and phosphate) conventionally used, the salt may be useful for oral and injectable administration. | 05-24-2012 |
20120212378 | ANTENNA DEVICE OF MOBILE TERMINAL - An antenna device of a mobile terminal that can secure radiation performance is provided. The antenna device having a battery cover composed of a metal material includes a radiation unit for transmitting and receiving a signal, a feeding unit formed at an end portion of a first side of the radiation unit for electrically connecting the radiation unit to a Printed Circuit Board (PCB), and a ground part disposed a predetermined distance from the feeding unit and formed at a second side of the radiation unit. When the battery cover is fastened to the mobile terminal, the ground part contacts a first side of the battery cover. | 08-23-2012 |
20140128610 | R-7-(3-AMINOMETHYL-4-METHOXYIMINO-3-METHYL-PYRROLIDIN-1-YL)-1-CYCLOPROPYL-- 6-FLUORO-4-OXO-1,4-DIHYDRO-[1,8]NAPHTHYRIDINE-3-CARBOXYLIC ACID AND L-ASPARTIC ACID SALT, PROCESS FOR THE PREPARATION THEREOF AND PHARMACEUTICAL COMPOSITION COMPRISING THE SAME FOR ANTIMICROBIAL - Disclosed herein are R-7-(3-aminomethyl-4-methoxyimino-3-methyl-pyrrolidin-1-yl)-1-cyclopropyl-6-fluoro-4-oxo-1,4-dihydro-[1,8]naphthyridine-3-carboxylic acid and L-aspartic acid salt, process for the preparation thereof and pharmaceutical composition comprising the same for antimicrobial. Because the R-7-(3-aminomethyl-4-methoxyimino-3-methyl-pyrrolidin-1-yl)-1-cyclopropyl-6-fluoro-4-oxo-1,4-dihydro-[1,8]naphthyridine-3-carboxylic acid and L-aspartic acid salt is more soluble and less toxic and has less side effects as an antimicrobial agent than hydrochloride and the other salts (D-aspartate and phosphate) conventionally used, the salt may be useful for oral and injectable administration. | 05-08-2014 |
20150028498 | MOLDING COMPOSITION FOR SEMICONDUCTOR PACKAGE AND SEMICONDUCTOR PACKAGE USING THE SAME - Disclosed herein are a molding composition for a semiconductor package including a liquid crystal thermosetting polymer resin and graphene oxide to thereby effectively decrease coefficient of thermal expansion (CTE) and warpage and maximize an effect of thermal conductivity, and a semiconductor package using the same. | 01-29-2015 |
20150105558 | R-7-(3-AMINOMETHYL-4-METHOXYIMINO-3-METHYL-PYRROLIDIN-1-YL)-1-CYCLOPROPYL-- 6-FLUORO-4-OXO-1,4-DIHYDRO-[1,8]NAPHTHYRIDINE-3-CARBOXYLIC ACID AND L-ASPARTIC ACID SALT, PROCESS FOR THE PREPARATION THEREOF AND PHARMACEUTICAL COMPOSITION COMPRISING THE SAME FOR ANTIMICROBIAL - Disclosed herein are R-7-(3-aminomethyl-4-methoxyimino-3-methyl-pyrrolidin-1-yl)-1-cyclopropyl-6-fluoro-4-oxo-1,4-dihydro-[1,8]naphthyridine-3-carboxylic acid and L-aspartic acid salt, process for the preparation thereof and pharmaceutical composition comprising the same for antimicrobial. Because the R-7-(3-aminomethyl-4-methoxyimino-3-methyl-pyrrolidin-1-yl)-1-cyclopropyl-6-fluoro-4-oxo-1,4-dihydro-[1,8]naphthyridine-3-carboxylic acid and L-aspartic acid salt is more soluble and less toxic and has less side effects as an antimicrobial agent than hydrochloride and the other salts (D-aspartate and phosphate) conventionally used, the salt may be useful for oral and injectable administration. | 04-16-2015 |
Patent application number | Description | Published |
20130114684 | ELECTRONIC DEVICES FOR SELECTIVE RUN-LEVEL CODING AND DECODING - An electronic device configured for selective run-level coding (SRLC) is described. The electronic device includes a processor and instructions stored in memory that is in electronic communication with the processor. The electronic device obtains a block of transformed and quantized coefficients (TQCs). The electronic device also determines whether to skip run-level coding. The electronic device further level codes any remaining TQCs if it is determined to skip run-level coding. The electronic device additionally run-level codes one or more TQCs if it is determined not to skip run-level coding and level codes any remaining TQCs if it is determined not to skip run-level coding. | 05-09-2013 |
20130114687 | FIXED INTRA RUN-LEVEL MODE FOR CAVLC IN HEVC - An electronic device configured for fixed intra run-level mode is described. The electronic device includes a processor and instructions stored in memory that is in electronic communication with the processor. The electronic device obtains a symbol, e.g. a run-lev pair. The electronic device determines whether a fixed intra run-level mode condition is met. If the condition is met, the electronic device uses fixed intra run-level mode to determine a ‘cn’ value for the symbol. If the condition is not met, the electronic device does not use the fixed intra run-level mode to determine the ‘cn’ value for the symbol. The electronic device run-level codes at least a portion of video data based on the determined ‘cn’ value. | 05-09-2013 |
20130187796 | LOSSLESS CODING TECHNIQUE FOR CABAC IN HEVC - A system utilizing a lossless coding technique for CABAC in HEVC is described. The system includes a first and second electronic device. The first electronic device encodes according to a lossless coding technique for CABAC in HEVC. The second electronic device decodes according to a lossless coding technique for CABAC in HEVC. | 07-25-2013 |
20130187797 | LOSSLESS CODING WITH DIFFERENT PARAMETER SELECTION TECHNIQUE FOR CABAC IN HEVC - A system utilizing a high throughput lossless coding mode for CABAC in HEVC is described. The system may include an electronic device configured to obtain a block of data to be encoded using an arithmetic based encoder; determine whether the block of data is to be encoded using lossless encoding; in response to determining that the block of data is not to be encoded using lossless encoding, use a first Absolute−3 coding technique to encode the block of data; in response to determining that the block of data is to be encoded using lossless encoding, use a second Absolute−3 coding technique to encode the block of data; wherein the second Absolute−3 coding technique is different than the first Absolute−3 coding technique. | 07-25-2013 |
20130188683 | HIGH THROUGHPUT CODING FOR CABAC IN HEVC - A system utilizing a high throughput coding mode for CABAC in HEVC is described. The system may include an electronic device configured to obtain a block of level values from a bit stream; context decode a level code flag of the block; check whether there is a next level code flag of the block; if there is a next level code flag, determine whether a count of context-coded level code flags is greater than a threshold; in response to determining that the count is not greater than the threshold, bypass decode the next level code flag; in response to determining that the count is greater than the threshold, context decode the next level code flag; recover a block of TQCs or a residual sample using the decoded level code flags; and store the recovered block in a memory device and/or recover video data. | 07-25-2013 |
20130188734 | HIGH THROUGHPUT BINARIZATION (HTB) METHOD FOR CABAC IN HEVC - An electronic device configured for high throughput binarization mode is described. The electronic device includes a processor and instructions stored in memory that is in electronic communication with the processor. The electronic device obtains a block of transformed and quantized coefficients (TCQs). The electronic device determines whether a high throughput binarization mode condition is met. If the condition is met, the electronic device uses the high throughput binarization mode to process the block. If the condition is not met, the electronic device does not use the high throughput binarization mode to process the block. The electronic device transmits the generated first or second bitstream to a decoder. | 07-25-2013 |
20130188736 | HIGH THROUGHPUT SIGNIFICANCE MAP PROCESSING FOR CABAC IN HEVC - A system utilizing high throughput significance map processing for CABAC in HEVC is described. The system includes a first and second electronic device. The first electronic device encodes a block of level values, and transmits a bitstream to the second electronic device based on the encoding. The second electronic device decodes the bitstream using a high throughput significance map processing technique in order to recover video data corresponding to the block. | 07-25-2013 |
20130223521 | HIGH THROUGHPUT RESIDUAL CODING FOR A TRANSFORM SKIPPED BLOCK FOR CABAC IN HEVC - A system utilizing a high throughput residual coding mode for CABAC in HEVC is described. The system may include an electronic device configured to obtain a bitstream; recover a binary symbol from the obtained bitstream; determine whether the binary symbol is to be decoded using a high throughput residual coding mode; in response to determining that the binary symbol is not to be decoded using the high throughput residual coding mode, use a first coding technique to obtain a block of Transformed and Quantized Coefficients (TQCs); and, in response to determining that the binary symbol is to be decoded using the high throughput residual coding mode, use a second different coding technique to obtain a residual sample. | 08-29-2013 |
20130301738 | MODIFIED CODING FOR A TRANSFORM SKIPPED BLOCK FOR CABAC IN HEVC - In an example, an electronic device of a decoder is configured to obtain a bit stream and recover a binary symbol from the obtained bit stream. The electronic device is configured to determine whether the binary symbol is to be decoded using a modified transform skip mode. The electronic device is configured to, in response to determining that the binary symbol is not to be decoded using the modified transform skip mode, determine a first TS_Shift value, and recover video data using the first TS_Shift value. The electronic device is configured to, in response to determining that the binary symbol is to be decoded using the modified transform skip mode, determine a second TS_Shift value, and recover video data using the second TS_Shift value. | 11-14-2013 |
20140086318 | VIDEO COMPRESSION WITH COLOR SPACE SCALABILITY - An image decoder includes a base layer to decode at least a portion of an encoded video stream into a first image having a first image format. The image decoder can generate a color space prediction by scaling a color space of the first image from the first image format into a color space corresponding to a second image format. The image decoder includes an enhancement layer to decode the encoded video stream to generate a second image in the second image format based, at least in part, on the color space prediction. | 03-27-2014 |
20140092985 | CONTENT INITIALIZATION FOR ENHANCEMENT LAYER CODING - A system for decoding a video bitstream includes receiving a frame of the video that includes at least one slice and at least one tile and where each of the at least one slice and the at least one tile are not all aligned with one another. | 04-03-2014 |