Patent application number | Description | Published |
20110191892 | GENETIC MARKERS ASSOCIATED WITH DROUGHT TOLERANCE IN MAIZE - The presently disclosed subject matter relates to methods and compositions for identifying, selecting, and/or producing drought tolerant maize plants or germplasm. Maize plants or germplasm that have been identified, selected, and/or produced by any of the methods of the presently disclosed subject matter are also provided. | 08-04-2011 |
20140317774 | GENETIC MARKERS ASSOCIATED WITH DROUGHT TOLERANCE IN MAIZE - The presently disclosed subject matter relates to methods and compositions for identifying, selecting, and/or producing drought tolerant maize plants or germplasm. Maize plants or germplasm that have been identified, selected, and/or produced by any of the methods of the presently disclosed subject matter are also provided. | 10-23-2014 |
20150020240 | GENETIC MARKERS ASSOCIATED WITH DROUGHT TOLERANCE IN MAIZE - The presently disclosed subject matter relates to methods and compositions for identifying, selecting, and/or producing drought tolerant maize plants or germplasm. Maize plants or germplasm that have been identified, selected, and/or produced by any of the methods of the presently disclosed subject matter are also provided. | 01-15-2015 |
20150033406 | GENETIC MARKERS ASSOCIATED WITH DROUGHT TOLERANCE IN MAIZE - The presently disclosed subject matter relates to methods and compositions for identifying, selecting, and/or producing drought tolerant maize plants or germplasm. Maize plants or germplasm that have been identified, selected, and/or produced by any of the methods of the presently disclosed subject matter are also provided. | 01-29-2015 |
Patent application number | Description | Published |
20080258812 | High Speed Differential Receiver with Rail to Rail Common Mode Operation Having a Symmetrical Differential Output Signal with Low Skew - A novel high-speed differential receiver ( | 10-23-2008 |
20090043931 | AUTOMATIC CONFIGURATION OF A COMMUNICATION PORT AS TRANSMITTER OR RECEIVER DEPENDING ON THE SENSED TRANSFER DIRECTION OF A CONNECTED DEVICE - A communications port is implemented for configuration in direction and arrangement. According to an example embodiment of the present invention, a communications link, such as a PCI Express type link, is configurable for communicating with devices having different directional and/or polarity configurations. The communications link is configured to match a communications port condition (e.g., a directional and/or polarity condition) of a device coupled to the communications link. In one instance, the communications link is directionally configurable for reassigning input lanes to output lanes and output lanes to input lanes. With this approach, the communications link can be used to communicate with a variety of devices having varied communication characteristics. | 02-12-2009 |
20100001889 | Current-Time Digital-to-Analog Converter - A high resolution digital-to-analog converter comprises a programmable n-bit current digital-to-analog converter (IDAC), an m-bit programmable counter/timer, an integrator that converts the IDAC constant current charging a capacitor over time into an a precision (high resolution) analog voltage, and a sample and hold circuit for storing the precision analog voltage. The constant current from the IDAC is applied to the integrator for a time period determined by the programmable counter/timer, then the sample and hold circuit will sample the final voltage on the capacitor and store it as an analog voltage. The analog voltage resolution of this high resolution digital-to-analog converter is n+m bits or binary 2 | 01-07-2010 |
20100121988 | DYNAMIC STATE CONFIGURATION RESTORE - A microcontroller or integrated system has a bus, a plurality of peripheral devices each one coupled with the bus, a non-volatile memory, and a state machine coupled with the non-volatile memory and being operable to initialize the peripheral devices by reading initialization information from the non-volatile memory and writing it to the peripheral devices. | 05-13-2010 |
20100315056 | DATA RETENTION SECONDARY VOLTAGE REGULATOR - An integrated circuit device has a primary voltage regulator and an ultra-low power secondary voltage regulator. The ultra-low power secondary voltage regulator supplies voltage to certain circuits used for providing data retention and dynamic operation, e.g., a real time clock and calendar (RTCC) when the integrated circuit device is in a low power sleep mode. The primary voltage regulator provides power to these same certain circuits when the integrated circuit is in an operational mode. | 12-16-2010 |
20110050341 | High speed rail to rail phase splitter for providing a symmetrical differential output signal having low skew - A novel high-speed phase splitter circuit ( | 03-03-2011 |
20120229112 | USING LOW VOLTAGE REGULATOR TO SUPPLY POWER TO A SOURCE-BIASED POWER DOMAIN - A common (ground) of a low voltage regulator is connected to a virtual common (ground) of an integrated circuit device that is also connected to transistor sources but isolated from a true ground connected to the substrate of the integrated circuit device. The regulated output voltage from the low voltage regulator rises the same as the virtual ground voltage rises when back-biased sufficient to reduce leakage current to an acceptable level in a given process technology. Therefore, the output of the low voltage regulator will maintain a normal operating voltage for the logic during a power saving back-biased condition. | 09-13-2012 |
20120326694 | DATA RETENTION SECONDARY VOLTAGE REGULATOR - An integrated circuit device has a primary voltage regulator and an ultra-low power secondary voltage regulator. The ultra-low power secondary voltage regulator supplies voltage to certain circuits used for providing data retention and dynamic operation, e.g., a real time clock and calendar (RTCC) when the integrated circuit device is in a low power sleep mode. The primary voltage regulator provides power to these same certain circuits when the integrated circuit is in an operational mode. | 12-27-2012 |
20140266317 | Capless Voltage Regulator Using Clock-Frequency Feed Forward Control - A voltage regulator for controlling an output device in accordance with embodiments includes an error amplifier; a controlled conductance output device; and a load predicting circuit; wherein an output of the error amplifier and an output of the load predicting circuit are summed to control the output device. | 09-18-2014 |
Patent application number | Description | Published |
20130215117 | RASTERIZATION OF COMPUTE SHADERS - Described are compiler algorithms that partition a compute shader program into maximal-size regions, called thread-loops. The algorithms may remove original barrier-based synchronization yet the thus-transformed shader program remains semantically equivalent to the original shader program (i.e., the transformed shader program is correct). Moreover, the transformed shader program is amenable to optimization via existing compiler technology, and can be executed efficiently by CPU thread(s). A Dispatch call can be load-balanced on a CPU by assigning single or multiple CPU threads to execute thread blocks. In addition, the number of concurrently executing thread blocks do not overload the CPU. | 08-22-2013 |
20130219377 | SCALAR OPTIMIZATIONS FOR SHADERS - Described herein are optimizations of thread loop intermediate representation (IR) code. One embodiment involves an algorithm that, based on data-flow analysis, computes sets of temporary variables that are loaded at the beginning of a thread loop and stored upon exit from a thread loop. Another embodiment involves reducing the size of a thread loop trip for a commonly-found case where a piece of compute shader is executed by a single thread (or a compiler-analyzable range of threads). In yet another embodiment, compute shader thread indices are cached to avoid excessive divisions, further improving execution speed. | 08-22-2013 |
20130219378 | VECTORIZATION OF SHADERS - Intermediate representation (IR) code is received as compiled from a shader in the form of shader language source code. The input IR code is first analyzed during an analysis pass, during which operations, scopes, parts of scopes, and if-statement scopes are annotated for predication, mask usage, and branch protection and predication. This analysis outputs vectorization information that is then used by various sets of vectorization transformation rules to vectorize the input IR code, thus producing vectorized output IR code. | 08-22-2013 |
Patent application number | Description | Published |
20120313452 | Flux compression generator - A flux compression generator (FCG) is provided for producing an electromagnetic pulse (EMP). The FCG includes an environmental case, a reactive load, a dielectric core, a superconducting stator, an electric energy source, a load switch, and a transition device. The reactive load transmits the EMP in response to an electric current pulse. The dielectric core has proximal and distal ends within the case, with the stator disposed coaxially around the core that provides structural support. The case contains the electrical energy source, the stator, the core and the transition device. The energy source connects to the stator at the proximal end and powers the transition device. The load switch connects the reactive load to the stator at the distal end. The energy source initially provides an electric current to the stator. The device upon activation heats at least a portion of the stator to reversibly transition the portion from a superconducting state to a non-superconducting state. The stator transfers the electric current as the pulse to the reactive load upon the portion's transition to the non-superconducting state. The stator can be a superconducting helical coil that wraps around the core connected to a superconducting conductor disposed coaxially within the core. Alternatively, the stator can be a stack of superconducting rings disposed coaxially along the core. The superconducting coil and rings can preferably be composed of a high temperature superconductive material on a metal substrate. | 12-13-2012 |
20140061507 | Broadband artificial dielectric with dynamically optical control - A material is provided for switching dielectric constant between distinct first and second values responsive to electromagnetic radiation having a specified energy. The material includes a medium transparent to the radiation and a plurality of particulates. Each particulate has a dipole that assumes one of distinct first and second parameters that correspond to the first and second values. The particulates are suspended within the medium. The parameters are either dipole span or charge strength. The dipole of each particulate sets to the first parameter by default and sets to the second parameter in response to the radiation. The particulates can be composed from undoped semi-insulating gallium arsenide. The medium can be polymethylmethacrylate, for example. | 03-06-2014 |
20140203819 | Cloaked electromagnetic field sensor - A cloaked field sensor apparatus and system using a cloaking barrier sheath to substantially enclose the surface of a transmitter conduit exposed to an electromagnetic field being measured to reduce the field sensor's interference with the electromagnetic field being measured. Multiple cloaked field sensor apparatuses may be aligned in an array and use identical or different cloaking barrier sheaths. | 07-24-2014 |
20140238734 | Electromagnetic Cloak Using Metal Lens - A cloak is provided for concealing an object to an electromagnetic field. A first vane encloses the object and a second vane encloses the first vane. The distance between the first and second vanes varies relative to the object, so as to conceal the object to the electromagnetic field. | 08-28-2014 |