Seokhyun
Seokhyun Hong, Suwon-Si KR
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20160078834 | GATE DRIVING CIRCUIT AND DISPLAY DEVICE USING THE SAME - A gate driving circuit and a display device using the same are discussed. The gate driving circuit according to an embodiment includes a first shift register configured to sequentially shift a gate start pulse in response to a gate shift clock and output a gate pulse shifted on a per block basis, each block including a plurality of gate lines, a second shift register configured to sequentially shift the gate start pulse in response to the gate shift clock and output a gate pulse shifted on a per gate line basis, and a controller configured to supply the gate shift clock to one of the first and second shift registers. | 03-17-2016 |
Seokhyun Kim, Seoul KR
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20090172265 | FLASH MEMORY DEVICE HAVING SECURE FILE DELETION FUNCTION AND METHOD FOR SECURELY DELETING FLASH FILE - Disclosed is a flash memory device having a secure flash file deletion function and a method for securely deleting a flash file. Data and object headers as actual contents of the flash file are separately stored in data blocks and header blocks. At this time, the data is encrypted and stored, and a decryption key is included in an object header and stored in a header block. When the flash file is deleted, the object header is deleted by searching the header block where the object header including the decryption key is stored. In order to search the header block, a binary tree structure is used in which a terminal node indicates an LSB of a file ID. Disclosed may be applied to an embedded system where a flash memory is used as a storage medium. In particular, disclosed is suitable for a NAND flash memory device. | 07-02-2009 |
Seokhyun Kim, Seongnam-Si KR
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20150349272 | COMPOUND FOR ORGANIC ELECTRIC ELEMENT, ORGANIC ELECTRIC ELEMENT COMPRISING THE SAME AND ELECTRONIC DEVICE THEREOF - A compound represented by Formula 1. An organic electric element includes a first electrode, a second electrode, and an organic material layer between the first electrode and the second electrode. The organic material layer includes the compound represented by Formula 1. When the organic electric element includes the compound in the organic material layer, driving voltage, luminous efficiency, color purity, stability, and life span can be improved. | 12-03-2015 |
20160005981 | COMPOUND FOR ORGANIC ELECTRONIC ELEMENT, ORGANIC ELECTRONIC ELEMENT USING THE SAME, AND ELECTRONIC DEVICE THEREOF - The present invention provides a novel compound which is capable of improving light-emitting efficiency, stability and lifespan of an element, an organic electronic element using the same, and an electronic device thereof. | 01-07-2016 |
Seokhyun Lee, Daejeon KR
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20110150606 | QUAY-WALL SYSTEM FOR LOADING AND UNLOADING CONTAINERS, MOBILE HARBOR AND TRANSPORTING DEVICE FOR USE THEREIN - A quay-wall system for loading and unloading containers includes a quay-wall having a open-air storage yard, a floating body berthed to the quay-wall and resting a ramp on the quay-wall, a pallet formed for receiving one or more containers, and a transporting device transporting the plurality of pallets in parallel. A mobile harbor for use in the quay-wall system includes the ramp, a loading space in which one or more pallets having one or more containers accommodated therein can be placed, wherein the loading space has guide grooves formed thereon for guiding a transporting device. A transporting device for use in the quay-wall system includes a transporting device for being coupled a plurality of pallets in parallel and transporting the pallets from the open-air storage yard to a floating body or from the floating body to the open-air storage yard. | 06-23-2011 |
Seokhyun Lee, Hwaseong-Si KR
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20130147063 | METHODS OF FABRICATING FAN-OUT WAFER LEVEL PACKAGES AND PACKAGES FORMED BY THE METHODS - A fan-out wafer level package may include at least two semiconductor chips; an insulating layer covering portions of a first semiconductor chip; a mold layer covering portions of a second semiconductor chip; a redistribution line pattern in the insulating layer; and/or an external terminal on the insulating layer. The first semiconductor chip may be stacked relative to the second semiconductor chip. The redistribution line pattern may be electrically connected to the at least two semiconductor chips. The external terminal may be electrically connected to the redistribution line pattern. A fan-out wafer level package may include at least three semiconductor chips; an insulating layer covering portions of first semiconductor chips; a mold layer covering portions of a second semiconductor chip; a redistribution line pattern in the insulating layer; and/or an external terminal on the insulating layer. The first semiconductor chips may be stacked relative to the second semiconductor chip. | 06-13-2013 |
20130295725 | SEMICONDUCTOR PACKAGE AND METHOD OF FORMING THE SAME - The inventive concept provides semiconductor packages and methods of forming the same. The semiconductor package includes a buffer layer covering at least one sidewall of the semiconductor chip. The buffer layer is covered by a molding layer. Thus, reliability of the semiconductor package may be improved. | 11-07-2013 |
20140008818 | METHOD AND APPARATUS FOR STACKED SEMICONDUCTOR CHIPS - Stacked semiconductor chips include a bonding-wire-free interconnection electrically connecting the semiconductor chips to each. An opening in an adhesion layer between the semiconductor chips may provide a path for the interconnection from a bonding pad on one semiconductor chip, along a sidewall insulation layer of the semiconductor chip, along a sidewall insulation layer of another semiconductor chip to a bonding pad on the other semiconductor chip. | 01-09-2014 |
20150031170 | METHOD AND APPARATUS FOR STACKED SEMICONDUCTOR CHIPS - Stacked semiconductor chips include a bonding-wire-free interconnection electrically connecting the semiconductor chips to each. An opening in an adhesion layer between the semiconductor chips may provide a path for the interconnection from a bonding pad on one semiconductor chip, along a sidewall insulation layer of the semiconductor chip, along a sidewall insulation layer of another semiconductor chip to a bonding pad on the other semiconductor chip. | 01-29-2015 |
20150125999 | APPARATUS AND METHOD OF ATTACHING SOLDER BALL AND METHOD OF FABRICATING SEMICONDUCTOR PACKAGE INCLUDING SOLDER BALL - Provided are apparatuses configured to attach a solder ball, methods of attaching a solder ball, and methods of fabricating a semiconductor package including the same. An apparatus configured to attach a solder ball includes a chuck configured to receive a package substrate on which solder balls are provided; a shielding mask configured to shield the package substrate and including holes configured to expose the solder balls; and a heater configured to melt the solder balls exposed through the holes. | 05-07-2015 |
20150318266 | Semiconductor Package Devices - Semiconductor package devices and methods of forming the semiconductor package devices are provided. The semiconductor package devices may include a lower package including a lower semiconductor chip on a lower substrate, an upper package including an upper semiconductor chip on an upper substrate. The upper substrate may include a protruding part corresponding to the lower semiconductor chip and a connection part that has a bottom surface lower than a bottom surface of the protruding part and is disposed around the protruding part. The semiconductor package devices may also include a heat dissipation part in a space between the lower semiconductor chip and the protruding part on the upper substrate and a package connection pattern electrically connecting the lower package to the upper package. | 11-05-2015 |
20160005714 | SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME - Provided are a semiconductor package and a method of fabricating the same. The semiconductor package includes a first package having a first package substrate mounted with a lower semiconductor chip, and a second package having a second package substrate mounted with upper semiconductor chips. The second package substrate includes a chip region on which the upper semiconductor chips are mounted, and a connection region provided therearound. The chip region includes a first surface defining a first recess region and a second surface defining a first protruding portion. The upper semiconductor chips are mounted on opposite edges of the second surface and spaced apart from each other to have portions protruding toward the connection region beyond the chip region. | 01-07-2016 |
Seokhyun Yoon, Gyeonggi-Do KR
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20150347114 | APPARATUS AND METHOD FOR CONTROLLING INTERNET OF THINGS DEVICES - An electronic device including a memory is disclosed. The memory stores instructions controlling the electronic device to acquire information on a first external electronic device, access a server storing a software program related to the first external electronic device, receive at least a portion of the software program related to the first external electronic device from the server through the communication interface, install the at least a portion of the software program, transmit the at least a portion of the information on the first external electronic device and/or at least one part of the received at least a portion of the software program to a second external electronic device, and provide a user interface to the display using the installed at least a portion of the software program. The user interface is used for the second external electronic device to perform an operation related to the first external electronic device. | 12-03-2015 |
Seokhyun Yu, Seoul KR
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20130125043 | USER INTERFACE PROVIDING METHOD AND APPARATUS FOR MOBILE TERMINAL - A user interface providing method and apparatus for a mobile terminal may include a three-dimensional user interface to assist with grouping items and displaying items, and the movement therebetween. The user interface providing method for a mobile terminal may include: outputting a three dimensional user interface screen (3D UI screen) having a first region for item display and a second region for item management; and managing at least one item using the second region. | 05-16-2013 |
20130332871 | PORTABLE APPARATUS WITH A GUI - A portable device includes: a display screen; a processor; and an input device operable by a user, wherein the processor controls the display screen to display a graphical user interface comprising a plurality of images arranged in a three dimensional (3D) space in one of a depth layout and a curved layout. In the depth layout mode images are displayed arranged such that at least a first image is positioned further away in the 3D space than a second image and each image is positioned upon a two dimensional (2D) surface extending into the 3D space, transverse to the 2D surface at its respective position and facing the plane of the display screen. In the curved layout mode the images are arranged along a curved path within the 3D space forming a coil about an axis which is parallel to or forms an acute angle relative to the plane of the display screen such that at least one image is positioned facing outwards from the coil and at least one image is positioned facing inwards towards the axis such that each image faces the plane of the display screen. | 12-12-2013 |