Patent application number | Description | Published |
20110297627 | STRAINER WALL STRUCTURE, FILTRATION METHOD USING THE SAME, AND METHOD OF FABRICATING THE SAME - A strainer wall structure that removes foreign substances from a fluid suctioned into a pipe and a re-circulation pump that is part of an emergency core cooling system (ECCS). The strainer wall structure has an inlet side and an outlet side through which cooling water is introduced and discharged, respectively, and includes a body having an opening in a direction of the inlet side, closed side surfaces, and an outlet port disposed at one of the closed side surfaces. The strainer includes a punched plate filter screen inserted into the opening. A modular cassette apparatus including grooved first filter plates is inserted into the body, and second filter plates having second grooves is inserted into the first grooves. | 12-08-2011 |
20120037559 | STRAINER FILTERING APPARATUS INCLUDING FILTERING TUBE - A strainer filtering apparatus including a filtering tube providing a substantially larger effective filtering area for its length and width, substantially reducing foreign substances covering a suction surface and flow resistance of the foreign substances, and reducing pressure drop at a cooling water passage. The strainer filtering apparatus includes at least one inlet side into which cooling water is introduced and an outlet side through which the cooling water is discharged, hollow filtering tubes with filtering holes along their lengths, an upper plate having first grooves located at a lower surface and coupled to upper ends of the filtering tubes and an inlet part into which the cooling water is introduced, and a lower plate having punched holes to which lower ends of the filtering tubes are coupled. The cooling water in the filtering tubes is introduced through the punched holes and discharged at the outlet side. | 02-16-2012 |
20120037572 | STRAINER WALL STRUCTURE INCLUDING CURVED SECTIONS, METHOD OF MANUFACTURING THE SAME, AND FILTERING METHOD USING THE SAME - A strainer wall structure includes curved sections, a method of manufacturing the same, and a filtering method using the strainer wall structure to provide a substantially larger effective filtering area in the same length and width, substantially reducing foreign substances covering a suction surface and flow resistance of the foreign substances, and reducing pressure drop at a cooling water pass corresponding thereto. The strainer wall structure includes an inlet side through which cooling water is introduced and an outlet side through which the filtered cooling water is discharged, includes a body having openings in directions of the inlet side and the outlet side, and a first filter plate inserted into the body and including curved sections formed by alternately bending a first punched plate having filtering holes in opposite directions and at a predetermined interval. | 02-16-2012 |
Patent application number | Description | Published |
20090278120 | Thin Film Transistor - There is provided a thin film transistor (TFT) capable of improving electron mobility and minimizing the occurrence of hysteresis due to traps. The TFT includes a channel layer and a gate insulating layer, wherein the channel layer is made of an oxide semiconductor. In the TFT, the gate insulating layer includes one or more first dielectric layer and a second dielectric layer, and the first dielectric layer has a dielectric constant different from that of the second dielectric layer. | 11-12-2009 |
20100170011 | PLANTS HAVING ENHANCED YIELD-RELATED TRAITS AND A METHOD FOR MAKING THE SAME - The present invention relates generally to the field of molecular biology and concerns a method for enhancing plant yield-related traits relative to control plants. More specifically, the present invention concerns a method for enhancing yield related traits in plants relative to control plants, by modulating, preferably increasing, expression in the roots of a plant, of a nucleic acid sequence encoding a 2-cysteine peroxiredoxin (2-Cys PRX); or by modulating expression of a nucleic acid encoding an ANN polypeptide in a plant. The present invention also concerns plants having modulated, preferably increased, expression in the roots, of a nucleic acid sequence encoding a 2-Cys PRX, or having modulated expression of a nucleic acid encoding an ANN polypeptide, which plants have enhanced yield-related traits relative to control plants. The invention also provides constructs useful in the methods of the invention. | 07-01-2010 |
20130020567 | THIN FILM TRANSISTOR HAVING PASSIVATION LAYER COMPRISING METAL AND METHOD FOR FABRICATING THE SAME - A thin film transistor may include a passivation layer formed of a metal-containing conductive material. The thin film transistor includes: a gate electrode; a gate insulating layer positioned on the gate electrode; a channel layer positioned on the gate insulating layer; a source electrode and a drain electrode which are in contact with the channel layer while being spaced apart from each other; and a passivation layer including a metal-containing conductive material and positioned on the channel layer while being spaced apart from each of the source electrode and the drain electrode. The passivation layer serves to prevent transmission of light, oxygen, water and/or impurities into the channel layer and to improve the electrical characteristics of the thin film transistor. | 01-24-2013 |
20150033412 | PLANTS HAVING ENHANCED YIELD-RELATED TRAITS AND A METHOD FOR MAKING THE SAME - The present invention relates generally to the field of molecular biology and concerns a method for enhancing plant yield-related traits relative to control plants. More specifically, the present invention concerns a method for enhancing yield related traits in plants relative to control plants, by modulating, preferably increasing, expression in the roots of a plant, of a nucleic acid sequence encoding a 2-cysteine peroxiredoxin (2-Cys PRX); or by modulating expression of a nucleic acid encoding an ANN polypeptide in a plant. The present invention also concerns plants having modulated, preferably increased, expression in the roots, of a nucleic acid sequence encoding a 2-Cys PRX, or having modulated expression of a nucleic acid encoding an ANN polypeptide, which plants have enhanced yield-related traits relative to control plants. The invention also provides constructs useful in the methods of the invention. | 01-29-2015 |
Patent application number | Description | Published |
20090284376 | RFID Middleware-Based Sensor Data Stream Processing System and Method - Disclosed herein is a Radio Frequency Identification (RFID) middleware-based sensor data stream processing system and method. | 11-19-2009 |
20100065636 | Ontology-Based EPC Automatic Conversion Method and System - Disclosed herein is an ontology-based Electronic Product Code (EPC) automatic conversion method and system. The ontology-based EPC automatic conversion method includes the steps of arranging existing Radio Frequency Identification (RFID) EPC ontology information and newly added EPC ontology information, converting tag data collected from an RFID reader into binary data so as to perform header information extraction and Uniform Resource Name (URN) conversion, extracting the header information of an EPC from the binary data output as a result of the conversion, initializing the ontology properties so as to utilize the EPC ontology, extracting a corresponding code system of the ontology by performing comparison with the header information of the tag data converted into the binary data, extracting the ontology properties from the corresponding code system of the ontology, and performing automatic conversion into URN-type data on the basis of information about the extracted ontology properties. | 03-18-2010 |
20110072049 | Dynamic Process Management System for Processing Data in Various Environments - The present invention relates to a dynamic process management system for processing data in various environments. The dynamic process management system includes an interface unit for receiving a specific command from a user, a process-based management unit for mapping relevant processes to memory using information about the processes in compliance with the command received through the interface unit, and a code-based unit for storing classes related to the process information. Accordingly, the present invention is advantageous in that only the data desired by the user can be acquired using user-defined processes. | 03-24-2011 |
Patent application number | Description | Published |
20100055831 | PHASE CHANGEABLE MEMORY CELL ARRAY REGION AND METHOD OF FORMING THE SAME - A phase changeable memory cell array region includes a lower interlayer insulating layer disposed on a semiconductor substrate. The region also includes a plurality of conductive plugs disposed through the lower interlayer insulating layer. The region also includes a phase changeable material pattern operably disposed on the lower interlayer insulating layer, the phase changeable pattern covering at least two of the plurality of conductive plugs, wherein the phase changeable material pattern includes a plurality of first regions in contact with one or more of the plurality of conductive plugs and at least one second region interposed between the plurality of the first regions, wherein the at least one second region has a lower thermal conductivity than the plurality of first regions. The phase changeable memory cell array region also includes an upper interlayer insulating layer covering at least one of the phase changeable material pattern and the lower interlayer insulating layer. The region also includes conductive patterns disposed through the upper interlayer insulating layer and electrically connected to a plurality of predetermined regions of the plurality of first regions. | 03-04-2010 |
20100134950 | CAPACITOR - A capacitor includes a substrate, a plurality of first storage electrodes, a plurality of second storage electrodes, a first supporting layer pattern, a dielectric layer and a plate electrode. A plurality of contact pads is formed I the substrate. The first storage electrodes are arranged along lines parallel with a first direction and electrically connected to the contact pads, respectively. The second storage electrodes are respectively stacked on the first storage electrodes. The first supporting layer pattern extends in a direction parallel with the first direction between adjacent second storage electrodes and makes contact with the adjacent second storage electrodes to support the second storage electrodes. The dielectric layer is formed on the first and second storage electrodes. The plate electrode is formed on the dielectric layer. | 06-03-2010 |
20100200950 | Semiconductor device having dielectric layer with improved electrical characteristics and associated methods - A semiconductor device having a dielectric layer with improved electrical characteristics and associated methods, the semiconductor device including a lower metal layer, a dielectric layer, and an upper metal layer sequentially disposed on a semiconductor substrate and an insertion layer disposed between the dielectric layer and at least one of the lower metal layer and the upper metal layer, wherein the dielectric layer includes a metal oxide film and the insertion layer includes a metallic material film. | 08-12-2010 |
20110095397 | Semiconductor Structures Including Dielectric Layers and Capacitors Including Semiconductor Structures - Semiconductor structures including a first conductive layer; a dielectric layer on the first conductive layer; a second conductive layer on the dielectric layer; and a crystallized seed layer in at least one of a first portion between the first conductive layer and the dielectric layer and a second portion between the dielectric layer and the second conductive layer. Related capacitors and methods are also provided herein. | 04-28-2011 |
20110102968 | MULTILAYER STRUCTURE, CAPACITOR INCLUDING THE MULTILAYER STRUCTURE AND METHOD OF FORMING THE SAME - In a multilayer structure and a method of forming the same, a conductive layer including a metal nitride and a dielectric layer positioned on a surface of the conductive layer and having a high dielectric constant. The metal nitride comprises one of niobium, vanadium and compositions thereof. Thus, the EOT and leakage current of the multilayer structure may be sufficiently improved. | 05-05-2011 |
20110136317 | Semiconductor device, method of fabricating the same, and semicondutor module, electronic circuit board, and electronic system including the device - Example embodiments relate to a semiconductor device including an oxide dielectric layer and a non-oxide dielectric layer, a method of fabricating the device, and a semiconductor module, an electronic circuit board, and an electronic system including the device. The semiconductor device may include a lower electrode, an oxide dielectric layer disposed on the lower electrode, a non-oxide dielectric layer disposed on the oxide dielectric layer, and an upper electrode disposed on the non-oxide dielectric layer. | 06-09-2011 |
20110151639 | SEMICONDUCTOR DEVICE, METHOD OF FABRICATING THE SAME, SEMICONDUCTOR MODULE, ELECTRONIC CIRCUIT BOARD, AND ELECTRONIC SYSTEM INCLUDING THE DEVICE - Provided are a semiconductor device, a method of fabricating the same, and a semiconductor module, an electronic circuit board, and an electronic system including the device. The semiconductor device includes a lower electrode, a rutile state lower vanadium dioxide layer on the lower electrode, a rutile state titanium oxide on the lower vanadium dioxide layer, and an upper electrode on the titanium oxide layer. | 06-23-2011 |
20120094022 | METHOD OF FORMING METAL THIN FILM - Provided is a method of forming a metal thin film which can reduce leakage current while improving electric properties by improving step coverage of a device. The method of forming a metal thin film includes supplying a metal precursor including chlorine, purging byproducts produced after the supplying of the metal precursor by injecting a purge gas, supplying a reactant to allow the reactant and the metal precursor to react with each other to form a thin film layer, and purging the byproducts produced after the reaction by injecting a purge gas, wherein before the supplying of the metal precursor, the method further includes supplying a reactant to be adsorbed on a treated product. | 04-19-2012 |
20120178254 | METHOD OF FABRICATING SEMICONDUCTOR DEVICE HAVING DIELECTRIC LAYER WITH IMPROVED ELECTRICAL CHARACTERISTICS - A semiconductor device having a dielectric layer with improved electrical characteristics and associated methods, the semiconductor device including a lower metal layer, a dielectric layer, and an upper metal layer sequentially disposed on a semiconductor substrate and an insertion layer disposed between the dielectric layer and at least one of the lower metal layer and the upper metal layer, wherein the dielectric layer includes a metal oxide film and the insertion layer includes a metallic material film. | 07-12-2012 |
20120225548 | METHODS OF FORMING DIELECTRIC LAYERS AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES USING THE SAME - To form a dielectric layer, an organometallic precursor is adsorbed on a substrate loaded into a process chamber. The organometallic precursor includes a central metal and ligands bound to the central metal. An inactive oxidant is provided onto the substrate. The inactive oxidant is reactive with the organometallic precursor. An active oxidant is also provided onto the substrate. The active oxidant has a higher reactivity than that of the inactive oxidant. | 09-06-2012 |
20150031186 | METHOD OF FABRICATING SEMICONDUCTOR DEVICE HAVING DIELECTRIC LAYER WITH IMPROVED ELECTRICAL CHARACTERISTICS - A semiconductor device having a dielectric layer with improved electrical characteristics and associated methods, the semiconductor device including a lower metal layer, a dielectric layer, and an upper metal layer sequentially disposed on a semiconductor substrate and an insertion layer disposed between the dielectric layer and at least one of the lower metal layer and the upper metal layer, wherein the dielectric layer includes a metal oxide film and the insertion layer includes a metallic material film. | 01-29-2015 |
Patent application number | Description | Published |
20080258271 | Multi-dielectric films for semiconductor devices and methods of fabricating multi-dielectric films - A multi-dielectric film including at least one first dielectric film that is a composite film made of zirconium-hafnium-oxide and at least one second dielectric film that is a metal oxide film made of amorphous metal oxide. Adjacent ones of the dielectric films are made of different materials. | 10-23-2008 |
20090085160 | Semiconductor Device Including Insulating Layer of Cubic System or Tetragonal System - Provided is a semiconductor device including an insulating layer of a cubic system or a tetragonal system, having good electrical characteristics. The semiconductor device includes a semiconductor substrate including an active region, a transistor that is formed in the active region of the semiconductor substrate, an interlevel insulating layer that is formed on the semiconductor substrate and a contact plug that is formed in the interlevel insulating layer and that is electrically connected to the transistor. The semiconductor device may include a lower electrode that is formed on the interlevel insulating layer and that is electrically connected to the contact plug, an upper electrode that is formed on the lower electrode and an insulating layer of a cubic system or a tetragonal system including a metal silicate layer. The insulating layer may be formed between the lower electrode and the upper electrode. | 04-02-2009 |
20120168904 | Semiconductor Device Including Insulating Layer of Cubic System or Tetragonal System - Provided is a semiconductor device including an insulating layer of a cubic system or a tetragonal system, having good electrical characteristics. The semiconductor device includes a semiconductor substrate including an active region, a transistor that is formed in the active region of the semiconductor substrate, an interlevel insulating layer that is formed on the semiconductor substrate and a contact plug that is formed in the interlevel insulating layer and that is electrically connected to the transistor. The semiconductor device may include a lower electrode that is formed on the interlevel insulating layer and that is electrically connected to the contact plug, an upper electrode that is formed on the lower electrode and an insulating layer of a cubic system or a tetragonal system including a metal silicate layer. The insulating layer may be formed between the lower electrode and the upper electrode. | 07-05-2012 |
20130149833 | Methods of Manufacturing Semiconductor Devices - A method of manufacturing a semiconductor device, the method including: preparing a semiconductor substrate including a mold layer and a support layer disposed on the mold layer; forming multiple holes that pass through the mold layer and the support layer; forming multiple bottom electrodes in the holes; exposing at least a portion of the bottom electrodes by removing at least a portion of the mold layer; removing a portion of the bottom electrodes from an exposed surface of the bottom electrodes; and sequentially forming a dielectric layer and a top electrode layer on the bottom electrodes. | 06-13-2013 |
Patent application number | Description | Published |
20080203529 | SEMICONDUCTOR DEVICE COMPRISING MULTILAYER DIELECTRIC FILM AND RELATED METHOD - A semiconductor device including a multilayer dielectric film and a method for fabricating the semiconductor device are disclosed. The multilayer dielectric film includes a type-one dielectric film having a tetragonal crystalline structure, wherein the type-one dielectric film comprises a first substance. The multilayer dielectric film also comprises a type-two dielectric film also having a tetragonal crystalline structure, wherein the type-two dielectric film comprises a second substance different from the first substance and a dielectric constant of the type-two dielectric film is greater than a dielectric constant of the type-one dielectric film. | 08-28-2008 |
20120276721 | METHOD OF FORMING AN OXIDE LAYER AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE INCLUDING THE OXIDE LAYER - A method of forming an oxide layer. The method includes: forming a layer of reaction-inhibiting functional groups on a surface of a substrate; forming a layer of precursors of a metal or a semiconductor on the layer of the reaction-inhibiting functional groups; and oxidizing the precursors of the metal or the semiconductor in order to obtain a layer of a metal oxide or a semiconductor oxide. According to the method, an oxide layer having a high thickness uniformity may be formed and a semiconductor device having excellent electrical characteristics may be manufactured. | 11-01-2012 |
20130244445 | Method of Fabricating Semiconductor Device - Methods of fabricating a semiconductor device include forming a deposited film on a semiconductor substrate in a process chamber by repeatedly forming unit layers on the semiconductor substrate. The unit layer is formed by forming a preliminary unit layer on the semiconductor substrate by supplying a process material including a precursor material and film-control material into the process chamber, purging the process chamber, forming a unit layer from the preliminary unit layer, and again purging the process chamber. The precursor material includes a central atom and a ligand bonded to the central atom, and the film-control material includes a hydride of the ligand. | 09-19-2013 |
20160064386 | SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME - A method of fabricating semiconductor devices may include forming a mold structure on a lower layer, the mold structure including an etch stop layer doped at a first impurity concentration, a lower mold layer doped at a second impurity concentration, and an undoped upper mold layer. The method may include forming a trench exposing the lower layer in the mold structure using dry etching, extending a width of the trench in the etch stop layer using wet etching, and forming a first conductive pattern in the extended width trench, wherein an etch rate of the etch stop layer with respect to the dry etching may be smaller than an etch rate of the lower mold layer with respect to the dry etching, and an etch rate of the etch stop layer with respect to the wet etching may be proportional to the first impurity concentration. | 03-03-2016 |
Patent application number | Description | Published |
20120007501 | DISPLAY DEVICE - A display device is disclosed. The pixels of the display are formed so that a chromaticity range of the red organic emission layer satisfies an NTSC standard if λpr=3.93557E−03 Wr | 01-12-2012 |
20120009332 | METHOD OF MANUFACTURING ORGANIC LIGHT-EMITTING DISPLAY DEVICE - A method of manufacturing an organic light-emitting display device, which simplifies fabrication processes of the organic light-emitting display device and improves manufacturing yield. This method includes preparing a substrate that has a number of first regions and a second region surrounding the first regions. The substrate is conveyed into a chamber. An organic emission layer is formed in a direction on a surface of the substrate. A first metal layer is formed on the organic emission layer so as to correspond to the first regions, and the organic emission layer formed on the second region is removed. | 01-12-2012 |
20120138084 | Cleaning device using UV-ozone and cleaning method using the device - A contaminant cleaning device includes a stage configured to house a substrate; an imaging means configured to obtain an image of a contaminant on the substrate; a control means configured to recognize the image and configured to generate a control signal in accordance with the recognized image; a UV generating means; an irradiation shape forming unit configured to selectively block a passage of UV radiated from the UV generating means to make a UV irradiated shape correspond to a shape of the image recognized in the control means; and an interrupter configured to receive a control signal from the control means to block or allow passage of UV from the UV generating means, wherein the stage is configured to move in accordance with a control signal from the control means to enable a contaminant on the substrate to be positioned in the area to which UV is irradiated. | 06-07-2012 |
20130015491 | ORGANIC LIGHT-EMITTING DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAMEAANM Kim; Sang-YeolAACI Yongin-cityAACO KRAAGP Kim; Sang-Yeol Yongin-city KRAANM Park; Il-SeokAACI Yongin-cityAACO KRAAGP Park; Il-Seok Yongin-city KRAANM Han; KyulAACI Yongin-cityAACO KRAAGP Han; Kyul Yongin-city KR - An organic light-emitting apparatus includes a substrate; a first electrode formed on the substrate, where the first electrode is a cathode, an electron injection layer formed to contact an upper surface of the first electrode and including Mg, an intermediate layer formed on the electron injection layer and including an organic emission layer, and a second electrode which is formed on the intermediate layer and is an anode. | 01-17-2013 |
20140167626 | ORGANIC LIGHT-EMITTING DIODE, ORGANIC LIGHT-EMITTING DISPLAY DEVICE INCLUDING THE SAME, AND METHOD OF CONTROLLING DUAL EMISSION OF ORGANIC LIGHT-EMITTING DIODE - An organic light-emitting diode, an organic light-emitting display device including the same, and a method of controlling dual emission of the organic light-emitting diode. The organic light-emitting diode includes: a first electrode and a second electrode facing each other; a common electrode interposed between the first electrode and the second electrode; a first organic layer interposed between the first electrode and the common electrode; and a second organic layer that is interposed between the second electrode and the common electrode and is reverse-symmetric to the first organic layer with respect to the common electrode. | 06-19-2014 |
20140175417 | ORGANIC LIGHT-EMITTING DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME - An organic light-emitting apparatus includes a substrate; a first electrode formed on the substrate, where the first electrode is a cathode, an electron injection layer formed to contact an upper surface of the first electrode and including Mg, an intermediate layer formed on the electron injection layer and including an organic emission layer, and a second electrode which is formed on the intermediate layer and is an anode. | 06-26-2014 |
20140354142 | ORGANIC LIGHT EMITTING DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME - An organic light emitting display apparatus and a method of manufacturing the same are disclosed. The organic light emitting display apparatus includes, for example, a pixel electrode and a bus electrode spaced apart and electrically insulated from each other, a pixel defining layer exposing a part of the pixel electrode including a central part thereof and a part of the bus electrode, a first intermediate layer on a top surface of the pixel defining layer between the pixel electrode and the bus electrode, the first intermediate layer having a first opening in a part of the bus electrode to expose a part of the bus electrode, an emission layer disposed on the first intermediate layer, and an opposite electrode disposed on the emission layer to correspond to the pixel electrode and the bus electrode and contacting the bus electrode through the first opening of the first intermediate layer. | 12-04-2014 |
20140374732 | ORGANIC LIGHT EMITTING DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME - An organic light emitting display apparatus and a method of manufacturing the same are disclosed. The organic light emitting display apparatus includes, for example, a bus electrode, an insulating layer covering the bus electrode and having a bus electrode hole exposing at least a part of the bus electrode, a pixel electrode formed on the insulating layer and electrically coupled with the bus electrode, a pixel defining layer exposing a part of the pixel electrode and a part of the bus electrode, a first intermediate layer on the pixel defining layer and the pixel electrode, the first intermediate layer having a first opening to expose the part of the bus electrode, an emission layer disposed on the first intermediate layer, and an opposite electrode to correspond to the pixel electrode and the bus electrode and contacting the bus electrode through the first opening and the bus electrode hole. | 12-25-2014 |