| Patent application number | Description | Published |
|---|
| 20080203393 | THIN FILM TRANSISTOR ARRAY PANEL AND FABRICATION - The present invention provides a manufacturing method of a thin film transistor array panel, which includes forming a gate line on a substrate; forming a gate insulating layer, a semiconductor layer, and an ohmic contact on the gate line; forming a first conducting film including Mo, a second conducting film including Al, and a third conducting film including Mo on the ohmic contact; forming a first photoresist pattern on the third conducting film; etching the first, second, and third conducting films, the ohmic contact, and the semiconductor layer using the first photoresist pattern as a mask; removing the first photoresist pattern by a predetermined thickness to form a second photoresist pattern; etching the first, second, and third conducting films using the second photoresist pattern as a mask to expose a portion of the ohmic contact; and etching the exposed ohmic contact using a Cl-containing gas and a F-containing gas. | 08-28-2008 |
| 20080248617 | DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A display substrate includes a base substrate, a first metal pattern, a gate insulating layer, a second metal pattern, a channel layer and a pixel electrode. The first metal pattern is formed on the base substrate, and includes a gate line and a gate electrode of a switching element. The gate insulating layer is formed on the base substrate including the first metal pattern. The second metal pattern is formed on the gate insulating layer, and includes a source electrode, a drain electrode and a source line. The channel layer is formed under the second metal pattern, and is patterned to have substantially a same side surface as a side surface of the second metal pattern. The pixel electrode is electrically connected to the drain electrode. Therefore, an afterimage on a display panel, thus improving display quality. | 10-09-2008 |
| 20080268581 | Method of manufacturing thin film transistor substrate - A method of manufacturing a TFT substrate includes: sequentially forming a transparent conductive layer and an opaque conductive layer on a substrate, patterning the transparent conductive layer and the opaque conductive layer by using a first mask to form a gate pattern including a pixel electrode, and forming a gate insulating layer and a semiconductor layer above the substrate. A contact hole is formed which exposes a portion of the pixel electrode and a semiconductor pattern using a second mask. A conductive layer is formed above the substrate and patterned to form a source/drain pattern including a drain electrode which overlaps a portion of the pixel electrode. Portions of the gate insulating layer and the opaque conductive layer above the pixel electrode are removed except a portion overlapping the drain electrode, by using a third mask. | 10-30-2008 |
| 20080280379 | METHOD OF MANUFACTURING THIN FILM TRANSISTOR SUBSTRATE AND MANUFACTURING SYSTEM USING THE SAME - Provided is a method of manufacturing a thin film transistor substrate and a manufacturing system using the same, wherein the production of corrosive substances is reduced during the process of manufacturing the thin film transistor substrate. The method includes providing an etching unit with an insulation substrate on which a thin metal film has been deposited, and dry-etching the insulation substrate so as to form a predetermined circuit pattern; providing a waiting unit with the insulation substrate waiting to be cleaned; performing a preliminary cleaning operation by a cleaning unit having a plurality of nozzles while the insulation substrate waits and checking the preliminary cleaning operation; and performing a main cleaning operation with regard to the insulation substrate based on the result of the check. | 11-13-2008 |
| 20080299712 | MANUFACTURING METHOD OF A THIN FILM TRANSISTOR ARRAY PANEL - A method of manufacturing a thin film transistor array panel includes forming a gate line including a gate electrode, forming a gate insulating layer on the gate line, forming a semiconductor stripe on the gate insulating layer; forming ohmic contacts on the semiconductor stripe, forming a data line including a source electrode and a drain electrode on the ohmic contacts, depositing a passivation layer on the data line and the drain electrode, and forming a pixel electrode connected to the drain electrode. The formation of the data line and the drain electrode, the ohmic contacts, and the semiconductor stripe includes depositing an intrinsic silicon layer, an extrinsic silicon layer, and a conductor layer on the gate insulating layer, forming a photoresist including a second portion corresponding to a channel area between the source electrode and the drain electrode, and a first portion corresponding to a wire area on the data line and the drain electrode, wherein the first portion is thicker than the second portion, etching the conductor layer corresponding to a remaining area except for the wire and the channel area using the photoresist as an etch mask, removing the second portion to expose the conductor layer on the channel areas, etching the intrinsic silicon layer and the extrinsic silicon layer on the remaining area, etching the conductor layer and the extrinsic silicon layer on the channel areas, and removing the first portion. | 12-04-2008 |
| 20090017574 | THIN FILM TRANSISTOR, METHOD OF MANUFACTURING THE SAME, DISPLAY APPARATUS HAVING THE SAME AND METHOD OF MANUFACTURING THE DISPLAY APPARATUS - A thin film transistor includes a gate electrode on a substrate, a gate insulating layer on the substrate, a channel pattern, a source electrode and a drain electrode. The channel pattern includes a semiconductor pattern formed on the gate electrode and overlaying the gate electrode as well as first and second conductive adhesive patterns formed on the semiconductor pattern and spaced apart from each other. The source electrode includes a first barrier pattern, a source pattern and a first capping pattern sequentially formed on the first conductive adhesive pattern. The drain electrode includes a second barrier pattern, a drain pattern and a second capping pattern sequentially formed on the second conductive adhesive pattern. Etched portions of the first and second conductive adhesive patterns have a substantially vertical profile to prevent the exposure of the source and drain electrodes, thereby improving the characteristics of the thin film transistor. | 01-15-2009 |
| 20090039350 | Display panel and method of manufacturing the same - In a display panel and a method of manufacturing the display panel, a gate line, a data line, and source and drain electrodes including a same material as the data line are formed on a substrate constituting the display panel, and the data line includes an aluminum based alloy containing sufficient nickel to inhibit corrosion during dry etching. The corrosion resistance of the AlNi-containing alloy helps prevent corrosion of the data line, the source electrode, and the drain electrode during selective dry etching that shapes these lines and electrodes. | 02-12-2009 |
| 20090090911 | Manufacturing thin film transistor array panels for flat panel displays - A thin film transistor array panel for a flat panel display includes a substrate, a first signal line formed on the substrate, a second signal line intersecting and insulated from the first signal line, a switching element having a first terminal connected to the first signal line, a second terminal connected to the second signal line, and a third terminal, a pixel electrode connected to the third terminal of the switching element, and first and second light blocking members extending parallel to the second signal line, each being disposed on an opposite side of and partially overlapping an respective edge of the second signal line, an interval between the first and second light blocking members being in a range of from more than 1.5 μm to less than 4 μm. The array panel prevents light leakage from the display and improves its transmittance, aperture ratio and color reproducibility. | 04-09-2009 |
| 20090108265 | THIN FILM TRANSISTOR, METHOD OF FABRICATING THE SAME, AND DISPLAY APPARATUS HAVING THE SAME - A method of fabricating a thin film transistor includes forming a gate electrode on a substrate, forming a semiconductor layer on the gate electrode, forming a source electrode on the semiconductor layer, forming a drain electrode on the semiconductor layer spaced apart from the source electrode, forming a copper layer pattern on the source electrode and the drain electrode, exposing the copper layer pattern on the source electrode and the drain electrode to a fluorine-containing process gas to form a copper fluoride layer pattern thereon, and patterning the semiconductor layer. | 04-30-2009 |
| 20090115066 | Metal wiring layer and method of fabricating the same - A metal wiring layer and a method of fabricating the metal wiring layer are provided. The method includes forming a dielectric layer on a substrate, forming a plurality of dielectric layer patterns and holes therein on the substrate by etching part of the dielectric layer, with a cross sectional area of the holes in the dielectric layer patterns decreasing with increasing distance away from the substrate and the holes exposing the substrate, forming a trench by etching a portion of the substrate exposed through the holes in the dielectric layer patterns, and forming a metal layer which fills the trench and the holes in the dielectric layer patterns. Thus, it is possible to prevent the occurrence of an edge build-up phenomenon by forming a metal layer in a plurality of holes in the dielectric layer patterns having a cross sectional area decreasing with increasing distance away from the substrate. Therefore, it is possible to prevent the transmittance of a liquid crystal layer from decreasing due to a failure to properly fill liquid crystal molecules in the liquid crystal layer, and thus to increase the quality of display. | 05-07-2009 |
| 20090121228 | ARRAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A gate line includes a first seed layer formed on a base substrate and a first metal layer formed on the first seed layer. A first insulation layer is formed on the base substrate. A second insulation layer is formed on the base substrate. Here, a line trench is formed through the second insulation layer in a direction crossing the gate line. A data line includes a second seed layer formed below the line trench and a second metal layer formed in the line trench. A pixel electrode is formed in a pixel area of the base substrate. Therefore, a trench of a predetermined depth is formed using an insulation layer and a metal layer is formed through a plating method, so that a metal line having a sufficient thickness may be formed. | 05-14-2009 |
| 20090152635 | THIN FILM TRANSISTOR AND METHOD FOR MANUFACTURING A DISPLAY PANEL - Embodiments of the present invention relate to a thin film transistor and a manufacturing method of a display panel, and include forming a gate line including a gate electrode on a substrate, forming a gate insulating layer on the gate electrode, forming an intrinsic semiconductor on the gate insulating layer, forming an extrinsic semiconductor on the intrinsic semiconductor, forming a data line including a source electrode and a drain electrode on the extrinsic semiconductor, and plasma-treating a portion of the extrinsic semiconductor between the source electrode and the drain electrode to form a protection member and ohmic contacts on respective sides of the protection member. Accordingly, the process for etching the extrinsic semiconductor and forming an inorganic insulating layer for protecting the intrinsic semiconductor may be omitted such that the manufacturing process of the display panel may be simplified, manufacturing cost may be reduced, and productivity may be improved. | 06-18-2009 |
| 20090173446 | SUBSTRATE SUPPORT, SUBSTRATE PROCESSING APPARATUS INCLUDING SUBSTRATE SUPPORT, AND METHOD OF ALIGNING SUBSTRATE - The present invention relates to a substrate support that facilitates aligning a substrate and prevents the substrate from being damaged by arc discharge in processing a substrate using plasma, a substrate processing apparatus including the substrate support, and a method of aligning the substrate. A substrate support, which includes a main body on which a substrate is placed and a subsidiary body disposed around the side of the main body and having a slope declining from a position above the main body to the upper side of the main body, is provided, such that it is easy to align the substrate and it is possible to damage due to arc discharge in processing the substrate using plasma. | 07-09-2009 |
| 20090174834 | LIQUID CRYSTAL DISPLAY AND METHOD OF FABRICATING THE SAME - One or more embodiments provide a liquid crystal display (LCD) including a thin-film transistor (TFT) with improved performance and a method of fabricating the LCD. In one embodiment, the LCD includes a gate electrode which is formed on an insulating substrate; an active layer which is formed on the gate electrode; an organic layer which is formed on the active layer and includes a first hole that exposes a source region and a second hole that exposes a drain region; a source electrode which fills the first hole; and a drain electrode which fills the second hole. | 07-09-2009 |
| 20090184319 | DISPLAY SUBSTRATE AND A METHOD OF MANUFACTURING THE DISPLAY SUBSTRATE - A method of manufacturing a display substrate is described. In the method, a gate line and a gate electrode are formed on a base substrate. A source metal layer is formed on the base substrate having the gate line and the gate electrode. A data line, a source electrode and a drain electrode are formed by etching the source metal layer by using an etching gas. An additive gas is provided to the base substrate having the drain electrode so that the additive gas reacts with an etching component of the etching gas to remove a by-product formed at an exposed portion of the data line, the source electrode and drain electrode. Thus, corrosion of the fine pattern due to an etching gas may be prevented and/or reduced. | 07-23-2009 |
| 20090185116 | LIQUID CRYSTAL DISPLAY HAVING OPENINGS IN THE PROTECTIVE LAYER AND GATE INSULATING LAYER AND METHOD FOR FABRICATING THE DISPLAY - The present invention relates to a liquid crystal display and a fabricating method thereof. The cell gaps for the red, green and blue pixel areas are formed in a separate manner for correcting the color shift to enhance image quality. Openings for controlling the cell gaps are provided in the protective layer and the gate insulating layer and have a zigzag-shaped boundary. In this way, the light leakage near the boundary of the openings can be prevented. | 07-23-2009 |
| 20090191655 | METHOD OF ETCHING AMORPHOUS SILICON LAYER AND METHOD OF MANUFACTURING LIQUID CRYSTAL DISPLAY USING THE SAME - A method of etching an amorphous silicon layer includes providing a substrate with an amorphous silicon layer formed thereon into an atmospheric pressure plasma etching device, providing a plasma generation gas and etching gas to a plasma generator of the atmospheric pressure plasma etching device and generating an atmospheric pressure plasma gas between two electrodes provided in the plasma generator in which the two electrodes face each other. The method further includes repeatedly passing the substrate through the plasma generator at a predetermined speed, thereby etching the amorphous silicon layer on the substrate by using the atmospheric pressure plasma gas generated from the plasma generator. | 07-30-2009 |
| 20090206343 | DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME - In a display apparatus and a method of manufacturing the display apparatus, a first insulating layer having a trench and a second insulating layer having a via hole corresponding to the trench are formed on an array substrate. After forming a seed layer in the trench, a conductive layer is formed on the seed layer through a plating process, thereby forming the gate line, the gate electrode and the storage line accommodated in the trench and the via hole. | 08-20-2009 |
| 20090278126 | METAL LINE SUBSTRATE, THIN FILM TRANSISTOR SUBSTRATE AND METHOD OF FORMING THE SAME - A metal line substrate and a method of fabricating thereof, the metal line substrate including an insulating layer and a capping layer disposed on an insulating substrate, a trench defined by the insulating layer and the capping layer disposed on the insulating substrate, a seed layer pattern disposed on the insulating substrate, and a low-resistive conductive layer pattern disposed in the trench and contacting the seed layer pattern. The capping layer pattern includes a protrusion region which is in contact with the low-resistive conductive layer pattern. | 11-12-2009 |
| 20100032760 | THIN-FILM TRANSISTOR SUBSTRATE AND METHOD OF FABRICATING THE SAME - The present invention provides a thin-film transistor (TFT) substrate, which can be fabricated simply and at reduced cost, and a method of fabricating the TFT substrate. The TFT substrate includes: an insulating substrate; gate wiring that extends on the insulating substrate in a first direction; data wiring that extends on the gate wiring in a second direction, and includes a lower layer and an upper layer; and a semiconductor pattern that is disposed under the data wiring and has substantially the same shape as the data wiring except for a channel region, wherein root-mean-square roughness of a top surface of the data wiring is 3 nm or less. | 02-11-2010 |
| 20100044717 | THIN FILM TRANSISTOR PANEL AND METHOD OF MANUFACTURING THE SAME - After forming a signal line including aluminum, an upper layer of an oxide layer including aluminum that covers the signal line is formed in the same chamber and by using the same sputtering target as the signal line, or a buffer layer of an oxide layer including aluminum is formed in a contact hole exposing the signal line during the formation of the contact hole. Accordingly, the contact characteristic between an upper layer including indium tin oxide (“ITO”) or indium zinc oxide (“IZO”) and the signal line may be improved to enhance the adhesion therebetween while not increasing the production cost of the thin film transistor (“TFT”) array panel. | 02-25-2010 |
| 20100047946 | THIN FILM ARRAY PANEL AND MANUFACTURING METHOD THEREOF - A method of manufacturing a thin film array panel is provided, which includes: forming a gate line formed on a substrate; forming a gate insulating layer on the gate line; forming a semiconductor layer on the gate insulating layer; forming an ohmic contact layer on the semiconductor layer; forming a data line and a drain electrode disposed at least on the ohmic contact layer, forming an oxide on the data line; etching the ohmic contact layer using the data line and the drain electrode as an etch mask; and forming a pixel electrode connected to the drain electrode. | 02-25-2010 |
| 20100136775 | METHOD OF MANUFACTURING THIN-FILM TRANSISTOR SUBSTRATE - Provided is a method for manufacturing a thin-film transistor substrate, in which the etching characteristics of an insulating film and a passivation layer are enhanced. The insulating film and the passivation layer are deposited by low temperature chemical vapor deposition. The method includes disposing a gate wiring on an insulating substrate; disposing a gate insulating film on the gate wiring; disposing a data wiring on the gate insulating film; disposing a passivation layer on the data wiring; and forming a contact hole by etching at least one of the gate insulating film and the passivation layer, wherein at least one of the gate insulating film and the passivation layer is disposed at a temperature of about 280° C. or below, and the forming of the contact hole is performed at a pressure of about 60 mT or below. | 06-03-2010 |
| 20100140626 | THIN FILM TRANSISTOR ARRAY PANEL AND METHOD FOR MANUFACTURING THE SAME - A method for manufacturing a TFT array panel including forming a gate line having a gate electrode on a insulating layer, a gate insulating layer on the gate line, a semiconductor on the gate insulating layer, an ohmic contact on the semiconductor, a data line having a source electrode and a drain electrode apart form the source electrode on the ohmic contact, a passivation layer having a contact hole to expose the drain electrode, and a pixel electrode connected to the drain electrode through the contact hole. The drain electrode and the source electrode are formed by a photolithography using a negative photoresist pattern. The negative photoresist pattern includes a first portion having a first thickness corresponding to a channel area, a second portion having a second thickness corresponding to a data line area, and a third portion having a third thickness corresponding to another area. | 06-10-2010 |
| 20100148182 | THIN FLIM TRANSISTOR SUBSTRATE AND MANUFACTURING METHOD THEREOF - A thin film transistor (TFT) substrate is provided in which a sufficiently large contact area between conductive materials is provided in a contact portion and a method of fabricating the TFT substrate. The TFT substrate includes a gate interconnection line formed on an insulating substrate, a gate insulating layer covering the gate interconnection line, a semiconductor layer arranged on the gate insulating layer, a data interconnection line including a data line, a source electrode and a drain electrode formed on the semiconductor layer, a first passivation layer formed on the data interconnection line and exposing the drain electrode, a second passivation layer formed on the first passivation film and a pixel electrode electrically connected to the drain electrode. An outer sidewall of the second passivation layer is positioned inside an outer sidewall of the first passivation layer. | 06-17-2010 |
| 20100148769 | NON-CONTACT PLASMA-MONITORING APPARATUS AND METHOD AND PLASMA PROCESSING APPARATUS - A non-contact plasma-monitoring apparatus and a non-contact plasma-monitoring method are provided. The non-contact plasma-monitoring apparatus is installed in a plasma processing apparatus including a processing chamber and a power supply unit and measures at least one of an electric field and a magnetic field, which are created around power supply wiring connecting the process chamber to the power supply unit, without physically contacting the power supply wiring. | 06-17-2010 |
| 20100163862 | THIN FILM TRANSISTOR ARRAY SUBSTRATE AND METHOD OF FABRICATING THE SAME - A method of fabricating a thin film transistor array substrate is presented. The method entails forming a gate interconnection line on an insulating substrate, forming a gate insulating layer on the gate interconnection line, forming a semiconductor layer and a data interconnection line on the semiconductor layer, sequentially forming multiple passivation layers, etching the passivation layers down to a drain electrode that is an extension of the data interconnection line. The portion of the drain electrode that is exposed at this stage is a part of the drain electrode-pixel electrode contact portion. A pixel electrode is formed connected to the drain electrode. Two of the passivation layers have the same composition but are processed at different temperatures. A thin film transistor prepared in the above manner is also presented. | 07-01-2010 |
| 20100203715 | THIN FILM TRANSISTOR ARRAY PANEL AND FABRICATION - The present invention provides a manufacturing method of a thin film transistor array panel, which includes forming a gate line on a substrate; forming a gate insulating layer, a semiconductor layer, and an ohmic contact on the gate line; forming a first conducting film including Mo, a second conducting film including Al, and a third conducting film including Mo on the ohmic contact; forming a first photoresist pattern on the third conducting film; etching the first, second, and third conducting films, the ohmic contact, and the semiconductor layer using the first photoresist pattern as a mask; removing the first photoresist pattern by a predetermined thickness to form a second photoresist pattern; etching the first, second, and third conducting films using the second photoresist pattern as a mask to expose a portion of the ohmic contact; and etching the exposed ohmic contact using a Cl-containing gas and a F-containing gas. | 08-12-2010 |
| 20100261322 | ARRAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A gate line includes a first seed layer formed on a base substrate and a first metal layer formed on the first seed layer. A first insulation layer is formed on the base substrate. A second insulation layer is formed on the base substrate. Here, a line trench is formed through the second insulation layer in a direction crossing the gate line. A data line includes a second seed layer formed below the line trench and a second metal layer formed in the line trench. A pixel electrode is formed in a pixel area of the base substrate. Therefore, a trench of a predetermined depth is formed using an insulation layer and a metal layer is formed through a plating method, so that a metal line having a sufficient thickness may be formed. | 10-14-2010 |
| 20100308334 | ARRAY SUBSTRATE AND METHOD FOR MANUFACTURING THE ARRAY SUBSTRATE - An array substrate including: a gate electrode and a gate insulation layer disposed on a base substrate, the gate insulation layer having a first thickness in a first region and a second thickness in a second region, the first thickness being greater than the second thickness; a semiconductor pattern disposed on the gate insulation layer in the first region, an end portion of the semiconductor pattern having a stepped portion with respect to the gate insulation layer; an ohmic contact pattern disposed on the semiconductor pattern, an end portion of the ohmic contact pattern opposite to a channel portion being aligned with the end portion of the semiconductor pattern; and source and drain electrodes disposed on the ohmic contact pattern, the source and drain electrodes spaced apart from each other and including first and second thin-film transistor patterns. | 12-09-2010 |
| 20100317135 | METHOD OF MANUFACTURING A DISPLAY SUBSTRATE - A method of manufacturing a display substrate includes forming a first metallic pattern including gate and storage conductors and a gate electrode of a switching device on a base substrate, forming a gate insulation layer, forming a second metallic pattern and a channel portion including a source line, source and drain electrodes of the switching device, forming a passivation layer and a photoresist film on the second metallic pattern, patterning the photoresist film to form a first pattern portion corresponding to the gate and source conductors and the switching device, and a second pattern portion formed on the storage line, etching the passivation layer and the gate insulation layer, and forming a pixel electrode using the first pattern portion. Therefore, excessive etching of the stepped portion may be prevented, so that a short-circuit defect between a metallic pattern and a pixel electrode may be prevented | 12-16-2010 |
| 20110024752 | THIN FILM TRANSISTOR, METHOD OF FABRICATING THE SAME, AND DISPLAY APPARATUS HAVING THE SAME - A method of fabricating a thin film transistor includes forming a gate electrode on a substrate, forming a semiconductor layer on the gate electrode, forming a source electrode on the semiconductor layer, forming a drain electrode on the semiconductor layer spaced apart from the source electrode, forming a copper layer pattern on the source electrode and the drain electrode, exposing the copper layer pattern on the source electrode and the drain electrode to a fluorine-containing process gas to form a copper fluoride layer pattern thereon, and patterning the semiconductor layer. | 02-03-2011 |
| 20110062445 | DISPLAY SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME - A method of forming a display substrate includes forming an array layer on a substrate, forming a passivation layer on the array layer, forming a photoresist pattern on the passivation layer corresponding to a gate line, a source line and a thin-film transistor of the array layer, etching the passivation layer using the photoresist pattern as a mask, Non-uniformly surface treating a surface of the photoresist pattern, forming a transparent electrode layer on the substrate having the surface-treated photoresist pattern formed thereon and forming a pixel electrode. The forming a pixel electrode includes removing the photoresist pattern and the transparent electrode layer, such as by infiltrating a strip solution into the surface-treated photoresist pattern. | 03-17-2011 |
| 20110097961 | DISPLAY PANEL AND METHOD OF MANUFACTURING THE SAME - In a display panel and a method of manufacturing the display panel, a gate line, a data line, and source and drain electrodes including a same material as the data line are formed on a substrate constituting the display panel, and the data line includes an aluminum based alloy containing sufficient nickel to inhibit corrosion during dry etching. The corrosion resistance of the AlNi-containing alloy helps prevent corrosion of the data line, the source electrode, and the drain electrode during selective dry etching that shapes these lines and electrodes. | 04-28-2011 |
| 20110159622 | THIN FILM TRANSISTOR AND METHOD FOR MANUFACTURING A DISPLAY PANEL - Embodiments of the present invention relate to a thin film transistor and a manufacturing method of a display panel, and include forming a gate line including a gate electrode on a substrate, forming a gate insulating layer on the gate electrode, forming an intrinsic semiconductor on the gate insulating layer, forming an extrinsic semiconductor on the intrinsic semiconductor, forming a data line including a source electrode and a drain electrode on the extrinsic semiconductor, and plasma-treating a portion of the extrinsic semiconductor between the source electrode and the drain electrode to form a protection member and ohmic contacts on respective sides of the protection member. Accordingly, the process for etching the extrinsic semiconductor and forming an inorganic insulating layer for protecting the intrinsic semiconductor may be omitted such that the manufacturing process of the display panel may be simplified, manufacturing cost may be reduced, and productivity may be improved. | 06-30-2011 |
| 20110269253 | MANUFACTURING THIN FILM TRANSISTOR ARRAY PANELS FOR FLAT PANEL DISPLAYS - A thin film transistor array panel for a flat panel display includes a substrate, a first signal line formed on the substrate, a second signal line intersecting and insulated from the first signal line, a switching element having a first terminal connected to the first signal line, a second terminal connected to the second signal line, and a third terminal, a pixel electrode connected to the third terminal of the switching element, and first and second light blocking members extending parallel to the second signal line, each being disposed on an opposite side of and partially overlapping an respective edge of the second signal line, an interval between the first and second light blocking members being in a range of from more than 1.5 μm to less than 4 μm. The array panel prevents light leakage from the display and improves its transmittance, aperture ratio and color reproducibility. | 11-03-2011 |
| 20110297931 | METHOD OF FABRICATING A THIN FILM TRANSISTOR ARRAY SUBSTRATE - A method of fabricating a thin film transistor array substrate is presented. The method entails forming a gate interconnection line on an insulating substrate, forming a gate insulating layer on the gate interconnection line, forming a semiconductor layer and a data interconnection line on the semiconductor layer, sequentially forming multiple passivation layers, etching the passivation layers down to a drain electrode that is an extension of the data interconnection line. The portion of the drain electrode that is exposed at this stage is a part of the drain electrode-pixel electrode contact portion. A pixel electrode is formed connected to the drain electrode. Two of the passivation layers have the same composition but are processed at different temperatures. A thin film transistor prepared in the above manner is also presented. | 12-08-2011 |
| 20120003768 | THIN FLIM TRANSISTOR SUBSTRATE AND MANUFACTURING METHOD THEREOF - A thin film transistor (TFT) substrate is provided in which a sufficiently large contact area between conductive materials is provided in a contact portion and a method of fabricating the TFT substrate. The TFT substrate includes a gate interconnection line formed on an insulating substrate, a gate insulating layer covering the gate interconnection line, a semiconductor layer arranged on the gate insulating layer, a data interconnection line including a data line, a source electrode and a drain electrode formed on the semiconductor layer, a first passivation layer formed on the data interconnection line and exposing the drain electrode, a second passivation layer formed on the first passivation film and a pixel electrode electrically connected to the drain electrode. An outer sidewall of the second passivation layer is positioned inside an outer sidewall of the first passivation layer. | 01-05-2012 |
| 20120009842 | DISPLAY DEVICE, METHOD OF MANUFACTURING THE SAME AND MASK FOR MANUFACTURING THE SAME - A mask is provided. The mask includes a mask body, a first exposing part and a second exposing part. The first exposing part is on the mask body. The first exposing part includes a first light transmitting portion and second light transmitting portions. The first light transmitting portion exposes a portion of the photoresist film corresponding to the output terminal to a light of a first light amount. The second light transmitting portions exposes an adjacent portion of the photoresist film adjacent to the output terminal to a light of a second light amount smaller than the first light amount. The second exposing part is on the mask body. The second exposing part includes third light transmitting portions for partially exposing the photoresist film corresponding to the storage electrode to a light of a third light amount that is between the first and second light amounts. | 01-12-2012 |
| 20120064678 | MANUFACTURING METHOD OF THIN FILM TRANSISTOR ARRAY PANEL - A method for manufacturing a TFT array panel includes forming a photosensitive film pattern with first and second parts in first and second sections on a metal layer, etching the metal layer of a third section using the film pattern as a mask to form first and second metal patterns, etching the film pattern to remove the first part, etching first and second amorphous silicon layers of the third section using the second part as a mask to form an amorphous silicon pattern and a semiconductor, etching the first and second metal patterns of the first section using the second part as a mask to form a source electrode and a drain electrode including an upper layer and a lower layer, and etching the amorphous silicon pattern of the region corresponding to the first section by using the second part as a mask to form an ohmic contact. | 03-15-2012 |
| 20120133873 | LIQUID CRYSTAL DISPLAY AND METHOD FOR MANUFACTURING THE SAME - A method of manufacturing a liquid crystal display includes: forming a gate line including a gate electrode on a first substrate; forming a gate insulating layer on the gate line; sequentially forming a semiconductor layer, an amorphous silicon layer, and a data metal layer on the entire surface of the gate insulating layer; aligning the edges of the semiconductor layer and the data metal layer; forming a transparent conductive layer on the gate insulating layer and the data metal layer; forming a first pixel electrode and a second pixel electrode by patterning the transparent conductive layer; and forming a data line including a source electrode, a drain electrode, and an ohmic contact layer by etching the data metal layer and the amorphous silicon layer, using the first pixel electrode and the second pixel electrode as a mask, and exposing the semiconductor between the source electrode and the drain electrode. | 05-31-2012 |
| 20120149158 | FLATTENING METHOD OF A SUBSTRATE - A method of flattening a substrate includes forming a metal layer on an upper surface of a substrate, forming a photoresist layer covering the substrate and the metal layer, radiating light to the photoresist layer, through a lower surface of the substrate opposite to the upper surface, exposing the metal layer by developing the photoresist layer, exposing the upper surface of the substrate by etching the metal layer, etching the exposed upper surface of the substrate, and removing the photoresist layer. | 06-14-2012 |
| 20120199838 | THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF - A manufacturing method of a thin film transistor array panel includes: simultaneously forming a gate conductor and a first electrode on a substrate, using a non-peroxide-based etchant; forming a gate insulating layer on the gate conductor and the first electrode; forming a semiconductor, a source electrode, and a drain electrode on the gate insulating layer; forming a passivation layer on the semiconductor, the source electrode, and the drain electrode; and forming a second electrode layer on the passivation layer. | 08-09-2012 |
| 20120208310 | NON-HALOGENATED ETCHANT AND METHOD OF MANUFACTURING A DISPLAY SUBSTRATE USING THE NON-HALOGENATED ETCHANT - Exemplary embodiments of the present invention disclose a non-halogenated etchant for etching an indium oxide layer and a method of manufacturing a display substrate using the non-halogenated etchant, the non-halogenated etchant including nitric acid, sulfuric acid, a corrosion inhibitor including ammonium, a cyclic amine-based compound, and water. | 08-16-2012 |
| 20120252148 | ECHTANT AND METHOD FOR MANUFACTURING DISPLAY DEVICE USING THE SAME - An etchant according to exemplary embodiments of the present invention includes about 0.5 wt % to about 20 wt % of persulfate, about 0.01 wt % to about 2 wt % of a fluorine compound, about 1 wt % to about 10 wt % of inorganic acid, about 0.5 wt % to about 5 wt % of a cyclic amine compound, about 0.1 wt % to about 5 wt % of a chlorine compound, about 0.05 wt % to about 3 wt % of copper salt, about 0.1 wt % to about 10 wt % of organic acid or organic acid salt, and water. | 10-04-2012 |
| 20120273787 | THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF - In a thin film transistor array panel according to an exemplary embodiment of the present invention, a plasma process using a mixed gas including hydrogen gas and nitrogen gas with a ratio of a predetermined value is undertaken before depositing a passivation layer. In this manner, performance deterioration of the thin film transistor may be prevented and simultaneously, haze in a transparent electrode may be prevented. Alternatively, a first passivation layer is depsoited, then removed. A passivation layer is again re-deposited, such that little or no haze is present in the resulting passivation layer. | 11-01-2012 |
| 20120318769 | METHOD OF FORMING A METAL PATTERN AND METHOD OF MANUFACTURING A DISPLAY SUBSTRATE INCLUDING THE METAL PATTERN - A method of forming a metal pattern on a display substrate includes blanket depositing a copper-based layer having a thickness between about 1,500 Å and about 5,500 Å on a base substrate, and forming a patterned photoresist layer on the copper-based layer. The copper-based layer is over-etched by an etching composition containing an oxidizing moderating agent where the over-etch factor is between about 40% and about 200% while using the patterned photoresist layer as an etch stopping layer, and where the etching composition includes ammonium persulfate between about 0.1% by weight and about 50% by weight, includes an azole-based compound between about 0.01% by weight and about 5% by weight and a remainder of water. Thus, reliability of the metal pattern and that of manufacturing a display substrate may be improved. | 12-20-2012 |
| 20130015452 | ARRAY SUBSTRATE AND METHOD FOR MANUFACTURING THE ARRAY SUBSTRATE - An array substrate including: a gate electrode and a gate insulation layer disposed on a base substrate, the gate insulation layer having a first thickness in a first region and a second thickness in a second region, the first thickness being greater than the second thickness; a semiconductor pattern disposed on the gate insulation layer in the first region, an end portion of the semiconductor pattern having a stepped portion with respect to the gate insulation layer; an ohmic contact pattern disposed on the semiconductor pattern, an end portion of the ohmic contact pattern opposite to a channel portion being aligned with the end portion of the semiconductor pattern; and source and drain electrodes disposed on the ohmic contact pattern, the source and drain electrodes spaced apart from each other and including first and second thin-film transistor patterns. | 01-17-2013 |
| 20130034923 | ETCHING COMPOSITION, METHOD OF FORMING A METAL PATTERN USING THE ETCHING COMPOSITION, AND METHOD OF MANUFACTURING A DISPLAY SUBSTRATE - An etching composition, a method of forming a metal pattern using the etching composition, and a method of manufacturing a display substrate are disclosed. The etching composition includes about 0.1% by weight to about 25% by weight of ammonium persulfate, about 0.1% by weight to about 25% by weight of an organic acid, about 0.01% by weight to about 5% by weight of a chelating agent, about 0.01% by weight to about 5% by weight of a fluoride compound, about 0.01% by weight to about 5% by weight of a chloride compound, about 0.01% by weight to about 2% by weight of an azole-based compound and a remainder of water. Thus, a copper layer may be stably etched to improve a reliability of manufacturing the metal pattern and the display substrate. | 02-07-2013 |
| 20130087800 | THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF - The present invention relates to a thin film transistor array panel and a manufacturing method thereof that prevent disconnection of wiring due to misalignment of a mask, and simplify a process and reduce cost by reducing the number of masks. The thin film transistor array panel according to the disclosure includes a source electrode enclosing an outer part of the first contact hole and formed on the second insulating layer; a drain electrode enclosing an outer part of the second contact hole and formed on the second insulating layer; a first connection electrode connecting the source region of the semiconductor layer and the source electrode through the first contact hole; and a second connection electrode connecting the drain region of the semiconductor layer and the drain electrode through the second contact hole. | 04-11-2013 |
| 20130140570 | THIN FILM TRANSISTOR ARRAY PANEL - A thin film transistor array panel includes an insulation substrate; a gate line on the insulation substrate; a gate insulating layer on the gate line; a data line on the gate insulating layer; a first insulating layer on the data line and including a first contact hole which exposes a portion of the data line; a first connection assistant member in the first contact hole; and further including a first field generating electrode on the first insulating layer. The first field generating electrode is in connection with the exposed portion of the data line through the first connection assistant member. | 06-06-2013 |
| 20130146900 | DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A display substrate includes a base substrate, a switching element, a protecting layer, an organic layer, a first pixel electrode and a second pixel electrode. The switching element is on the base substrate, and includes a gate electrode, a source electrode and a drain electrode. The protecting layer is on the switching element, and includes a first hole exposing the drain electrode. The organic layer is on the protecting layer, and includes a second hole which exposes a side surface of the protecting layer which defines the first hole and exposes a top surface of the protecting layer which is adjacent to the side surface of the protecting layer. The first pixel electrode is on the organic layer. The second pixel electrode overlaps the first pixel electrode, and is electrically connected to the drain electrode via the first and second holes. | 06-13-2013 |
| 20130153906 | THIN FILM TRANSISTOR ARRAY PANEL HAVING IMPROVED STORAGE CAPACITANCE AND MANUFACTURING METHOD THEREOF - A thin film transistor array panel is provided, which includes a gate line, a data line intersecting the gate line, a storage electrode apart from the gate and data lines, a thin film transistor connected to the gate and data lines and having a drain electrode, a pixel electrode connected to the drain electrode, a first insulating layer over the thin film transistor and disposed under the pixel electrode, and a second insulating layer disposed on the first insulating layer and having an opening exposing the first insulating layer on the storage electrode. | 06-20-2013 |
| 20130180947 | ETCHING COMPOSITION AND METHOD OF MANUFACTURING A DISPLAY SUBSTRATE USING THE SAME - An etching composition that includes, based on the total weight of the etching composition, from about 0.05% to about 15% by weight of a halogen-containing compound, from about 0.1% to about 20% by weight of a nitrate compound, from about 0.1% to about 10% by weight of an acetate compound, from about 0.1% to about 10% by weight of a cyclic amine compound, from about 0% to about 50% by weight of a polyhydric alcohol, and a remainder of water. | 07-18-2013 |
| 20130277666 | THIN FILM TRANSISTOR, THIN FILM TRANSISTOR ARRAY PANEL, AND METHOD OF MANUFACTURING A THIN FILM TRANSISTOR ARRAY PANEL - A thin film transistor array panel according to an exemplary embodiment of the invention includes: a substrate; a gate line positioned on the substrate and including a gate electrode; a gate insulating layer positioned on the gate line; an oxide semiconductor layer positioned on the substrate; a source electrode and a drain electrode positioned on the oxide semiconductor layer; a first insulating layer positioned on the source electrode and the drain electrode and including a first contact hole; a data line positioned on the first insulating layer and intersecting the gate line; and a pixel electrode over the first insulating layer. The source electrode and the drain electrode each comprise a metal oxide. The data line is electrically connected to the source electrode through the first contact hole. | 10-24-2013 |
| 20130306974 | MANUFACTURING METHOD OF THIN FILM TRANSISTOR ARRAY PANEL - A manufacturing method of a thin film transistor array panel includes: simultaneously forming a gate conductor and a first electrode on a substrate, using a non-peroxide-based etchant; forming a gate insulating layer on the gate conductor and the first electrode; forming a semiconductor, a source electrode, and a drain electrode on the gate insulating layer; forming a passivation layer on the semiconductor, the source electrode, and the drain electrode; and forming a second electrode layer on the passivation layer. | 11-21-2013 |
| 20140054579 | THIN FILM TRANSISTOR SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A thin film transistor substrate includes a base substrate, an active pattern, a gate insulation pattern and a gate electrode. The active pattern is disposed on the base substrate. The active pattern includes a source electrode, a drain electrode, and a channel disposed between the source electrode and the drain electrode. The gate insulation pattern and the gate electrode overlap with the channel. The gate insulation pattern is disposed between the channel and the gate electrode. The source electrode and the drain electrode each include a fluorine deposition layer. | 02-27-2014 |
| 20140063680 | SUBSTRATE FIXING DEVICE AND METHOD FOR MANUFACTURING THE SAME - In a substrate fixing device and a method form manufacturing the substrate fixing device, the substrate fixing device includes a lower electrode, a dielectric layer and a plurality of protrusions. The dielectric layer is disposed on the lower electrode. The protrusions are spaced apart from each other, and are protruded from the dielectric layer. Each of the protrusions includes an insulating layer disposed on the dielectric layer, and an upper layer disposed on the insulating layer and contacting a substrate. | 03-06-2014 |
| 20140117361 | THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF - A thin film transistor array panel includes a substrate, gate lines, each including a gate pad, a gate insulating layer, data lines, each including a data pad connected to a source and drain electrode, a first passivation layer disposed on the data lines and the drain electrode, a first electric field generating electrode, a second passivation layer disposed on the first electric field generating electrode, and a second electric field generating electrode. The gate insulating layer and the first and second passivation layers include a first contact hole exposing a part of the gate pad, the first and second passivation layers include a second contact hole exposing a part of the data pad, and at least one of the first and second contact holes have a positive taper structure having a wider area at an upper side than at a lower side. | 05-01-2014 |
| 20140124786 | THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF - The present invention relates to a thin film transistor array panel and a manufacturing method thereof that prevent disconnection of wiring due to misalignment of a mask, and simplify a process and reduce cost by reducing the number of masks. The thin film transistor array panel according to the disclosure includes a source electrode enclosing an outer part of the first contact hole and formed on the second insulating layer; a drain electrode enclosing an outer part of the second contact hole and formed on the second insulating layer; a first connection electrode connecting the source region of the semiconductor layer and the source electrode through the first contact hole; and a second connection electrode connecting the drain region of the semiconductor layer and the drain electrode through the second contact hole. | 05-08-2014 |
| 20140139795 | LIQUID CRYSTAL DISPLAY AND MANUFACTURING METHOD THEREOF - A liquid crystal display is provided. The liquid crystal display includes a substrate, a thin film transistor disposed on the substrate, a pixel electrode connected with a terminal of the thin film transistor, a microcavity disposed on the pixel electrode, the microcavity including a liquid crystal injection hole disposed at an edge of the microcavity, a supporting member disposed on the microcavity, a first hydrophobic layer disposed on an edge portion of the supporting member, and a capping layer disposed on the supporting member with the capping layer covering the liquid crystal injection hole. | 05-22-2014 |
| 20140147947 | Thin Film Transistor and Method for Manufacturing a Display Panel - Embodiments of the present invention relate to a thin film transistor and a manufacturing method of a display panel, and include forming a gate line including a gate electrode on a substrate, forming a gate insulating layer on the gate electrode, forming an intrinsic semiconductor on the gate insulating layer, forming an extrinsic semiconductor on the intrinsic semiconductor, forming a data line including a source electrode and a drain electrode on the extrinsic semiconductor, and plasma-treating a portion of the extrinsic semiconductor between the source electrode and the drain electrode to form a protection member and ohmic contacts on respective sides of the protection member. Accordingly, the process for etching the extrinsic semiconductor and forming an inorganic insulating layer for protecting the intrinsic semiconductor may be omitted such that the manufacturing process of the display panel may be simplified, manufacturing cost may be reduced, and productivity may be improved. | 05-29-2014 |
| 20140159059 | DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A method of manufacturing a display substrate includes forming a gate insulation layer on the base substrate on which a gate metal pattern, forming a data metal pattern on the gate insulation layer, sequentially forming a insulation layer and an organic layer on the base substrate on which the data metal pattern is formed, partially exposing the organic layer, developing the organic layer to partially remove the organic layer on the data metal pattern and to expose at least a portion of the protecting layer on the gate metal pattern, forming a common electrode on the organic layer, forming a pixel electrode on the on the organic layer, and forming an insulation layer between the pixel electrode and the common electrode. An etching degree of a data metal may be controlled by controlling a thickness of a remained organic layer to reduce a damage of the data metal. | 06-12-2014 |
| 20140167040 | THIN FILM TRANSISTOR, THIN FILM TRANSISTOR ARRAY PANEL INCLUDING THE SAME, AND METHOD OF MANUFACTURING THE SAME - A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode. | 06-19-2014 |
| 20140175424 | THIN FILM TRANSISTOR ARRAY PANEL AND METHOD OF MANUFACTURING THE SAME - A thin film transistor array panel includes: a substrate, a gate line positioned on the substrate and including a gate electrode, a semiconductor layer positioned on the substrate and including an oxide semiconductor, a data wire layer positioned on the substrate and including a data line crossing the gate line, a source electrode connected to the data line, and a drain electrode facing the source electrode, and a capping layer covering the data wire layer, in which an end of the capping layer is inwardly recessed as compared to an end of the data wire layer. | 06-26-2014 |
| 20140175441 | THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF - A thin film transistor array panel includes a substrate, an insulation layer, a first semiconductor, and a second semiconductor. The insulation layer is disposed on the substrate and includes a stepped portion. The first semiconductor is disposed on the insulation layer. The second semiconductor is disposed on the insulation layer and includes a semiconductor material different than the first semiconductor. The stepped portion is spaced apart from an edge of the first semiconductor. | 06-26-2014 |
| 20140183535 | THIN FILM TRANSISTOR ARRAY PANEL AND METHOD OF MANUFACTURING THE SAME - A thin film transistor array panel according to an exemplary embodiment of the invention includes: a substrate, a gate line disposed on the substrate and including a gate electrode, a gate insulating layer disposed on the gate line, a semiconductor disposed on the gate insulating layer, a data line disposed on the semiconductor and including a source electrode, a drain electrode disposed on the semiconductor and opposite to the source electrode, a color filter disposed on the gate insulating layer, the data line and the drain electrode, an overcoat disposed on the color filter and including an inorganic material, a contact hole defined in the color filter and the overcoat, where the contact hole exposes the drain electrode, and a pixel electrode disposed on the overcoat and connected through the contact hole to the drain electrode, in which a plane shape of the contact hole in the overcoat and a plane shape of the contact hole in the color filter are substantially the same as each other. | 07-03-2014 |
| 20140285742 | Display Panel and Method of Manufacturing the Same - A display panel includes a substrate, a first insulation layer, a first electrode, a liquid crystal layer, a second electrode and a second insulation layer. The substrate includes a thin film transistor (TFT). The first insulation layer is disposed on the substrate. The first electrode is disposed on the first insulation layer and is electrically connected to the TFT. The liquid crystal layer is disposed on the first electrode. The second electrode is disposed on the liquid crystal layer and includes a first grid structure adjacent to the liquid crystal layer. The second insulation layer is disposed on the second electrode and includes a second grid structure. Therefore, the durability of the display panel may be increased and light leakage may be prevented. | 09-25-2014 |
| 20140367706 | THIN FILM TRANSISTOR ARRAY PANEL AND METHOD OF MANUFACTURING THE SAME - A thin film transistor array panel includes a substrate; a gate line located over the substrate and including a gate pad portion; a data line located over the gate line and including a source electrode and a data pad portion; a drain electrode; a first passivation layer located over the data line and the drain electrode; an organic insulating layer located over the first passivation layer and having a contact hole; a first field generating electrode located over the organic insulating layer and having an opening; a second passivation layer located over the first field generating electrode; and a second field generating electrode located over the second passivation layer. The contact hole coincides with or is smaller than the opening, and the contact hole has a tapered structure. | 12-18-2014 |
| 20150037943 | METHOD OF FABRICATING DISPLAY DEVICE - A method of fabricating a display device includes forming a thin-film transistor including a gate electrode, a source electrode and a drain electrode on a substrate, forming a first insulating layer and a second insulating layer on the thin-film transistor, forming a common electrode on the second insulating layer by depositing a common electrode material on the second insulating layer, plasma-treating a photoresist pattern on the common electrode material, and etching the common electrode material using the plasma-treated photoresist pattern as a mask, defining a contact hole in the second insulating layer which corresponds to the drain electrode using the plasma-treated photoresist pattern and the common electrode as a mask, forming a third insulating layer on the second insulating layer and the common electrode to expose the contact hole and the drain electrode and forming a pixel electrode connected to the drain electrode on the third insulating layer. | 02-05-2015 |
| 20150044797 | METHODS OF MANUFACTURING THIN-FILM TRANSISTOR ARRAY SUBSTRATE AND LIQUID CRYSTAL DISPLAY - A method of manufacturing a thin film transistor array substrate includes providing a plurality of gate lines and a plurality of data lines on a first substrate, providing an organic layer on the gate lines and the data lines, providing a first electrode on the organic layer, providing a passivation layer on the first electrode, providing a second electrode on the passivation layer, providing a first cover layer on the second electrode to cover the second electrode, providing a plurality of photosensitive layer patterns on the first cover layer, providing a plurality of first cutout patterns in the first cover layer and a plurality of second cutout patterns in the second electrode using the photosensitive layer patterns as an etch mask, and providing a plurality of third cutout patterns in the passivation layer using the first cover layer as an etch mask. | 02-12-2015 |
| 20150053989 | DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE DISPLAY SUBSTRATE - A display substrate includes a base substrate, a common line on the base substrate, a first insulation layer covering the common line and having a first insulating material, a conductive pattern on the first insulation layer and including a source electrode and a drain electrode, a second insulation layer covering the drain electrode and the common line, and including a lower second insulation layer having a second insulating material and an upper second insulation layer having the first insulating material, a first electrode electrically connected to the drain electrode through a first contact hole in the second insulation layer, and a second electrode electrically connected to the common line through a second contact hole in the first and second insulation layers. The upper and lower second insulation layers on the drain electrode have a first hole and a second hole respectively that form the first contact hole. | 02-26-2015 |
| 20150072484 | THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF - A thin film transistor array panel includes a substrate, gate lines, each including a gate pad, a gate insulating layer, data lines, each including a data pad connected to a source and drain electrode, a first passivation layer disposed on the data lines and the drain electrode, a first electric field generating electrode, a second passivation layer disposed on the first electric field generating electrode, and a second electric field generating electrode. The gate insulating layer and the first and second passivation layers include a first contact hole exposing a part of the gate pad, the first and second passivation layers include a second contact hole exposing a part of the data pad, and at least one of the first and second contact holes have a positive taper structure having a wider area at an upper side than at a lower side. | 03-12-2015 |
