Patent application number | Description | Published |
20090309885 | Performance allocation method and apparatus - In accordance with some embodiments, a graphics process frame generation frame rate may be monitored in combination with a utilization or work load metric for the graphics process in order to allocate performance resources to the graphics process and in some cases, between the graphics process and a central processing unit. | 12-17-2009 |
20120223954 | PERFORMANCE ALLOCATION METHOD AND APPARATUS - In accordance with some embodiments, a graphics process frame generation frame rate may be monitored in combination with a utilization or work load metric for the graphics process in order to allocate performance resources to the graphics process and in some cases, between the graphics process and a central processing unit. | 09-06-2012 |
20130229420 | PERFORMANCE ALLOCATION METHOD AND APPARATUS - In accordance with some embodiments, a graphics process frame generation frame rate may be monitored in combination with a utilization or work load metric for the graphics process in order to allocate performance resources to the graphics process and in some cases, between the graphics process and a central processing unit. | 09-05-2013 |
20140095912 | Micro-Architectural Energy Monitor Event-Assisted Temperature Sensing - Methods and apparatus relating to micro-architectural energy monitor event-assisted temperature sensing are described. In one embodiment, at least one of a plurality of slices of a computational logic or at least one of a plurality of sub-slices of the computational logic are powered down or powered up based on a comparison of a temperature value, that is determined based on one or more micro-architectural events, and a threshold value. Other embodiments are also disclosed and claimed. | 04-03-2014 |
20140160136 | TECHNIQUES TO CONTROL FRAME DISPLAY RATE - Techniques to determine when to decrease a frame display rate based in part on the amount or degree of change between sequential frames. The amount or degree of change can be measured based on all or part of similarly located portions of sequential frames. In some cases, power use can be reduced without compromising visual quality by reducing frame display rate when an amount or degree of change between frames is small. | 06-12-2014 |
Patent application number | Description | Published |
20090167770 | BOOSTING GRAPHICS PERFORMANCE BASED ON EXECUTING WORKLOAD - A novel graphics system including workload detection software is disclosed. The novel graphics system increases the voltage and frequency of the graphics hardware in an integrated graphics chipset, depending on operations performed by the hardware, for either a performance advantage or a power savings advantage. | 07-02-2009 |
20090193274 | System And Method of Coherent Data Transfer During Processor Idle States - Systems and methods of managing power provide for placing a processor in a non-snoopable state, where the processor is associated with a system memory. One or more data transfers between a controller and the system memory can be serviced while the processor is in the non-snoopable state. In one embodiment, it is determined that the processor has flushed an internal cache of the processor to the system memory before placing the processor in the non-snoopable state. | 07-30-2009 |
20090300393 | DYNAMIC POWER CONTROL FOR REDUCED VOLTAGE LEVEL OF GRAPHICS CONTROLLER COMPONENT OF MEMORY CONTROLLER BASED ON ITS DEGREE OF IDLENESS - A method includes detecting a trigger condition, and in response to detecting the trigger condition, reducing a voltage applied to a graphics controller component of a memory controller. The reduction in voltage may cause the voltage to be reduced below a voltage level required to maintain context information in the graphics controller component. | 12-03-2009 |
20100162006 | ADAPTIVE POWER BUDGET ALLOCATION BETWEEN MULTIPLE COMPONENTS IN A COMPUTING SYSTEM - According to some embodiments, a power budget allocation engine of a multi-component computer system may receive a power budget allocation adjustment request signal from a first component. Based on the received budget allocation adjustment request signal (and, in some embodiments, a component preference), the power budget allocation engine may determine whether to adjust a power budget allocation signal provided to the first component. | 06-24-2010 |
20110090640 | METHOD AND APPARATUS FOR EXTERNAL PROCESSOR THERMAL CONTROL - A system and method for throttling a slave component of a computer system to reduce an overall temperature of the computing system upon receiving a first signal is disclosed. The first signal may be from a master component indicating that a temperature for the master component has exceeded its threshold temperature. The slave component or the master component may be a central processing unit, a graphics memory and controller hub, or a central processing unit memory controller hub. The slave component may send a second signal to indicate that a temperature for the slave component has exceeded its temperature. The master component would then initiate throttling of the master component to reduce the overall temperature of the computing system. The master component may be throttled to a degree less than the slave component. A first component may be designated the master component and the second component may be designated the slave component based on a selection policy. The selection policy may be received from a user through a graphical user interface. The selection policy may be based on an action being performed by the computing system. | 04-21-2011 |
20110320844 | DYNAMIC CONTROL OF REDUCED VOLTAGE STATE OF GRAPHICS CONTROLLER COMPONENT OF MEMORY CONTROLLER - A method includes detecting a trigger condition, and in response to detecting the trigger condition, reducing a voltage applied to a graphics controller component of a memory controller. The reduction in voltage may cause the voltage to be reduced below a voltage level required to maintain context information in the graphics controller component. | 12-29-2011 |
20120095607 | Method, Apparatus, and System for Energy Efficiency and Energy Conservation Through Dynamic Management of Memory and Input/Output Subsystems - According to one embodiment of the invention, an integrated circuit device comprises an interconnect, at least one compute engine and a control unit. Coupled to the at least one compute engine via the interconnect, the control unit to analyze heuristic information from the at least one compute engine and to increase or decrease a bandwidth of the interconnect based on the heuristic information. | 04-19-2012 |
20120169746 | METHOD, APPARATUS, AND SYSTEM FOR ENERGY EFFICIENCY AND ENERGY CONSERVATION INCLUDING NON FRAME AWARE FREQUENCY SELECTION - Systems and methods of adjusting a frequency of a graphics controller may include a logic to determine a metric associated with an input/output (I/O) queue. The metric may be used to determine whether an I/O limited condition exists. The I/O limited condition may be associated with a graphics controller. There may be a logic to cause a frequency of the graphics controller to be decreased when the I/O limited condition exists, and a logic to cause the frequency of the graphics controller to be increased when the I/O limited condition does not exist. The I/O limited condition may exist when a magnitude of the metric is equal to or greater than a first threshold. The I/O limited condition may not exist when the magnitude of the metric is equal to or less than a second threshold. | 07-05-2012 |
20120169747 | METHOD OF AND APPARATUS FOR DYNAMIC GRAPHICS POWER GATING FOR BATTERY LIFE OPTIMIZATION - A method includes executing a workload on a graphics (GFX) core in a first mode the GFX core comprising a plurality of Subslices wherein each of the plurality of Subslices dissipates power. The method further includes calculating a number of clock cycles, Tfirst mode, required for the GFX core to perform the workload in the first mode during a first decision window comprising a plurality of clock cycles and calculating a number of clock cycles, Tsecond mode, required for the GFX core to perform the workload in a second mode during the first decision window wherein the second mode comprises executing the workload with fewer of the plurality of Subslices receiving power than when executing the workload in the first mode. It is then determined, based in part upon Tfirst mode and Tsecond mode, if an energy savings is possible by transitioning the GFX core to the second mode. | 07-05-2012 |
20120179927 | METHOD, APPARATUS, AND SYSTEM FOR ENERGY EFFICIENCY AND ENERGY CONSERVATION INCLUDING AUTONOMOUS HARDWARE-BASED DEEP POWER DOWN IN DEVICES - Embodiments of systems, apparatuses, and methods for energy efficiency and energy conservation including enabling autonomous hardware-based deep power down of devices are described. In one embodiment, a system includes a device, a static memory, and a power control unit coupled with the device and the static memory. The system further includes a deep power down logic of the power control unit to monitor a status of the device, and to transfer the device to a deep power down state when the device is idle. In the system, the device consumes less power when in the deep power down state than in the idle state. | 07-12-2012 |
20120192200 | Load Balancing in Heterogeneous Computing Environments - Load balancing may be achieved in heterogeneous computing environments by first evaluating the operating environment and workload within that environment. Then, if energy usage is a constraint, energy usage per task for each device may be evaluated for the identified workload and operating environments. Work is scheduled on the device that maximizes the performance metric of the heterogeneous computing environment. | 07-26-2012 |
20120331321 | Processor Core with Higher Performance Burst Operation with Lower Power Dissipation Sustained Workload Mode - A processor may operate at a first frequency level for a first time interval. The processor automatically may transition to a sleep state from the first frequency level after the first time interval. Then the processor automatically transitions from the sleep state to the first frequency level after a second time interval. As a result the processor may operate at a reduced power consumption and higher performance. | 12-27-2012 |
20130054992 | DYNAMIC CONTROL OF REDUCED VOLTAGE STATE OF GRAPHICS CONTROLLER COMPONENT OF MEMORY CONTROLLER - A method includes detecting a trigger condition, and in response to detecting the trigger condition, reducing a voltage applied to a graphics controller component of a memory controller. The reduction in voltage may cause the voltage to be reduced below a voltage level required to maintain context information in the graphics controller component. | 02-28-2013 |
20130111236 | Controlling Operating Frequency Of A Core Domain Via A Non-Core Domain Of A Multi-Domain Processor | 05-02-2013 |
20130179709 | Controlling Operating Frequency Of A Core Domain Via A Non-Core Domain Of A Multi-Domain Processor - In one embodiment, the present invention includes a method for determining that a non-core domain of a multi-domain processor is not operating at a frequency requested by the non-core domain, sending a request from the non-core domain to a power controller to reduce a frequency of a core domain of the multi-domain processor, and responsive to the request, reducing the core domain frequency. Other embodiments are described and claimed. | 07-11-2013 |
20130286026 | Reconfigurable Graphics Processor for Performance Improvement - Power gating a portion of a graphics processor may be used to improve performance or to achieve a power budget. A processor granularity, such as a slice or subslice, may be gated. | 10-31-2013 |
20140032954 | DYNAMIC CONTROL OF REDUCED VOLTAGE STATE OF GRAPHICS CONTROLLER COMPONENT OF MEMORY CONTROLLER - A method includes detecting a trigger condition, and in response to detecting the trigger condition, reducing a voltage applied to a graphics controller component of a memory controller. The reduction in voltage may cause the voltage to be reduced below a voltage level required to maintain context information in the graphics controller component. | 01-30-2014 |
20140125679 | Dynamically Rebalancing Graphics Processor Resources - According to some embodiments, performance bottlenecks that arise in particular resources within a graphic processor unit may be alleviated by dynamically rebalancing workloads among the resources, with the goal of removing the current performance bottleneck, while at the same time maintaining power dissipation within a currently allocated power budget. In some embodiments this may be achieved by defining a separate clock domain for each of the plurality of graphics processor resources whose performance may then be rebalanced. | 05-08-2014 |
20140204101 | ADAPTIVE FRAME RATE CONTROL FOR A GRAPHICS SUBSYSTEM - Examples are disclosed for adjusting a performance state of a graphics subsystem and/or a processor based on a comparison of an average frame rate to a target frame rate and also based on whether the graphics subsystem is in a burst mode or sustained mode of operation. | 07-24-2014 |
20150012768 | DYNAMIC CONTROL OF REDUCED VOLTAGE STATE OF GRAPHICS CONTROLLER COMPONENT OF MEMORY CONTROLLER - A method includes detecting a trigger condition, and in response to detecting the trigger condition, reducing a voltage applied to a graphics controller component of a memory controller. The reduction in voltage may cause the voltage to be reduced below a voltage level required to maintain context information in the graphics controller component. | 01-08-2015 |
20150035853 | Partial Tile Rendering - In accordance with some embodiments, partial rendering of non-changing or slowly changing frame tiles allows the graphics processing unit to spend less time processing non-changing or slowly changing portions of each frame, saving power and creating more room for performance in some embodiments. | 02-05-2015 |
Patent application number | Description | Published |
20140067195 | ON BOARD DIAGNOSTIC (OBD) DEVICE SYSTEM AND METHOD - Systems and methods for processing and transmitting on-board diagnostics (OBD) signals are provided. An electronic device includes a housing, an OBD engagement member configured to physically engage with an OBD port of an (FHV) and receive power and data communications therefrom. Computer circuitry disposed at least partially within the housing is configured to receive time, location, and/or distance information associated with a trip taken by the FHV, the information being received through the OBD port of the FHV. The computer circuitry is further configured to wirelessly communicate with one or more computing devices disposed within the FHV over a local area network when the on-board diagnostics device is connected to the OBD port. | 03-06-2014 |
20140067488 | MOBILE FOR-HIRE-VEHICLE HAILING SYSTEM AND METHOD - Systems and methods for engaging a for-hire vehicle (FHV) are provided. A mobile computing device receives information from a remote server indicating FHV activity in a geographical region of interest. A user interface of the mobile computing device displays a map having one or more icons thereon indicating locations of one or more FHVs. A user provides an input indicating a desire to hail one of the one or more FHVs, and receives an acceptance of hail. Once within range of the FHV, the device links with a computing device disposed within the hailed FHV over a local area network, providing information related an FHV trip to the remote server, receiving a calculated fare, and displaying the calculated fare to the user. | 03-06-2014 |
20140067489 | FOR-HIRE-VEHICLE PARAMETER UPDATE AND MANAGEMENT SYSTEM AND METHOD - Systems and methods for updating and managing for-hire vehicle (FHV) fare calculation algorithms and parameters are provided. Fare calculation and parameter information associated with a plurality of jurisdictions regulated by one or more regulatory entities is stored in a database. An authorized user may use a web-based software program to input updated fare calculation and parameter information for a jurisdiction. The updated fare calculation and parameter information is stored, and trip fares are calculated based at least partially on the updated fare calculation and where appropriate parameter information as well as trip distance and/or time information provided by a mobile computing device when the fare is related to an FHV trip taken within the jurisdiction. | 03-06-2014 |
20140067490 | FOR-HIRE VEHICLE FARE AND PARAMETER CALCULATION SYSTEM AND METHOD - Systems and methods for calculating fares for-hire vehicle (FHV) trips are provided. Trip data, such as time, distance, location, or other trip-related data, is received over a network from a computing device disposed within a remotely-located FHV. The trip data is used to calculate a trip fare, which is provided to the computing device over a wide area network. | 03-06-2014 |
20140067491 | TRANSPORTATION CONTROL AND REGULATION SYSTEM AND METHOD FOR FOR-HIRE VEHICLES - Systems and methods for monitoring and regulating for-hire vehicles (FHV) are provided. A server receives information relating to authorized vehicles (often based on medallions assigned by the local government transportation agency), algorithms and parameters for FHV fare calculation, as well as information about authorized drivers and authorized dispatchers, from one or in some cases several regulatory entities. The server receives time and/or distance data associated with an FHV trip from a device (usually a mobile device like a smart phone for example) traveling with the FHV and uses such information to calculate a fare for the trip. The server is configured to receive requests for transportation services from mobile devices, and to dispatch FHVs, either directly (by automatically sending a dispatch signal to the selected FHV) or through a third-party (such as a traditional dispatch service). The collected real-time information may be used to optimize the utilization of FHV resources. | 03-06-2014 |
Patent application number | Description | Published |
20090005675 | Apparatus and Method for Endovascular Device Guiding and Positioning Using Physiological Parameters - An endovascular access and guidance system has an elongate body with a proximal end and a distal end; a non-imaging ultrasound transducer on the elongate body configured to provide in vivo non-image based ultrasound information of the vasculature of the patient; an endovascular electrogram lead on the elongate body in a position that, when the elongate body is in the vasculature, the endovascular electrogram lead electrical sensing segment provides an in vivo electrogram signal of the patient; a processor configured to receive and process a signal from the non-imaging ultrasound transducer and a signal from the endovascular electrogram lead; and an output device configured to display a result of information processed by the processor. An endovascular device has an elongate body with a proximal end and a distal end; a non-imaging ultrasound transducer on the elongate body; and an endovascular electrogram lead on the elongate body in a position that, when the endovascular device is in the vasculature, the endovascular electrogram lead is in contact with blood. The method of positioning an endovascular device in the vasculature of a body is performed by advancing the endovascular device into the vasculature; transmitting a non-imaging ultrasound signal into the vasculature using a non-imaging ultrasound transducer on the endovascular device; receiving a reflected ultrasound signal with the non-imaging ultrasound transducer; detecting an endovascular electrogram signal with a sensor on the endovascular device; processing the reflected ultrasound signal received by the non-imaging ultrasound transducer and the endovascular electrogram signal detected by the sensor; and positioning the endovascular device based on the processing step. | 01-01-2009 |
20090118612 | Apparatus and Method for Vascular Access - In an aspect, embodiments of the invention relate to the effective and accurate placement of intravascular devices such as central venous catheters, in particular such as peripherally inserted central catheters or PICC. One aspect of the present invention relates to vascular access. It describes devices and methods for imaging guided vascular access and more effective sterile packaging and handling of such devices. A second aspect of the present invention relates to the guidance, positioning and placement confirmation of intravascular devices without the help of X-ray imaging. A third aspect of the present invention relates to devices and methods for the skin securement of intravascular devices and post-placement verification of location of such devices. A forth aspect of the present invention relates to improvement of the workflow required for the placement of intravascular devices. | 05-07-2009 |
20130123888 | HOT TIP LASER GENERATED VAPOR VEIN THERAPY DEVICE - Methods and apparatus for generating vapor within a catheter are provided which may include any number of features. One feature is generating vapor with a fiber optic, laser fiber optic, or fiber optic bundle within a catheter. Another feature is sensing a temperature of the fiber optic, and adjusting the power delivered to the electrode array to fully generate vapor within the catheter. Another feature is delivering the vapor to a vein of a patient for vein reduction therapy. | 05-16-2013 |
20130289417 | APPARATUS AND METHOD FOR ENDOVASCULAR DEVICE GUIDING AND POSITIONING USING PHYSIOLOGICAL PARAMETERS - Systems and methods for determining the position of an endovascular device within the body are provided. The system can include a catheter having a tip portion that can generate sound waves which can be detected by auscultation devices which allows the position of the catheter tip to be triangulated. The acoustic triangulation system can be used in conjunction with ECG and/or ultrasound information to further refine the location of the catheter tip. | 10-31-2013 |