| Patent application number | Description | Published |
|---|
| 20090070618 | SYSTEM AND METHOD FOR CALIBRATING A TOD CLOCK - A system, method and computer program product for calibrating a Time Of Day (TOD)-clock in a computing system node provided in a multi-node network. The network comprises an infrastructure of computing devices each having a physical clock providing a time base for executing operations that is stepped to a common oscillator. The system implements steps for obtaining samples of timing values of a computing device in the network, the values including a physical clock value maintained at that device and a TOD-offset value; computing an oscillator skew value from the samples; setting a fine steering rate value as equal to the opposite of the computed oscillator skew value; and, utilizing the fine steering rate value to adjust the physical clock value and correct for potential oscillator skew errors occurring in the oscillator crystal at the computing device. | 03-12-2009 |
| 20090094441 | Perform Floating Point Operation Instruction - A method and system are disclosed for executing a machine instruction in a central processing unit. The method comprise the steps of obtaining a perform floating-point operation instruction; obtaining a test bit; and determining a value of the test bit. If the test bit has a first value, (a) a specified floating-point operation function is performed, and (b) a condition, code is set to a value determined by said specified function. If the test bit has a second value, (c) a check is made to determine if said specified function is valid and installed on the machine, (d) if said specified function is valid and installed on the machine, the condition code is set to one code value, and (c) if said specified function is either not valid or not installed on the machine, the condition code is set to a second code value. | 04-09-2009 |
| 20090100197 | PULSE-PER-SECOND ATTACHMENT FOR STP - A time synchronization apparatus, method and system are provided. In one aspect, the apparatus comprises at least a time of day clock, a first port operable to receive at least first time information using a first time protocol, a second port operable to receive at least second time information using a second time protocol, a third port operable to receive at least a timing signal, and a time stamp register operable to at least capture current value of the time of day clock upon receipt of the timing signal from the third port or the first time information from the first port or combination thereof. | 04-16-2009 |
| 20090138678 | Multifunction Hexadecimal Instruction Form System and Program Product - A new zSeries floating-point unit has a fused multiply-add dataflow capable of supporting two architectures and fused MULTIPLY and ADD and Multiply and SUBTRACT in both RRF and RXF formats for the fused functions. Both binary and hexadecimal floating-point instructions are supported for a total of 6 formats. The floating-point unit is capable of performing a multiply-add instruction for hexadecimal or binary every cycle with a latency of 5 cycles. This supports two architectures with two internal formats with their own biases. This has eliminated format conversion cycles and has optimized the width of the dataflow. The unit is optimized for both hexadecimal and binary floating-point architecture supporting a multiply-add/subtract per cycle. | 05-28-2009 |
| 20090164803 | Cipher Message Assist Instruction - A method, system and program product for executing a cipher message assist instruction in a computer system by specifying, via the cipher message assist instruction, either a capability query installed function or execution of a selected function of one or more optional functions, wherein the selected function is an installed optional function, wherein the capability query determines which optional functions of the one or more optional functions are installed on the computer system. | 06-25-2009 |
| 20090259875 | Store Clock and Store Clock Fast Instruction Execution - Two forms of TOD Clock instructions are provided, Store Clock and Store Clock Fast. Execution of the Store Clock Fast instruction may produce a time of day (TOD) result that is exactly the same as a previous TOD result, however execution of Store Clock Fast instructions while the clock is running always produce unique TOD results. | 10-15-2009 |
| 20090300401 | PERFORMING A PERFORM TIMING FACILITY FUNCTION INSTRUCTION FOR SYCHRONIZING TOD CLOCKS - A system, method and computer program product for performing a Perform Timing Facility (PTFF) instruction for steering a Time of Day (TOD) clock of the computer system for synchronizing the TOD clock with TOD clocks of other computer systems. The computer system comprises a memory; and, a processor in communications with the computer memory. The processor is capable of performing a PTFF instruction comprising: obtaining a function code specified in a first general register, the function code for identifying any one of a query function or a control function to be performed; obtaining, from a second general register, a memory address of a parameter block; responsive to the function code specifying a query function, storing timing information of the computer system in the parameter block according to the specified query function; responsive to the function code specifying a control function, using timing information obtained from the parameter block to perform the specified control function; and setting a condition code value indicating an outcome of the specified function. | 12-03-2009 |
| 20100185889 | CHANNEL SUBSYSTEM SERVER TIME PROTOCOL COMMANDS - A protocol for communicating with the timing facility used in a data processing network to provide synchronization is provided via the execution of a machine instruction that accepts a plurality of commands. The interaction is provided through the use of message request blocks and their associated message response blocks. In this way timing parameters may be determined, modified and communicated. This makes it much easier for multiple servers or nodes in a data processing network to exist as a coordinated timing network and to thus more cooperatively operate on the larger yet identical data files. | 07-22-2010 |
| 20100223317 | SERVER TIME PROTOCOL MESSAGES AND METHODS - Server time protocol (STP) messages and methods of exchange thereof are provided for facilitating synchronization of processing units of a timing network. The STP messages include exchange time parameters (XTP) commands and responses, and STP control (STC) commands and responses. XTP message exchange processing includes: generating an XTP message command at a first processing unit including a command transmit timestamp field set by the first processing unit and a command receive timestamp field which is unset by the first processing unit; transmitting the XTP message command to a second processing unit; setting the command receive timestamp field in the XTP command with the time the XTP command is received at the second processing unit; and generating an XTP message response at the second processing unit, the message response including the command transmit timestamp set by the first processing unit and the command receive timestamp set by the second processing unit. | 09-02-2010 |
| 20110185157 | MULTIFUNCTION HEXADECIMAL INSTRUCTION FORM SYSTEM AND PROGRAM PRODUCT - A new zSeries floating-point unit has a fused multiply-add dataflow capable of supporting two architectures and fused MULTIPLY and ADD and Multiply and SUBTRACT in both RRF and RXF formats for the fused functions. Both binary and hexadecimal floating-point instructions are supported for a total of 6 formats. The floating-point unit is capable of performing a multiply-add instruction for hexadecimal or binary every cycle with a latency of 5 cycles. This supports two architectures with two internal formats with their own biases. This has eliminated format conversion cycles and has optimized the width of the dataflow. The unit is optimized for both hexadecimal and binary floating-point architecture supporting a multiply-add/subtract per cycle. | 07-28-2011 |
| 20110213818 | SHIFT SIGNIFICAND OF DECIMAL FLOATING POINT DATA - A decimal floating point finite number in a decimal floating point format is composed from the number in a different format. A decimal floating point format includes fields to hold information relating to the sign, exponent and significand of the decimal floating point finite number. Other decimal floating point data, including infinities and NaNs (not a number), are also composed. Decimal floating point data are also decomposed from the decimal floating point format to a different format. For composition and decomposition, one or more instructions may be employed, including a shift significand instruction. | 09-01-2011 |
| 20110214042 | DETECTION OF POTENTIAL NEED TO USE A LARGER DATA FORMAT IN PERFORMING FLOATING POINT OPERATIONS - Detection of whether a result of a floating point operation is safe. Characteristics of the result are examined to determine whether the result is safe or potentially unsafe, as defined by the user. An instruction is provided to facilitate detection of safe or potentially unsafe results. | 09-01-2011 |
| 20120047190 | Composition of Decimal Floating Point Data - A decimal floating point finite number in a decimal floating point format is composed from the number in a different format. A decimal floating point format includes fields to hold information relating to the sign, exponent and significand of the decimal floating point finite number. Other decimal floating point data, including infinities and NaNs (not a number), are also composed. Decimal floating point data are also decomposed from the decimal floating point format to a different format. | 02-23-2012 |
| 20120096283 | OPTIONAL FUNCTION MULTI-FUNCTION INSTRUCTION IN AN EMULATED COMPUTING ENVIRONMENT - A method, system and program product for executing a multi-function instruction in an emulated computer system by specifying, via the multi-function instruction, either a capability query or execution of a selected function of one or more optional functions, wherein the selected function is an installed optional function, wherein the capability query determines which optional functions of the one or more optional functions are installed on the computer system. | 04-19-2012 |
| 20120173917 | PERFORMING A PERFORM TIMING FACILITY FUNCTION INSTRUCTION FOR SYNCHRONIZING TOD CLOCKS - A system, method and computer program product for steering a time-of-day (TOD) clock for a computer system having a physical clock providing a time base for executing operations that is stepped to a common oscillator. The method includes receiving, at a processing unit, a request to change a clock steering rate used to control a TOD-clock offset value for the processing unit, the TOD-clock offset defined as a function of a start time (s), a base offset (b), and a steering rate (r). The unit schedules a next episode start time with which to update the TOD-clock offset value. After updating TOD-clock offset value (d) at the scheduled time, TOD-clock offset value is added to a physical-clock value (Tr) value to obtain a logical TOD-clock value (Tb), where the logical TOD-clock value is adjustable without adjusting a stepping rate of the oscillator. | 07-05-2012 |
| 20120254628 | CIPHER MESSAGE EXECUTION IN A COMPUTING SYSTEM - A method, system and program product for executing a multi-function instruction in an emulated computer system by specifying, via the multi-function instruction, either a capability query or execution of a selected function of one or more optional functions, wherein the selected function is an installed optional function, wherein the capability query determines which optional functions of the one or more optional functions are installed on the computer system. | 10-04-2012 |
| 20130191619 | MULTIFUNCTION HEXADECIMAL INSTRUCTION FORM SYSTEM AND PROGRAM PRODUCT - A new zSeries floating-point unit has a fused multiply-add dataflow capable of supporting two architectures and fused MULTIPLY and ADD and Multiply and SUBTRACT in both RRF and RXF formats for the fused functions. Both binary and hexadecimal floating-point instructions are supported for a total of 6 formats. The floating-point unit is capable of performing a multiply-add instruction for hexadecimal or binary every cycle with a latency of 5 cycles. This supports two architectures with two internal formats with their own biases. This has eliminated format conversion cycles and has optimized the width of the dataflow. The unit is optimized for both hexadecimal and binary floating-point architecture supporting a multiply-add/subtract per cycle. | 07-25-2013 |
| 20130226981 | Round for Reround Mode in a Decimal Floating Point Instruction - A round-for-reround mode (preferably in a BID encoded Decimal format) of a floating point instruction prepares a result for later rounding to a variable number of digits by detecting that the least significant digit may be a 0, and if so changing it to 1 when the trailing digits are not all 0. A subsequent reround instruction is then able to round the result to any number of digits at least 2 fewer than the number of digits of the result. An optional embodiment saves a tag indicating the fact that the low order digit of the result is 0 or 5 if the trailing bits are non-zero in a tag field rather than modify the result. Another optional embodiment also saves a half-way-and-above indicator when the trailing digits represent a decimal with a most significant digit having a value of 5. An optional subsequent reround instruction is able to round the result to any number of digits fewer or equal to the number of digits of the result using the saved tags. | 08-29-2013 |
| 20130254478 | CHANNEL SUBSYSTEM SERVER TIME PROTOCOL COMMANDS - A protocol for communicating with the timing facility used in a data processing network to provide synchronization is provided via the execution of a machine instruction that accepts a plurality of commands. The interaction is provided through the use of message request blocks and their associated message response blocks. In this way timing parameters may be determined, modified and communicated. This makes it much easier for multiple servers or nodes in a data processing network to exist as a coordinated timing network and to thus more cooperatively operate on the larger yet identical data files. | 09-26-2013 |
| 20140095563 | Shift Significand of Decimal Floating Point Data - A decimal floating point finite number in a decimal floating point format is composed from the number in a different format. A decimal floating point format includes fields to hold information relating to the sign, exponent and significand of the decimal floating point finite number. Other decimal floating point data, including infinities and NaNs (not a number), are also composed. Decimal floating point data are also decomposed from the decimal floating point format to a different format. For composition and decomposition, one or more instructions may be employed, including a shift significand instruction. | 04-03-2014 |
| 20140114641 | MULTI-FUNCTION INSTRUCTION THAT DETERMINES WHETHER FUNCTIONS ARE INSTALLED ON A SYSTEM - A method, system and program product for executing a multi-function instruction in an emulated computer system by specifying, via the multi-function instruction, either a capability query or execution of a selected function of one or more optional functions, wherein the selected function is an installed optional function, wherein the capability query determines which optional functions of the one or more optional functions are installed on the computer system. | 04-24-2014 |
| 20140188962 | Executing Perform Floating Point Operation Instructions - A perform floating-point operation instruction is executed specifying a Test (T) bit of general register 0, if the T bit is ‘1’ the execution sets a condition code value indicating whether a specified conversion function is installed, if the T bit is ‘0’ the execution stores a result of a specified floating-point conversion function in general register 0 and sets a condition code value. | 07-03-2014 |
| 20140304314 | Decomposition Of Decimal Floating Point Data - A decimal floating point finite number in a decimal floating point format is composed from the number in a different format. A decimal floating point format includes fields to hold information relating to the sign, exponent and significand of the decimal floating point finite number. Other decimal floating point data, including infinities and NaNs (not a number), are also composed. Decimal floating point data are also decomposed from the decimal floating point format to a different format. | 10-09-2014 |
| 20140325014 | CHANNEL SUBSYSTEM SERVER TIME PROTOCOL COMMANDS - A protocol for communicating with the timing facility used in a data processing network to provide synchronization is provided via the execution of a machine instruction that accepts a plurality of commands. The interaction is provided through the use of message request blocks and their associated message response blocks. In this way timing parameters may be determined, modified and communicated. This makes it much easier for multiple servers or nodes in a data processing network to exist as a coordinated timing network and to thus more cooperatively operate on the larger yet identical data files. | 10-30-2014 |
