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| 20100218673 | PISTON WITH CENTRAL DIRECTIONAL OIL FLOW AND WRIST PIN LUBRICATION FEATURE AND METHOD OF CONSTRUCTION THEREOF - A piston has a piston body extending along a central axis. The piston body has an upper crown portion and a lower crown portion. The upper crown portion has an upper combustion wall and an at least one annular upper rib depending from the upper combustion wall to a free end. The lower crown portion has at least one annular lower rib extending to a free end that is fixed to the at least one upper rib and an inner gallery floor extending radially inwardly relative to the at least one lower rib. The upper crown portion has an upper post depending from the upper combustion wall along the central axis to a free end. The lower crown portion has a lower post extending upwardly from the inner gallery floor along the central axis to a free. Together, the upper post and the lower post form a labyrinth passage. | 09-02-2010 |
| 20110146074 | REINFORCED DUAL GALLERY PISTON AND METHOD OF CONSTRUCTION - A method of friction welding a piston includes forming a piston body by friction welding an upper crown portion to a lower crown portion. At least one of the upper or lower crown portions is provided with a central support post extending along a central axis. The upper and lower crown portions have annular ribs radially outwardly from the central support post, with the ribs being aligned with one another. The method includes initiating a friction weld joint between a free end of the central support post and a corresponding surface opposite the free end of the central support post. Then, after initiating the weld joint between the central support post and the opposite surface, the method continues by then initiating a friction weld joint between aligned free ends of the ribs. Then, the friction weld joints are completed. | 06-23-2011 |
| 20120260882 | PISTON AND METHOD OF MAKING A PISTON - A one-piece piston including a combustion bowl which is cast to its final form and includes at least one irregularity spaced from a central axis. The piston is initially fabricated of an upper crown member and a lower crown member, which are joined together. The piston is then chucked into a machine tool, such as a CNC lathe, which locates either the piston's top surface or a portion of the combustion bowl and establishes its location as a datum plane. It is this datum plane which serves as a reference location for subsequent machining operations of the piston. | 10-18-2012 |
| 20130068094 | Piston, Method of Construction, and Piston Body Portions Thereof - A method of constructing a piston, piston formed thereby, and piston body portions are provided. The method includes providing an upper crown portion at least one annular upper rib depending from the upper combustion wall to a free end having a tapered peak. The method further includes providing a lower crown portion having at least one annular lower rib extending to a free end having a tapered peak. Then, moving the upper crown portion and the lower crown portion toward one another and initiating contact between the upper crown portion and the lower crown portion at their respective tapered peaks. Then, continuing moving the upper crown and the lower crown further toward one another after making initial contact at their respective tapered peaks and forming a friction weld joint between the free ends of the at least one upper rib and the at least one lower rib free end. | 03-21-2013 |
| 20140299091 | PISTON MADE USING ADDITIVE MANUFACTURING TECHNIQUES - A monobloc piston body for an internal combustion engine is provided. The piston body includes a first piece which includes a pair of skirt portions and a pair of pin bosses and a second piece which includes a crown portion with an upper combustion surface and an at least partially enclosed oil gallery. The first and second pieces are joined together at a joint that is located on a side of the oil gallery opposite of the upper combustion surface. The firs piece is made through casting or forging, and the second piece is made through an additive manufacturing process, such as direct metal laser sintering. | 10-09-2014 |
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| 20120277493 | Process to Recover Alcohol with Secondary Reactors for Hydrolysis of Acetal - A process for recovering ethanol obtained from the hydrogenation of acetic acid. The crude ethanol product is separated in a column to produce a distillate stream comprising acetaldehyde and ethyl acetate and a residue stream comprising ethanol, acetic acid and water. Acetal byproduct can be reduced or removed through configurations of hydrolysis secondary reactors. The ethanol product is recovered from the residue stream. | 11-01-2012 |
| 20120277494 | Process to Reduce Ethanol Recycled to Hydrogenation Reactor - The present invention is directed to processes for recovering ethanol obtained from the hydrogenation of acetic acid. Acetic acid is hydrogenated in the presence of a catalyst in a hydrogenation reactor to form a crude ethanol product. The crude ethanol product is separated in one or more columns to recover ethanol. In some embodiments, less than 10 wt. % ethanol is recycled to the hydrogenation reactor. | 11-01-2012 |
| 20120277496 | Process for Producing Ethanol and Reducing Acetic Acid Concentration - A process for producing ethanol and, in particular, to a process for reducing the concentration of acetic acid in a crude ethanol product by esterifying unreacted acetic acid with an alcohol. | 11-01-2012 |
| 20120277497 | Process to Recover Alcohol with Reduced Water From Overhead of Acid Column - A process for recovering ethanol obtained from the hydrogenation of acetic acid. The crude ethanol product is separated in a column to produce a distillate stream comprising acetaldehyde and ethyl acetate and a residue stream comprising ethanol, acetic acid, ethyl acetate and water. The ethanol product is recovered from the residue stream. | 11-01-2012 |
| 20130109891 | Process to Recover Alcohol with Secondary Reactors for Esterification of Acid | 05-02-2013 |
| 20150099905 | Process to Recover Alcohol with Reduced Water From Overhead of Acid Column - A process for recovering ethanol obtained from the hydrogenation of acetic acid. The crude ethanol product is separated in a column to produce a distillate stream comprising acetaldehyde and ethyl acetate and a residue stream comprising ethanol, acetic acid, ethyl acetate and water. The ethanol product is recovered from the residue stream. | 04-09-2015 |
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| 20120180702 | ZEOLITE AND WATER SLURRIES FOR ASPHALT CONCRETE PAVEMENT - Embodiments provide slurries of water and zeolite. These slurries have beneficial properties when mixed with asphalt. These beneficial properties may include extension of the asphalt as well as a decrease in the temperature used to process the cement. In some embodiments additional additives are included, such as anti-strip amines. Methods of making and using the slurries, as well as cement mixtures incorporating the slurries are also included herein. | 07-19-2012 |
| 20130000510 | ZEOLITE IMPREGNATED WITH TITANIUM DIOXIDE - Embodiments of the invention relate to methods for making and compositions including zeolite with an impregnated titanium dioxide. Such zeolite/titanium dioxide compositions may be useful, for example, as a substitute or extender for titanium dioxide used in coatings. | 01-03-2013 |
| 20130118378 | SILICA HYDROGEL IMPREGNATED WITH TiO2 AND METHOD OF MAKING SAME - Embodiments of the invention relate to methods and compositions for formation of silica-based hydrogels including titanium dioxide (TiO | 05-16-2013 |
| 20130180431 | ZEOLITE AND LIME COMBINATIONS FOR WARM MIX ASPHALT - Embodiments are presented herein that provide a filler that is a combination of zeolite and hydrated lime. Addition of this filler to asphalt is more beneficial than addition of either zeolite or hydrated lime alone. The beneficial properties of zeolite include a controlled release of moisture that aids mixture workability and the ability of the asphalt to effectively coat the aggregate particles. The mixture of zeolite and hydrated lime is easier to handle and integrate into a process than use of either compound alone, and it offers a number of other benefits. | 07-18-2013 |
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| 20110051310 | Memcapacitive Devices - A memcapacitive device includes a first electrode having a first end and a second end and a second electrode. The device has a memcapacitive matrix interposed between the first electrode and the second electrode. The memcapacitive matrix has a non-linear capacitance with respect to a voltage across the first electrode and the second electrode. The memcapacitive matrix is configured to alter a signal applied on the first end by at least one of a) changing at least one of a rise-time and a fall-time of the signal and b) delaying the transmission of the signal based on the application of a programming voltage across the first electrode and the second electrode. | 03-03-2011 |
| 20110309321 | MEMRISTORS WITH A SWITCHING LAYER COMPRISING A COMPOSITE OF MULTIPLE PHASES - A memristor with a switching layer that includes a composite of multiple phases is disclosed. The memristor comprises: a first electrode; a second electrode spaced from the first electrode; and a switching layer positioned between the first electrode and the second electrode, the switching layer comprising the multi-phase composite system that comprises a first majority phase comprising a relatively insulating matrix of a switching material and a second minority phase comprising a relatively conducting material for forming at least one conducting channel in the switching layer during a fabrication process of the memristor. A method of making the memristor and a crossbar employing the memristor are also disclosed. | 12-22-2011 |
| 20120018698 | LOW-POWER NANOSCALE SWITCHING DEVICE WITH AN AMORPHOUS SWITCHING MATERIAL - A nanoscale switching device exhibits multiple desired properties including a low switching current level, being electroforming-free, and cycling endurance. The switching device has an active region disposed between two electrodes. The active region contains a switching material capable of transporting dopants under an electric field. The switching material is in an amorphous state and formed by deposition at or below room temperature. | 01-26-2012 |
| 20120030434 | Memory Device - A memory device includes a memory array and a memory controller for altering a performance characteristic of the memory array to increase a rate at which the memory device writes data in response to the memory device experiencing a demand for bandwidth above a threshold. A method for adjusting the performance characteristics of a memory device includes altering a performance characteristic of the memory device in response to the memory device experiencing a demand for bandwidth above a threshold. Altering the performance characteristic increases a rate at which the memory device writes data. | 02-02-2012 |
| 20120113706 | MEMRISTORS BASED ON MIXED-METAL-VALENCE COMPOUNDS - A memristor ( | 05-10-2012 |
| 20120120714 | MEMORY RESISTOR HAVING MULTI-LAYER ELECTRODES - Methods and means related to memory resistors are provided. A memristor includes two multi-layer electrodes and an active material layer. One multi-layer electrode forms an Ohmic contact region with the active material layer. The other multi-layer electrode forms a Schottky barrier layer with the active material layer. The active material layer is subject to oxygen vacancy profile reconfiguration under the influence of an applied electric field. An electrical resistance of the memristor is thus adjustable by way of applied programming voltages and is non-volatile between programming events. | 05-17-2012 |
| 20120127780 | MEMORY RESISTOR ADJUSTMENT USING FEEDBACK CONTROL - Apparatus and methods related to memory resistors are provided. A feedback controller applies adjustment signals to a memristor. A non-volatile electrical resistance of the memristor is sensed by the feedback controller during the adjustment. The memristor is adjusted to particular values lying between first and second limiting values with minimal overshoot. Increased memristor service life, faster operation, lower power consumption, and higher operational integrity are achieved by the present teachings. | 05-24-2012 |
| 20120223286 | ELECTROFORMING-FREE NANOSCALE SWITCHING DEVICE - A nanoscale switching device is constructed such that an electroforming process is not needed to condition the device for normal switching operations. The switching device has an active region disposed between two electrodes. The active region has at least one switching layer formed of a switching material capable of transporting dopants under an electric field, and at least one conductive layer formed of a dopant source material containing dopants that can drift into the switching layer under an electric field. The switching layer has a thickness about 6 nm or less. | 09-06-2012 |
| 20130009128 | NANOSCALE SWITCHING DEVICE - A nanoscale switching device has an active region containing a switching material. The switching device has a first electrode and a second electrode with nanoscale widths, and the active region is disposed between the first and second electrodes. A protective cladding layer surrounds the active region. The protective cladding layer is formed of a cladding material unreactive to the switching material. An interlayer isolation layer formed of a dielectric material is disposed between the first and second electrodes and outside the protective cladding layer. | 01-10-2013 |
| 20130026440 | NANOSCALE SWITCHING DEVICES WITH PARTIALLY OXIDIZED ELECTRODES - A nanoscale switching device is provided. The device comprises: a first electrode of a nanoscale width; a second electrode of a nanoscale width; an active region disposed between the first and second electrodes, the active region having a non-conducting portion comprising an electronically semiconducting or nominally insulating and a weak ionic conductor switching material capable of carrying a species of dopants and transporting the dopants under an electric field and a source portion that acts as a source or sink for the dopants; and an oxide layer either formed on the first electrode, between the first electrode and the active region or formed on the second electrode, between the second electrode and the active region. A crossbar array comprising a plurality of the nanoscale switching devices is also provided. A process for making at least one nanoscale switching device is further provided. | 01-31-2013 |
| 20130112934 | NANOSCALE SWITCHING DEVICE - A nanoscale switching device has an active region disposed between two electrodes of nanoscale widths. The active region contains a switching material that carries mobile ionic dopants capable of being transported over the active region under an electric field to change a resistive state of the device. The switching material further carries immobile ionic dopants for inhibiting clustering of the mobile ionic dopants caused by switching cycles of the device. The immobile ionic dopants have a charge opposite in polarity to the charge of the mobile ionic dopants, and are less mobile under the electric field than the mobile ion dopants. | 05-09-2013 |
| 20130168629 | NANOSCALE SWITCHING DEVICE - A nanoscale switching device comprises a first electrode of a nanoscale width; a second electrode of a nanoscale width; an active region disposed between the first and second electrodes, the active region containing a switching material; an area within the active region that constrains current flow between the first electrode and the second electrode to a central portion of the active region; and an interlayer dielectric layer formed of a dielectric material and disposed between the first and second electrodes outside the active region. A nanoscale crossbar array and method of forming the nanoscale switching device are also disclosed. | 07-04-2013 |
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| 20130099187 | MULTILAYER STRUCTURE BASED ON A NEGATIVE DIFFERENTIAL RESISTANCE MATERIAL - A multilayer structure is disclosed that includes a conductive layer, a layer of a negative differential resistance (NDR) material disposed above the conductive layer, a layer M | 04-25-2013 |
| 20130106930 | PRINTHEAD ASSEMBLY INCLUDING MEMORY ELEMENTS | 05-02-2013 |
| 20140304467 | SHIFTABLE MEMORY EMPLOYING RING REGISTERS - Shiftable memory employs ring registers to shift a contiguous subset of data words stored in the ring registers within the shiftable memory. A shiftable memory includes a memory having built-in word-level shifting capability. The memory includes a plurality of ring registers to store data words. A contiguous subset of data words is shiftable between sets of the ring registers of the plurality from a first location to a second location within the memory. The contiguous subset of data words has a size that is smaller than a total size of the memory. The memory shifts only data words stored inside the contiguous subset when the contiguous subset is shifted. | 10-09-2014 |
| 20140313816 | SELECT DEVICE FOR CROSS POINT MEMORY STRUCTURES - The present disclosure provides a memory cell that includes a resistive memory element disposed between a first conductor and a second conductor, the first conductor and the second conductor configured to activate the resistive memory element. The memory cell also includes a backward diode disposed in series with the memory element between the memory element and either the first conductor or the second conductor. | 10-23-2014 |
| 20140313818 | METAL-INSULATOR PHASE TRANSITION FLIP-FLOP - A metal-insulator phase transition (MIT) flip-flop employs a selected one of a pair of bi-stable operating states to represent a logic state of the MIT flip-flop. The MIT flip-flop includes an MIT device having a current-controlled negative differential resistance (CC-NDR) to provide the pair of bi-stable operating states. A bi-stable operating state of the pair is capable of being selected by a programing voltage. Once the bi-stable operating state is selected, the bi-stable operating state is capable of being maintained by a bias voltage applied to the MIT device. | 10-23-2014 |
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| 20120275211 | Reconfigurable Crossbar Memory Array - A two-dimensional array of switching devices comprises a plurality of crossbar tiles. Each crossbar tile has a plurality of row wire segments intersecting a plurality of column wire segments, and a plurality of switching devices each formed at an intersection of a row wire segment and a column wire segment. The array has a plurality of lateral latches disposed in a plane of the switching devices. Each lateral latch is linked to a first wire segment of a first crossbar tile and a second wire segment of a second crossbar tile opposing the first wire segment. The lateral latch is operable to close or open to form or break an electric connection between the first and second wire segments. | 11-01-2012 |
| 20130023106 | DEVICE HAVING MEMRISTIVE MEMORY | 01-24-2013 |
| 20130099872 | CHAOTIC OSCILLATOR-BASED RANDOM NUMBER GENERATION - Chaotic oscillator-based random number generation is described. In an example, a circuit includes a negative differential resistance (NDR) device to receive an alternating current (AC) bias. The circuit further includes a capacitance in parallel with the NDR device, the capacitance having a value such that, in response to a direct current (DC) bias applied to the NDR device and the capacitance, a voltage across the capacitance oscillates with a chaotic period. The circuit further includes a random number generator to generate random numbers using samples of the voltage across the capacitance. | 04-25-2013 |
| 20130106462 | Field-programmable analog array with memristors | 05-02-2013 |
| 20130106480 | METAL-INSULATOR TRANSITION LATCH | 05-02-2013 |
| 20130234103 | NANOSCALE SWITCHING DEVICE WITH AN AMORPHOUS SWITCHING MATERIAL - Nanoscale switching devices are disclosed. The devices have a first electrode of a nanoscale width; a second electrode of a nanoscale width; and a layer of an active region disposed between and in electrical contact with the first and second electrodes. The active region contains a switching material capable of carrying a significant amount of defects which can trap and de-trap electrons under electrical bias. The switching material is in an amorphous state. A nanoscale crossbar array containing a plurality of the devices and a method for making the devices are also disclosed. | 09-12-2013 |
| 20130242637 | Memelectronic Device - A memelectronic device may have a first and a second electrode spaced apart by a plurality of materials. A first material may have a memory characteristic exhibited by the first material maintaining a magnitude of an electrically controlled physical property after discontinuing an electrical stimulus on the first material. A second material may have an auxiliary characteristic. | 09-19-2013 |
| 20140003139 | MEMORY DEVICES WITH IN-BIT CURRENT LIMITERS | 01-02-2014 |
| 20140027705 | MEMRISTOR CELL STRUCTURES FOR HIGH DENSITY ARRAYS - A memristor array includes a lower layer of crossbars, upper layer of crossbars intersecting the lower layer of crossbars, memristor cells interposed between intersecting crossbars, and pores separating adjacent memristor cells. A method forming a memristor array is also provided. | 01-30-2014 |
| 20140029327 | BIPOLAR RESISTIVE SWITCH HEAT MITIGATION - A heat mitigated bipolar resistive switch includes a BRS matrix sandwiched between first and second electrodes and a heat mitigator. The BRS matrix is to support bipolar switching of a conduction channel formed between the first and second electrodes through BRS matrix. The heat mitigator is to reduce heat in the BRS matrix generated during bipolar switching. The heat mitigator includes one or both of a parallel-connected NDR element to limit current flowing in the BRS matrix and a high thermal conductivity material to conduct the generated heat away from the BRS matrix above a predetermined elevated temperature. | 01-30-2014 |
| 20140029328 | Storing Data in a Non-volatile Latch - Storing data in a non-volatile latch may include applying a bias voltage to a memristor pair in electrical communication with at least one logic gate and applying a gate voltage to a transmission gate to allow an input voltage to be applied to the at least one logic gate where the input voltage is greater than the bias voltage and the input voltage determines a resistance state of the memristor pair. | 01-30-2014 |
| 20140091270 | LOW ENERGY MEMRISTORS WITH ENGINEERED SWITCHING CHANNEL MATERIALS - Low energy memristors with engineered switching channel materials include: a first electrode; a second electrode; and a switching layer positioned between the first electrode and the second electrode, wherein the switching layer includes a first phase comprising an insulating matrix in which is dispersed a second phase comprising an electrically conducting compound material for forming a switching channel. | 04-03-2014 |
| 20140112059 | HIGH-RELIABILITY HIGH-SPEED MEMRISTOR - A memristor has a first electrode, a second electrode parallel to the first electrode, and a switching layer disposing between the first and second electrodes. The switching layer contains a conduction channel and a reservoir zone. The conduction channel has a Fermi glass material with a variable concentration of mobile ions. The reservoir zone is laterally disposed relative to the conduction channel, and functions as a source/sink of mobile ions for the conduction channel In the switching operation, under the cooperative driving force of both electric field and thermal effects, the mobile ions are moved into or out of the laterally disposed reservoir zone to vary the concentration of the mobile ions in the conduction channel to change the conductivity of the Fermi glass material. | 04-24-2014 |
| 20140158973 | NITRIDE-BASED MEMRISTORS - A nitride-based memristor memristor includes: a first electrode comprising a first nitride material; a second electrode comprising a second nitride material; and active region positioned between the first electrode and the second electrode. The active region includes an electrically semiconducting or nominally insulating and weak ionic switching nitride phase. A method for fabricating the nitride-based memristor is also provided. | 06-12-2014 |
| 20140166957 | HYBRID CIRCUIT OF NITRIDE-BASED TRANSISTOR AND MEMRISTOR - A hybrid circuit comprises a nitride-based transistor portion and a memristor portion. The transistor includes a source and a drain and a gate for controlling conductance of a channel region between the source and the drain. The memristor includes a first electrode and a second electrode separated by an active switching region. The source or drain of the transistor forms one of the electrodes of the memristor. | 06-19-2014 |
| 20140346426 | Memristor with Channel Region in Thermal Equilibrium with Containing Region - A memristor with a channel region in thermal equilibrium with a containing region. The channel region has a variable concentration of mobile ions. The containing region, formed of stoichiometric crystalline material, contains and is in thermal equilibrium with the channel region. | 11-27-2014 |
| 20150041751 | CUSTOMIZABLE NONLINEAR ELECTRICAL DEVICES - In one example, a customizable nonlinear electrical device includes a first conductive layer, a second conductive layer, and a thin film metal-oxide layer sandwiched between the first conductive layer and the second conductive layer to form a first rectifying interface between the metal-oxide layer and the first conductive layer and a second rectifying interface between the metal-oxide layer and the second conductive layer. The metal-oxide layer includes an electrically conductive mixture of co-existing metal and metal oxides. A method forming a nonlinear electrical device is also provided. | 02-12-2015 |
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| 20110240952 | PROGRAMMABLE CROSSPOINT DEVICE WITH AN INTEGRAL DIODE - A programmable crosspoint device with an integral diode includes a first crossbar, a second crossbar, a metallic interlayer, and a switching oxide layer interposed between the first crossbar and the metallic interlayer. The switching oxide layer has a low resistance state and high resistance state. The programmable crosspoint device also includes an integral diode which is interposed between the second crossbar layer and the metallic interlayer, the integral diode being configured to limit the flow of leakage current through the programmable crosspoint device in one direction. A method for forming a programmable crosspoint device with an integrated diode is also provided. | 10-06-2011 |
| 20120005418 | Hierarchical On-chip Memory - A hierarchical on-chip memory ( | 01-05-2012 |
| 20120014161 | Memristive Negative Differential Resistance Device - A memristive Negative Differential Resistance (NDR) device includes a first electrode adjacent to a memristive matrix, the memristive matrix including an intrinsic semiconducting region and a highly doped secondary region, a Metal-Insulator-Transition (MIT) material in series with the memristive matrix, and a second electrode adjacent to the MIT material. | 01-19-2012 |
| 20120085985 | ELECTRICALLY ACTUATED DEVICE - An electrically actuated device includes a reactive metal layer, a first electrode established in contact with the reactive metal layer, an insulating material layer established in contact with the first electrode or the reactive metal layer, an active region established on the insulating material layer, and a second electrode established on the active region. A conductive nano-channel is formed through a thickness of the insulating material layer. | 04-12-2012 |
| 20120099362 | MEMORY ARRAY WITH METAL-INSULATOR TRANSITION SWITCHING DEVICES - A memory array with Metal-Insulator Transition (MIT) switching devices includes a set of row lines intersecting a set of column lines and a memory element disposed at an intersection between one of the row lines and one of the column lines. The memory element includes a switching layer in series with an MIT material. A method of accessing a target memory element within a memory array includes applying half of an access voltage to a row line connected to the target memory element, the target memory element comprising a switching layer in series with an MIT material, and applying an inverted half of the access voltage to a column line connected to the target memory element. | 04-26-2012 |
| 20120104346 | SEMICONDUCTOR DEVICE FOR PROVIDING HEAT MANAGEMENT - A semiconductor device for providing heat management may include a first electrode with low metal thermal conductivity and a second electrode with low metal thermal conductivity. A metal oxide structure which includes a transition metal oxide (TMO) may be electrically coupled to the first electrode and second electrode and the metal oxide structure may be disposed between the first electrode and second electrode. An electrically insulating sheath with low thermal conductivity may surround the metal oxide structure. | 05-03-2012 |
| 20120105143 | PROGRAMMABLE ANALOG FILTER - A programmable analog filter includes a crossbar array with a number of junction elements and a filter circuit being implemented within the crossbar array. At least a portion of the junction elements form reprogrammable components within the filter circuit. A method for using a programmable analog filter is also provided. | 05-03-2012 |
| 20120138885 | ELECTRICAL CIRCUIT COMPONENT - An electrical circuit component includes a first electrode, a plurality of second electrodes and a negative differential resistance (NDR) material. The first electrode and the plurality of second electrodes are connected to the NDR material and the NDR material is to electrically connect the first electrode to one of the plurality of second electrodes when a sufficient voltage is applied between the first electrode and the one of the plurality of second electrodes through the NDR material. | 06-07-2012 |
| 20120146739 | DEVICE HAVING INDUCTOR AND MEMCAPACITOR - Methods and means related to an electronic circuit having an inductor and a memcapacitor are provided. Circuitry is formed upon a substrate such that an inductor and non-volatile memory capacitor are formed. Additional circuitry can be optionally formed on the substrate as well. The capacitive value of the memcapacitor is adjustable within a range by way of an applied programming voltage. The capacitive value of the memcapacitor is maintained until reprogrammed at some later time. Oscillators, phase-locked loops and other circuits can be configured using embodiments of the present teachings. | 06-14-2012 |
| 20120195099 | CHANGING A MEMRISTOR STATE - A method of changing a state of a memristor having a first intermediate layer, a second intermediate layer, and a third intermediate layer positioned between a first electrode and a second electrode includes applying a first pulse having a first bias voltage across the memristor, wherein the first pulse causes mobile species to flow in a first direction within the memristor and collect in the first intermediate layer thereby causing the memristor to enter into an intermediate state and applying a second pulse having a second bias voltage across the memristor, in which the second pulse causes the mobile species from the first intermediate layer to flow in a second direction within the memristor and collect in the third intermediate layer, wherein the flow of the mobile species in the second direction causes the memristor to enter into a fully changed state. | 08-02-2012 |
| 20120228575 | NANOSCALE ELECTRONIC DEVICE WITH BARRIER LAYERS - On example of the present invention is a nanoscale electronic device comprising a first conductive electrode, a second conductive electrode, and a device layer. The device layer comprises a first dielectric material, between the first and second conductive electrodes, that includes an effective device layer, a first barrier layer near a first interface between the first conductive electrode and the device layer, and a second barrier layer near a second interface between the second conductive electrode and the device layer. A second example of the present invention is an integrated circuit that incorporates nanoscale electronic devices of the first example. | 09-13-2012 |
| 20120313070 | CONTROLLED SWITCHING MEMRISTOR - A controlled switching memristor includes a first electrode, a second electrode, and a switching layer positioned between the first electrode and the second electrode. The switching layer includes a material to switch between an ON state and an OFF state, in which at least one of the first electrode, the second electrode, and the switching layer is to generate a permanent field within the memristor to enable a speed and an energy of switching from the ON state to the OFF state to be substantially symmetric to a speed and energy of switching from the OFF state to the ON state. | 12-13-2012 |
| 20130114329 | Multilayer Memory Array - A multilayer crossbar memory array includes a number of layers. Each layer includes a top set of parallel lines, a bottom set of parallel lines intersecting the top set of parallel lines, and memory elements disposed at intersections between the top set of parallel lines and the bottom set of parallel lines. A top set of parallel lines from one of the layers is a bottom set of parallel lines for an adjacent one of the layers. | 05-09-2013 |
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| 20090053255 | Anti-arthropod vector vaccines, methods of selecting and uses thereof - The present invention provides methods of selecting and uses of anti-arthropod vector vaccines to prevent Leishmaniasis. The present invention also provides compositions for vaccines to prevent Leishmaniasis. | 02-26-2009 |
| 20090117139 | LUTZOMYIA LONGIPALPIS POLYPEPTIDES AND METHODS OF USE - Substantially purified salivary | 05-07-2009 |
| 20100278752 | Methods for Detection and Prevention of Tick Infestation and Pathogen Transmission - The invention generally features methods for the prevention and detection of a tick infestation. The present invention also features methods for decreasing the ability of a tick to feed on a subject. | 11-04-2010 |
| 20110189120 | AEGYPTIN AND USES THEREOF - The present invention relates to the discovery of the Aegyptin gene and Aegyptin protein, a molecule that interacts with collagen and inhibits platelet adhesion, activation and aggregation. Novel biological tools, prophylactics, therapeutics, diagnostics, and methods of use of the foregoing are also disclosed. | 08-04-2011 |
| 20110212134 | ANTI-ARTHROPOD VECTOR VACCINES, METHODS OF SELECTING AND USES THEREOF - The present invention provides methods of selecting and uses of anti-arthropod vector vaccines to prevent | 09-01-2011 |
| 20130084308 | ANTI-ARTHROPOD VECTOR VACCINES, METHODS OF SELECTING AND USES THEREOF - The present disclosure provides methods of selecting and uses of anti-arthropod vector vaccines to prevent Leishmaniasis. The present disclosure also provides compositions for vaccines to prevent Leishmaniasis. | 04-04-2013 |
| 20130123349 | AEGYPTIN AND USES THEREOF - The present invention relates to the discovery of the Aegyptin gene and Aegyptin protein, a molecule that interacts with collagen and inhibits platelet adhesion, activation and aggregation. Novel biological tools, prophylactics, therapeutics, diagnostics, and methods of use of the foregoing are also disclosed. | 05-16-2013 |
| 20140093531 | LUTZOMYIA LONGIPALPIS POLYPEPTIDES AND METHODS OF USE - Substantially purified salivary | 04-03-2014 |
| 20150315254 | LUTZOMYIA LONGIPALPIS POLYPEPTIDES AND METHODS OF USE - Substantially purified salivary | 11-05-2015 |
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| 20130021291 | QUADRATURE SIGNAL RECEIVER USING SYNCHRONIZED OSCILLATOR - A system comprises a processing device, a signal generator to generate a first signal and a single receiver to receive a second signal from a capacitive sense array. The single receiver is configured to process the second signal for stylus sensing of a stylus proximate to the capacitive sense array in a first mode of operation and to process the second signal for touch sensing of a passive touch object proximate to the capacitive sense array in a second mode of operation. The second signal is unsynchronized with the first signal. | 01-24-2013 |
| 20140022185 | INTERFACE AND SYNCHRONIZATION METHOD BETWEEN TOUCH CONTROLLER AND DISPLAY DRIVER FOR OPERATION WITH TOUCH INTEGRATED DISPLAYS - Apparatuses and methods of synchronizing a display driver integrated circuit (DDI) and a touch screen controller (TSC) integrated circuit that are coupled to a display integrated touch panel, such as an in-cell panel, and allowing multi-phase transmit (TX) scanning of the in-cell touch panel. One apparatus includes a DDI configured to receive signals on a video interface from a host processor over a video interface and to drive electrodes of a touch panel. The DDI is configured to receive control signals from a TSC over a control interface to drive different transmit (TX) phase sequences of a TX signal in different sensing interval on the electrodes of the touch panel. | 01-23-2014 |
| 20140022202 | Sensor Array with Edge Pattern - A capacitive sensor array may include a first set of sensor electrodes and a second set of sensor electrodes. Each of the second set of sensor electrodes may intersect each of the first set of sensor electrodes to form a plurality of unit cells each corresponding to a pair of sensor electrodes including one of the first set of sensor electrodes and one of the second set of sensor electrodes. Each point within each of the plurality of unit cells may nearer to a gap between the pair of sensor electrodes corresponding to the unit cell than to a gap between any different pair of sensor electrodes, and a first trace pattern within a first unit cell of the plurality of unit cells may be different from a second trace pattern within an adjacent unit cell of the plurality of unit cells. | 01-23-2014 |
| 20140022203 | DISCONTINUOUS INTEGRATION USING HALF PERIODS - Apparatuses and methods of frequency hopping algorithms are described. One method monitors a signal on one or more electrodes of a sense network at a first operating frequency and detects noise in the signal at the first operating frequency. The method then switches to a second operating frequency, based on said detecting, for scanning the electrodes to detect a conductive object proximate to the plurality of electrodes, wherein a constant integration time is used for one half-period when scanning the electrodes at both the first and second operating frequencies. | 01-23-2014 |
| 20140253492 | ASSIGNING ISSUES TO TECHNICAL SUPPORT GROUPS BASED ON SKILL AND PRODUCT KNOWLEDGE - A processing device scans, during a first operation, a first plurality of electrodes along a first axis in a capacitive sense array to generate a first plurality of signals corresponding to a mutual capacitance at electrode intersections of the capacitive sense array. During a second operation, the processing device scans a second plurality of electrodes along a second axis in the capacitive sense array to generate a second plurality of signals corresponding to the mutual capacitance at the electrode intersections of the capacitive sense array, wherein the second operation occurs during a different period of time than the first operation. The processing device determines a first coordinate of a conductive object proximate to the capacitive sense array based on the first plurality of signals and a second coordinate of the conductive object based on the second plurality of signals. | 09-11-2014 |
