Patent application number | Description | Published |
20090189704 | Voltage controlled oscillator with multi-tap inductor - According to one exemplary embodiment, a voltage controlled oscillator configured to operate in low and high band modes includes a low band section and a high band section. The voltage controlled oscillator further includes a multi-tap inductor having a high inductance portion coupled to the low band section and a low inductance portion coupled to the high band section. The low band section is configured to provide a low frequency band oscillator output in the low band mode and the high band section is configure to provide a high frequency band oscillator output in the high band mode. The low band section is disabled in the high band mode and the high band section is disabled in the low band mode. A center tap of the multi-tap inductor is coupled to a supply voltage. | 07-30-2009 |
20100080325 | Method and System for Independent I and Q Loop Amplitude Control for Quadrature Generators - Certain aspects of a method and system for independent in-phase (I) and quadrature (Q) loop amplitude control for quadrature generators may include determining an amplitude voltage associated with an in-phase (I) component and a quadrature (Q) component of a generated signal. A DC reference voltage associated with the I component and the Q component may be determined. The determined amplitude voltage may be compared with the determined reference voltage to generate a control signal. The amplitude mismatch between the I component and the Q component may be compensated by controlling a biasing current of one or more programmable buffers associated with one or both of the I component and the Q component, based on the generated control signal. | 04-01-2010 |
20110018604 | Configurable Clock Signal Generator - A method to provide a low-power clock signal or a low-noise clock signal is described herein. It is determined whether a low-power mode or a low-noise mode is in use. A voltage reference input of a low-dropout voltage regulator (LDO) is switched to a low-power voltage reference for low-power mode and to a low-noise voltage reference for low-noise mode. The LDO provides a constant voltage output to a crystal oscillator. A clock signal is generated using the crystal oscillator. The clock signal is limited using a low-power limiter to generate a low-power output clock signal and/or is limited using a low-noise limiter to generate a low-noise clock signal. The low-power output clock signal or the low-noise output clock signal is selected using a mux. | 01-27-2011 |
20110018642 | Differential varactor circuit for a voltage controlled oscillator - According to one exemplary embodiment, a differential varactor circuit for a voltage controlled oscillator having two differential outputs includes a first varactor having first and second terminals and a second varactor having first and second terminals. In the differential varactor circuit, each of the first and second terminals of the first varactor and each of the first and second terminals of the second varactor are coupled to one of the two differential outputs of the voltage controlled oscillator, thereby allowing a size of each of the first and second varactors to be reduced so as to increase varactor quality factor. Each of the first and second terminals of the first varactor can be coupled to one of the two differential outputs by a capacitor, and each of the first and second terminals of the second varactor can be coupled to one of the two differential outputs by a capacitor. | 01-27-2011 |
20110103526 | Method and System for Mitigating the Effects of Pulling in Multiple Phase Locked Loops in Multi-Standard Systems - Certain aspects of a method and system for mitigating effects of pulling in multiple phase locked loops in multi-standard systems may include selecting an input frequency range of operation at a voltage controlled oscillator based on a particular wireless band of operation in a system that handles a first wireless communication protocol and a second wireless communication protocol. An image rejection mixer may be enabled to generate an output signal for the particular wireless band of operation based on mixing a plurality of received signals within a selected frequency range. An in-phase (I) component and a quadrature (Q) component of the generated output signal may be generated by utilizing a RC-CR quadrature network. | 05-05-2011 |
20110133835 | DOUBLE TRANSFORMER BALUN FOR MAXIMUM POWER AMPLIFIER POWER - Double transformer balun for maximum PA (Power Amplifier) power. A novel approach is presented herein by which conversion from a differential signal to single-ended signal may be achieved using a double transformer balun design. The secondary coils of the double transformer balun also operate as a choke for the PA supply voltage. The secondary coils can operate as an RF (Radio Frequency) trap or choke to keep any AC (Alternating Current) signal components and to pass any DC (Direct Current) components. By using a double transformer balun design, relatively thinner tracks may be employed thereby ensuring a high degree of electromagnetic coupling efficiency and high performance. Also, these relatively thinner tracks consume a relatively small amount of space on the die. The double transformer balun design also includes a matching Z (impedance) block that is operable to match the Z of an antenna or line that the PA is driving. | 06-09-2011 |
20120007215 | ON-CHIP CAPACITOR STRUCTURE - At least a first capacitor is formed on a substrate and connected to a first differential node of a differential circuit, and the first capacitor may be variable in capacitance. A second capacitor is formed on the substrate and connected to a second differential node of the differential circuit, and the second capacitor also may be variable. A third capacitor is connected between the first differential node and the second differential node, and is formed at least partially above the first capacitor. In this way, a size of the first capacitor and/or the second capacitor may be reduced on the substrate, and capacitances of the first and/or second capacitor(s) may be adjusted in response to a variable characteristic of one or more circuit components of the differential circuit. | 01-12-2012 |
20130270674 | ON-CHIP CAPACITOR STRUCTURE - At least a first capacitor is formed on a substrate and connected to a first differential node of a differential circuit, and the first capacitor may be variable in capacitance. A second capacitor is formed on the substrate and connected to a second differential node of the differential circuit, and the second capacitor also may be variable. A third capacitor is connected between the first differential node and the second differential node, and is formed at least partially above the first capacitor. In this way, a size of the first capacitor and/or the second capacitor may be reduced on the substrate, and capacitances of the first and/or second capacitor(s) may be adjusted in response to a variable characteristic of one or more circuit components of the differential circuit. | 10-17-2013 |
20130300502 | VARIABLE-GAIN LOW NOISE AMPLIFIER - The present disclosure relates to variable-gain low noise amplifiers and RF receivers. An exemplary method for processing a RF signal provides a low noise amplifier with main and auxiliary amplifier modules. When a selection indicates the low noise amplifier operating in a high-gain mode, the main and auxiliary amplifier modules are coupled in parallel. When the selection indicates the low noise amplifier operating in a low-gain mode, the main and auxiliary amplifier modules are cross coupled. When a selection indicates the low noise amplifier operating in a moderate-gain mode, the auxiliary amplifier modules are disconnected from the main amplifier module. | 11-14-2013 |
20130344838 | LOW-NOISE AMPLIFIERS FOR RF RECEIVER - Disclosed are low-noise amplifiers and SAW-less receivers. An exemplary amplifier includes at least two amplifier modules. The amplifier modules share a common output node and comprise a common input to which the amplifier modules are AC or DC coupled for receiving an inbound RF signal. The amplifier modules operate at different biases. | 12-26-2013 |
20140015607 | LOW NOISE AMPLIFIERS FOR MULTIPLE RADIO STANDARDS - Low noise amplifiers and related control methods for multiple radio standards are disclosed. An exemplary low noise amplifier comprises input ports, an output port, amplifier stages, and a degeneration inductor. Each amplifier has a gain stage and a buffer stage connected in series. The buffer stage selectively channels an output of the gain stage to the output port or a power supply. The degeneration inductor is commonly connected to the gain stage in each of the amplifier stages. | 01-16-2014 |
20140335802 | SECOND ORDER HARMONIC CANCELLATION FOR RADIO FREQUENCY FRONT-END SWITCHES - A radio frequency switch circuit with improved harmonic suppression and low insertion loss has an antenna port and a plurality of signal ports. A plurality of transistor switch circuits, are connected to a respective one of the plurality of signal ports and to the antenna port. Each of the transistor switch circuits has a transistor, which in an off state, together with a harmonic suppression capacitor and a parallel inductor both connected thereto, define a tank circuit that suppresses RF signals applied to the corresponding transistor switch circuit from a different one of the transistor switch circuits. The harmonic suppression capacitor is tuned to distribute large signal voltage swings in the RF signal amongst parasitic diodes of the transistor. | 11-13-2014 |