Po-Ting
Po-Ting Chen, Taichung City TW
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20130157319 | Method for Simultaneous Fermentation of Pentose and Hexose - The present invention relates to a method for simultaneous fermentation of pentose and hexose. The present invention modifies the metabolic pathways of a target microorganism in order to enable the target microorganism to rapidly metabolize pentose and hexose at the same time. This present invention simplified the fermentation process, decreased the cost, and increased the efficiency of the fermentation process. | 06-20-2013 |
Po-Ting Chen, Taipei City TW
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20140215130 | CLOCK SWITCHING METHOD, MEMORY CONTROLLER AND MEMORY STORAGE APPARATUS - A clock switching method for a memory storage apparatus is provided. The method includes: setting a value of the clock as a first operation frequency when an operation mode is switched to an initial state; determining whether a first continuous accessing time of accessing continuously a rewritable non-volatile memory module is larger than a first setting value during a period in which the operation mode is at the initial state; re-setting the value of the clock as a second operation frequency, which is smaller than the first operation frequency, to switch the operation mode to a power saving state if the first continuously access time is larger than the first setting value; and re-setting the value of the clock as the first operation frequency to switch the operation mode to a general state during a period in which the operation mode is at the power saving state. | 07-31-2014 |
20150046632 | MEMORY ADDRESS MANAGEMENT METHOD, MEMORY CONTROLLER AND MEMORY STORAGE DEVICE - A memory address management method, a memory controller, and a memory storage device are provided. The memory address management method includes: obtaining memory information of a rewritable non-volatile memory module and formatting logical addresses according to the memory information to establish a file system, such that an allocation unit of the file system includes a lower logical programming unit and an upper logical programming unit. Here, the memory information includes a programming sequence, the allocation unit starts with the lower logical programming unit and ends with the upper logical programming unit, and an initial logical address of a data region in the file system belongs to the lower logical programming unit. Accordingly, an access bandwidth of the memory storage device is expanded. | 02-12-2015 |
Po-Ting Chen, Taipei TW
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20100184186 | NOVEL RIGIDOPORUS MICROPORUS LACCASE - An isolated | 07-22-2010 |
20130102498 | COMPOSITIONS AND METHODS FOR DETECTING AMYLOID-BETA-DEGRADING ENZYME ACTIVITY - Novel substrates for detection of activity of amyloid beta degrading enzyme, such as Neprilysin (NEP) and insulin degrading enzyme (IDE), associated with Alzheimer's disease, are provided. A quenched fluorogenic peptide substrate containing the first seven residues of the Aβpeptide plus a C-terminal Cys residue to detect neprilysin activity with a fluorophore attached to the C-terminal Cys and a quencher linked to the N-terminus of the peptide is disclosed. An assay system sensitive to endopeptidase activity of NEP and IDE, but insensitive to other Aβ-degrading enzymes is disclosed. Active compounds are identified by a cell-based assay system for high-throughput screening. | 04-25-2013 |
Po-Ting Chen, Taoyuan County TW
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20150054725 | METHOD FOR ADJUSTING DISPLAY BACKLIGHT WITH AID OF AMBIENT LIGHT BRIGHTNESS DETECTION AND TIME DETECTION, AND ASSOCIATED APPARATUS AND ASSOCIATED COMPUTER PROGRAM PRODUCT - A method and apparatus for adjusting display backlight and an associated computer program product are provided. The method is applied to an electronic device. The method includes the steps of: utilizing at least one light sensor of the electronic device to detect ambient light; and performing a plurality of detection operations to selectively control the electronic device to enter a specific mode to adjust brightness level of a backlight module of a display panel of the electronic device. The detection operations includes: detecting whether the ambient light is less than a predetermined ambient brightness threshold value for a time period; and detecting whether a length of the time period reaches a predetermined time threshold value. For example, the specific mode can be a low-light mode, which is suitable for a user who has stayed in the dark for a time period (e.g. tens of minutes, or one or more hours). | 02-26-2015 |
Po-Ting Lee, New Taipei City TW
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20150090999 | WHITE LED - A white LED is provided. The white LED includes a P-type layer, a tunneling structure, an N-type layer, an N-type electrode, and a P-type electrode. The tunneling structure is disposed over the P-type layer. The tunneling structure includes a first barrier layer, an active layer and a second barrier layer. The first barrier layer includes a first metal oxide layer. The active layer includes a second metal oxide layer. The second barrier layer includes a third metal oxide layer. The N-type layer is disposed over the tunneling structure. The N-type electrode and the P-type electrode are respectively contacted with the N-type layer and the P-type layer. An energy gap of the second metal oxide layer is lower than an energy gap of the first metal oxide layer and is lower than an energy gap of the third metal oxide layer. | 04-02-2015 |
20150091019 | WHITE LED CHIP AND WHITE LED PACKAGING DEVICE - A white LED chip includes a P-type layer, a tunneling structure, an N-type layer, an N-type electrode, and a P-type electrode. The tunneling structure is disposed over the P-type layer. The tunneling structure includes a first barrier layer, an active layer and a second barrier layer. The first barrier layer includes a first material layer, the active layer includes a second material layer, and the second barrier layer includes a third material layer. The N-type layer is disposed over the tunneling structure. An energy gap of the second material layer is lower than an energy gap of the first material layer and an energy gap of the third material layer. Each of the first material layer, the second material layer and the third material layer is a metal oxide layer, a metal nitride layer or a metal oxynitride layer. | 04-02-2015 |
20150340260 | WAFER TRANSPORT SYSTEM AND METHOD FOR OPERATING THE SAME - The present invention relates to a wafer transport system and a method of operating the same. The wafer transport system comprises at least one semiconductor apparatus, a track, a transfer device, a positioning device, a carrier and a cleaning device. The wafer transport system transports wafers along the at least one semiconductor apparatus via the carrier riding on the track. The transfer device transfers the wafers from the carrier to the at least one semiconductor apparatus. The positioning device identifies and controls the position of the carrier on the track. The cleaning device maintains the cleanliness of the wafers. The present invention provides advantages for improving the yield rate of a wafer, shortening the fabrication time of a wafer, and offering the flexibility and the extendibility to a wafer transport system. | 11-26-2015 |
Po-Ting Lin, New Taipei City TW
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20160086718 | TRANSFORMER STRUCTURE - A transformer structure includes a first conductive plate, a second conductive plate, a circuit board and a core assembly. The first conductive plate has a first through hole and two first pins, and the first pins are formed by bending two ends of the first conductive plate respectively. The second conductive plate is installed opposite to the first conductive plate and has a second through hole and two second pins, and second pins are formed by bending the two ends of the second conductive plate respectively. The circuit board includes a winding, a positioning portion and a third through hole. The core assembly is electromagentically coupled to the first conductive plate, the circuit board and the second conductive plate and passed through the first, second and third through holes to provide a high amperage and low-profile transformer structure. | 03-24-2016 |
Po-Ting Wu, Tainan City TW
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20140128984 | ARTIFICIAL IMPLANT FOR CARPOMETACARPAL JOINT - An artificial implant for a carpometacarpal (CMC) joint used for replacing a CMC joint surface of the first metacarpal bone is provided and includes: an insert portion having an inserting end for inserting into a bone marrow cavity exposed from an incision of the first metacarpal bone, and a front end; an articular replacement portion connected to the front end of the inserting portion and disposed outside the incision of the first metacarpal bone, and having an articular profile surface to replace the CMC joint surface of the first metacarpal bone; and an attached flange protruded from a peripheral of the articular replacement portion, attached to an outer bone surface of the first metacarpal bone adjacent to the incision, and having at least one suture hole, through which at least one suture passes for assisting to fix an abductor pollicis longus (APL) to the outer bone surface. | 05-08-2014 |
20150297355 | ARTIFICIAL IMPLANT FOR CARPOMETACARPAL JOINT - An artificial implant for a carpometacarpal (CMC) joint used for replacing a CMC joint surface of the first metacarpal bone is provided and has: an insert portion having an inserting end for inserting into a bone marrow cavity exposed from an incision of the first metacarpal bone, and a front end; an articular replacement portion connected to the front end of the inserting portion and disposed outside the incision of the first metacarpal bone, and having an articular profile surface to replace the CMC joint surface of the first metacarpal bone; and an attached flange protruded from a peripheral of the articular replacement portion, attached to an outer bone surface of the first metacarpal bone adjacent to the incision, and having at least one suture hole, through which at least one suture passes for assisting to fix an abductor pollicis longus (APL) to the outer bone surface. | 10-22-2015 |