Patent application number | Description | Published |
20080205027 | ASSEMBLY OF TWO PARTS OF AN INTEGRATED ELECTRONIC CIRCUIT - A process for assembling two parts of an integrated electronic circuit has two successive steps. During a first step, the two circuit parts are made into a single unit by molecular bonding, realized on respective application surfaces of the two parts. During a second step, electrical connections are formed from connection portions already present in the application surfaces of the two circuit parts. The connections formed extend across the bonding interface, and are compatible with a high reliability and a high level of integration of the circuit. | 08-28-2008 |
20080254580 | Realization of Self-Positioned Contacts by Epitaxy - Metal contacts are self-positioned on a wafer of semiconductor product. Respective placement areas for a metal contact are determined by a selective deposition of a growth material over a region of the substrate surface (for example, through epitaxial growth). The growth material is surrounded by an insulating material. The grown material is then removed to form a void in the insulating material which coincides with the desired location of the metal contact. This removal of the grown material exposes the region on the substrate surface. Conductive material is then deposited to fill the void and thus form the metal contact directly with the region of the substrate surface. | 10-16-2008 |
20090014764 | IMAGE SENSOR WITH AN IMPROVED SENSITIVITY - An embodiment of an image sensor comprising photosensitive cells, each photosensitive cell comprising at least one charge storage means formed at least partly in a substrate of a semiconductor material. The substrate comprises, for at least one first photosensitive cell, a portion of a first silicon and germanium alloy having a first germanium concentration, possibly zero, and for at least one second photosensitive cell, a portion of a second silicon and germanium alloy having a second germanium concentration, non-zero, greater than the first germanium concentration. | 01-15-2009 |
20090093079 | METHOD OF PRODUCING AN ASYMMETRIC ARCHITECTURE SEMI-CONDUCTOR DEVICE - A method is for producing an asymmetric architecture semi-conductor device. The device includes a substrate, and in stacked relation, a first photosensitive layer, a non-photosensitive layer, and a second photosensitive layer. The method includes a first step of exposing a first zone in each of the photosensitive layers by a first beam of electrons traversing the non-photosensitive layer. A second step includes exposing at least one second zone of one of the two photosensitive layers by a second beam of electrons or photons or ions, thereby producing a widening of one of the first zones compared to the other first zone such that the second zone is in part superimposed on one of the first zones. | 04-09-2009 |
20090212330 | METHOD OF FABRICATING A BURIED-GATE SEMICONDUCTOR DEVICE AND CORRESPONDING INTEGRATED CIRCUIT - A semiconductor device includes a semiconductive channel region and a gate region. The gate region has at least one buried part extending under the channel region. The buried part of the gate region is formed by forming a cavity under the channel region. That cavity is at least partial filled with silicon and a metal. An annealing step is performed so as to form a silicide of said metal in the cavity. The result is a totally silicided buried gate for the semiconductor device. | 08-27-2009 |
20090212333 | METHOD OF MANUFACTURING A BURIED-GATE SEMICONDUCTOR DEVICE AND CORRESPONDING INTEGRATED CIRCUIT - A semiconductor device includes a semiconductor channel region and a gate region, wherein the gate region includes at least one buried part extending under the channel region. The buried part of the gate region is formed from a cavity under the channel region. The cavity is filled with a first material. An opening is made to access the first material. In one implementation, aluminum is deposited in the opening in contact with the first material. An anneal is performed to cause the aluminum to be substituted for the first material in the cavity. In another implementation, a second material different from the first material is deposited in the opening. An anneal is performed to cause an alloy of the first and second materials to be formed in the cavity. | 08-27-2009 |
20090256224 | INTEGRATED CIRCUIT COMPRISING MIRRORS BURIED AT DIFFERENT DEPTHS - A semiconductor structure including a first active area under which is buried a first reflective layer and a least one second active area under which is buried a second reflective layer, wherein the upper surface of the second reflective layer is closer to the upper surface of the structure than the upper surface of the first reflective layer. | 10-15-2009 |
20090311834 | SOI TRANSISTOR WITH SELF-ALIGNED GROUND PLANE AND GATE AND BURIED OXIDE OF VARIABLE THICKNESS - Method for making a transistor with self-aligned gate and ground plane, comprising the steps of:
| 12-17-2009 |
20100025773 | PROCESS FOR PRODUCING A CONTACT PAD ON A REGION OF AN INTEGRATED CIRCUIT, IN PARTICULAR ON THE ELECTRODES OF A TRANSISTOR - A region is locally modified so as to create a zone that extends as far as at least part of the surface of the region and is formed from a material that can be removed selectively with respect to the material of the region. The region is then covered with an insulating material. An orifice is formed in the insulating material emerging at the surface of the zone. The selectively removable material is removed from the zone through the orifice so as to form a cavity in place of the zone. The cavity and the orifice are then filled with at least one electrically conducting material so as to form a contact pad. | 02-04-2010 |
20100099233 | METHOD FOR PRODUCING STACKED AND SELF-ALIGNED COMPONENTS ON A SUBSTRATE - The invention relates to a method for producing stacked and self-aligned components on a substrate, comprising the following steps:
| 04-22-2010 |
20100102389 | FINFET WITH TWO INDEPENDENT GATES AND METHOD FOR FABRICATING THE SAME | 04-29-2010 |
20100184274 | METHOD FOR MANUFACTURING A TRANSISTOR WITH PARALLEL SEMICONDUCTOR NANOFINGERS - A method of producing a transistor having parallel semiconductor nanofingers. The method includes: forming a monocrystalline layer of a semiconductor material on a layer of a subjacent material which can be selectively etched in relation to the monocrystalline layer; etching parallel partitions in the monocrystalline layer and in the subjacent layer and continuing said etching operation in order to hollow out part of the subjacent layer of material; filling the gap between the partitions and the hollowed-out part with a first insulating material; defining a central part of the partitions and removing the first insulating material from around the central part of the monocrystalline layer, thereby forming a finger of semiconductor material; and filling and coating the central part with a conductor material. | 07-22-2010 |
20100203712 | PROCESS FOR FORMING A WIRE PORTION IN AN INTEGRATED ELECTRONIC CIRCUIT - A process for forming a wire portion in an integrated electronic circuit includes epitaxially growing the wire portion on a side surface of a seed layer portion ( | 08-12-2010 |
20100230755 | PROCESS FOR PRODUCING AN MOS TRANSISTOR AND CORRESPONDING INTEGRATED CIRCUIT - A silicon substrate (SOI) is placed on a buried oxide layer (BOX). An MOS transistor is produced in an active zone of the substrate which is defined by an isolating region. A gate region and source and drain regions, which between them define a channel, are produced so that the gate region extends above the channel. The isolating region is produced by localized formation of a zone of material that can be selectively etched with respect to silicon. That material is selectively etched, and a dielectric material is deposited in the etched feature. The etching is carried out after the gate region has been produced. An upper surface of the substrate and an upper surface of the isolating region are flush with each other so as to define a planar surface on which the transistor gate region is formed. | 09-16-2010 |
20100308411 | METHOD FOR FORMING AN INTEGRATED CIRCUIT LEVEL BY SEQUENTIAL TRIDIMENSIONAL INTEGRATION - A method for forming a level of a tridimensional structure on a first support in which components are formed, including the steps of forming, on a second semiconductor support, a single-crystal semiconductor substrate with an interposed thermal oxide layer; placing the free surface of the single-crystal semiconductor substrate on the upper surface of the first support; eliminating the second semiconductor support; and thinning down the thermal oxide layer down to a thickness capable of forming a gate insulator. | 12-09-2010 |
20110014769 | MANUFACTURING METHOD FOR PLANAR INDEPENDENT-GATE OR GATE-ALL-AROUND TRANSISTORS - The present invention relates to a method for fabricating a planar independent-double-gate FET or a planar gate-all-around FET on a bulk semiconductor substrate. The method comprises refilling a surface recess in an active semiconductor region with a buried sacrificial layer, and, after preparing a pre-processing a gate stack by respective deposition and patterning, the formation of a recess in the isolation regions so as to cause the recess to extend, in a depth direction that points towards the inner substrate, to a depth level that allows removing the buried sacrificial layer and so as to cause the recess to undercut portions of gate stack in the channel direction. | 01-20-2011 |
20110059589 | METHOD FOR PRODUCING A FIELD EFFECT DEVICE HAVING SELF-ALIGNED ELECTRICAL CONNECTIONS WITH RESPECT TO THE GATE ELECTRODE - A gate dielectric, an insulating layer and and an etching mask are formed on a substrate. The etching mask delineates at least the gate electrode and the source and drain contacts and the source, drain and gate output lines of the first metal level of a field effect device. The gate electrode and the future source and drain contacts are formed simultaneously by etching of the insulating layer. A gate material is deposited to form the gate electrode. The source and drain contacts are formed at least in the insulating layer. The source, drain and gate output lines of the first metal level are formed in the etching mask. | 03-10-2011 |
20110108942 | METHOD FOR PRODUCING FIELD EFFECT TRANSISTORS WITH A BACK GATE AND SEMICONDUCTOR DEVICE - The method for producing a field effect transistor on a substrate comprising a support layer, a sacrificial layer and a semi-conducting layer comprises forming an active area in the semi-conducting layer. The active area is delineated by a closed peripheral insulation pattern and comprises an additional pattern made from insulating material. The method also comprises etching the insulating material of the additional pattern to access the sacrificial layer, etching the sacrificial layer resulting in formation of a first cavity, forming a dielectric layer on a top wall of the first cavity, and depositing an electrically conducting layer in the first cavity. The closed peripheral insulation pattern is formed through the semi-conducting layer and the sacrificial layer. | 05-12-2011 |
20110143050 | METHOD FOR PRODUCING A THREE-DIMENSIONALLY CONTROLLED SURFACE COATING IN A CAVITY - The cavity has first and second main walls covered by a photoresist. The photoresist is subjected to electronic or electromagnetic radiation of wavelength comprised between 12.5 nm and 15 nm. A first thickness of the photoresist is exposed to form a first area of sacrificial material and a second area of different nature defining the surface coating. The sacrificial material is removed, the surface coating is formed and has a surface against one of the main walls and a free opposite surface. The lateral dimensions of the surface coating are defined in the cavity by the radiation through the first main wall. | 06-16-2011 |
20110147881 | HYBRID SUBSTRATE WITH IMPROVED ISOLATION AND SIMPLIFIED METHOD FOR PRODUCING A HYBRID SUBSTRATE - A hybrid substrate comprises first and second active areas made from semiconductor materials laterally offset from one another and separated by an isolation area. The main surfaces of the isolation area and of the first active area form a plane. The hybrid substrate is obtained from a source substrate successively comprising layers made from a first and second semiconductor materials separated by an isolation layer. A single etching mask is used to pattern the isolation area, first active area and second active area. The main surface of the first active area is released thereby forming voids in the source substrate. The etching mask is eliminated above the first active area. A first isolation material is deposited, planarized and etched until the main surface of the first active area is released. | 06-23-2011 |
20110291199 | SRAM MEMORY CELL WITH FOUR TRANSISTORS PROVIDED WITH A COUNTER-ELECTRODE - The memory cell is of SRAM type with four transistors provided with a counter-electrode. It comprises a first area made from semiconductor material with a first transfer transistor and a first driver transistor connected in series, their common terminal defining a first electric node. A second transfer transistor and a second driver transistor are connected in series on a second area made from semiconductor material and their common terminal defines a second electric node. The support substrate comprises first and second counter-electrodes. The first and second counter-electrodes are located respectively facing the first and second semiconductor material areas. The first transfer transistor and second driver transistor are on a first side of a plane passing through the first and second electric nodes whereas the first driver transistor and second transfer transistor are on the other side of the plane. | 12-01-2011 |
20110298019 | COMPACT FIELD EFFECT TRANSISTOR WITH COUNTER-ELECTRODE AND FABRICATION METHOD - An etching mask, comprising the delineation pattern of the gate electrode, of a source contact, a drain contact and a counter-electrode contact, is formed on a substrate of semi-conductor on insulator type. The substrate is covered by a layer of dielectric material and a gate material. The counter-electrode contact is located in the pattern of the gate electrode. The gate material is etched to define the gate electrode, the source contact and drain contacts and the counter-electrode contact. A part of the support substrate is released through the pattern of the counter-electrode contact area. An electrically conductive material is deposited on the free part of the support substrate to form the counter-electrode contact. | 12-08-2011 |
20110316055 | SUBSTRATE PROVIDED WITH A SEMI-CONDUCTING AREA ASSOCIATED WITH TWO COUNTER-ELECTRODES AND DEVICE COMPRISING ONE SUCH SUBSTRATE - A support substrate comprises first and second counter-electrodes arranged in the same plane at the level of a surface of the support substrate. An electrically insulating area separates the first and second counter-electrodes. A semi-conducting area with first and second portions is separated from the support substrate by an electrically insulating material. The electrically insulating material is different from the material forming the support substrate. The first portion of the semi-conducting area is facing the first counter-electrode. The second portion of the semi-conducting area is facing the second counter-electrode. | 12-29-2011 |
20120070964 | METHOD FOR ELIMINATING THE METAL CATALYST RESIDUES ON THE SURFACE OF WIRES PRODUCED BY CATALYTIC GROWTH - This method for eliminating the catalyst residues present on the surface of solid structures made from a first material and obtained by catalytic growth, includes the following steps:
| 03-22-2012 |
20120079709 | PRODUCING A DEFORMABLE SYSTEM WITH A VIEW TO DISPLACING AN OBJECT ENCLOSED IN THE LATTER - The invention relates to a method for displacing an object in a solid system involving the following steps: placing the object in a matrix which is solid at a first temperature and capable of softening due to the effect of a temperature increase; if necessary, increasing the temperature until the matrix softens; applying an external action to the object so as to move it inside the matrix; lowering the temperature until the matrix solidifies. | 04-05-2012 |
20120199821 | ORGANIC DUAL-GATE MEMORY AND METHOD FOR PRODUCING SAME - The organic memory device is a double-gate transistor that successively comprises a first gate electrode, a first gate dielectric, an organic semi-conductor material, a second gate dielectric and a second gate electrode. Source and drain electrodes are arranged in the organic semiconductor material and define an inter-electrode surface. A trapping area is arranged between the organic semiconductor material and one of the gate electrodes and is in electric contact with one of the gate electrodes or the organic semi-conductor material. The trapping area is at least facing the inter-electrode surface. | 08-09-2012 |
20120260962 | ELECTRICAL GENERATOR USING THE THERMOELECTRIC EFFECT AND TWO CHEMICAL REACTIONS, I.E. EXOTHERMIC AND ENDOTHERMIC REACTIONS, TO GENERATE AND DISSIPATE HEAT, RESPECTIVELY - An electric generator based on a thermoelectric effect includes at least a heat source, a heat dissipator and a thermoelectric converter provided with at least two areas respectively in contact with the heat source and the heat dissipator. The heat source is the center of an exothermic chemical reaction, such as the catalytic combustion of hydrogen. The heat dissipator is the center of an endothermic chemical reaction, at least one product of which forms one of the reagents of the exothermic chemical reaction. Once it is formed by the heat dissipator, said product is then directed towards the input of the heat source in order to react there. The endothermic chemical reaction is more particularly a steam reforming reaction for methanol. | 10-18-2012 |
20120292183 | Stand-Alone Water Detection Device That Includes a Hydrogen Source - A water detection device comprising at least one fuel cell comprising a first electrode, a layer of electrolyte, a second electrode and an electrical measurement device characterized in that the first electrode of the cell is in contact with a first face of a porous silicon substrate comprising Si—H bonds, in such a manner as to liberate a flow of hydrogen in the presence of water. Advantageously, the substrate of porous silicon is incorporated into a first housing permeable to water, the fuel cell being incorporated into a second housing said second housing being impermeable to water and permeable to oxygen. | 11-22-2012 |
20120321938 | MICROBATTERY AND METHOD FOR MANUFACTURING SAME - The invention relates to a microbattery that comprises a stack on a substrate, covered by an encapsulation layer and comprising first and second current collector/electrode assemblies, a solid electrolyte and electrical connections of the second current collector/electrode assembly to an external electrical load. The electrical connections are formed by at least two electrically conductive barriers passing through the encapsulation layer from an inner surface to an outer surface of the encapsulation layer. Each of the barriers has a lower wall in direct contact with a front surface of the second current collector/electrode assembly and an upper wall opening onto the outer surface of the encapsulation layer. The barriers form a compartmentalization network within the encapsulation layer. | 12-20-2012 |
20130052552 | DEVICE FORMING A MANOMETER INTENDED FOR MEASURING BIPHASIC FLUID PRESSURE, ASSOCIATED METHOD OF MANUFACTURE AND FLUIDIC NETWORK - A device forming a manometer, configured to measure pressure of a biphasic fluid in a fluidic network, including: a first channel inside which a biphasic fluid is able to flow; a second channel emerging into the first channel, wherein the second channel is blind, with each of its dimensions less than capillary length of the fluid's liquid phase, and with at least one of its lengthways wall having a surface energy gradient that decreases from its inlet to the end. The surface energy gradient enables the wetting angle of the meniscus of the fluid's liquid phase to be increased in the blind channel from its inlet to the end. Such a device may find application to measurement of pressure of a biphasic fluid in a heat exchanger or in a fuel cell. | 02-28-2013 |
20130098416 | MODULATABLE THERMOELECTRIC DEVICE - A thermoelectric device includes first and second legs extending continuously between first and second heat sources. The first and second legs respectively include first and second conducting elements and third and fourth conducting elements. The first and third conducting elements are adjacent and separated by an insulator. The second and fourth conducting elements are adjacent and separated by an insulator. The device also includes selection means enabling formation of a first thermocouple from the first and second conducting elements and formation of a second thermocouple from the third and fourth conducting elements. | 04-25-2013 |
20130100985 | THERMOELECTRIC DEVICE WHICH PROVIDES FOR VARYING THE EFFECTIVE HEIGHT OF THE CONTACTS OF A THERMOCOUPLE, AND METHOD FOR MANUFACTURING THE DEVICE - The thermoelectric device includes a first leg made from a first material, anchored at the level of its first end to a support, and a second leg made from a second material, anchored at the level of its first end to said support. In addition, an electric connecting element provided with first and second contact areas is respectively in electric contact with the first leg and second leg so as to form a thermocouple. The device includes means for varying the position of the first and contact areas at the level of the first and second legs. | 04-25-2013 |
20130104951 | OPTIMIZED THERMOELECTRIC MODULE FOR OPERATION IN PELTIER MODE OR IN SEEBECK MODE | 05-02-2013 |
20130256937 | POLYMER LOCALLY COMPRISING CONDUCTIVE AREAS - A method for producing a conductive area in a polymer material comprises: providing a polymer layer comprising conductive particles with a density such that the polymer layer is insulating, heating the polymer material to a temperature higher than or equal to the glass transition temperature of the polymer material, compressing a portion of the polymer layer using a stamp, in order to obtain a density of conductive particles such that the portion becomes conductive, and removing the stamp from the polymer layer. | 10-03-2013 |
20130330471 | FACILITY AND METHOD FOR DEPOSITING A FILM OF ORDERED PARTICLES ONTO A MOVING SUBSTRATE - A facility for depositing a film of ordered particles onto a moving substrate, the facility including: a transfer area including an entry of particles and an exit of particles spaced apart from each other by two side edges facing each other, retaining a carrier liquid on which the particles float, a capillary bridge ensuring connection between the carrier liquid contained in the transfer area and the substrate, and a plurality of suction nozzles capable of attracting the particles towards its two side edges. | 12-12-2013 |
20140014156 | PROCESS FOR MONOLITHIC SERIES CONNECTION OF THE PHOTOVOLTAIC CELLS OF A SOLAR MODULE AND A PHOTOVOLTAIC MODULE IMPLEMENTING THIS PROCESS - A method for manufacturing two series-connected photovoltaic cells includes: forming an insulating substrate; forming a stack including; a first conductive layer formed on the substrate; a semiconductor layer comprising a first absorption layer and a second semiconductor layer forming a junction with the first absorption layer; and a second transparent conductive layer, formed on the absorption layer; forming an area dividing the stack into two cells series-connected by an electric path. The forming of said path comprises: forming a first trench all the way to the substrate; forming a second trench all the way to the first conductive layer; and depositing a conductive solution on the first trench and at last a portion of the second trench, so that the solution does not penetrate into the first trench all the way to the first conductive layer and penetrates into the second trench all the way to the first conductive layer. | 01-16-2014 |
20140147583 | FACILITY AND METHOD FOR DEPOSITING A WIDTH ADJUSTABLE FILM OF ORDERED PARTICLES ONTO A MOVING SUBSTRATE - A facility for depositing a film of ordered particles onto a moving substrate, the facility configured to allow deposition, onto the substrate, of a film of ordered particles escaping from a particle outlet of a transfer zone having a first width. The facility further includes an accessory device in a form of a deposit head, provided to seal the particle outlet and configured to allow the deposition, onto the substrate, of a film of ordered particles escaping from an end of a particle transfer channel of the deposit head, the end having a second width strictly lower than the first width. | 05-29-2014 |
20140158334 | THERMAL MANAGEMENT SYSTEM WITH VARIABLE-VOLUME MATERIAL - A thermal management system configured to be installed between a heat source and a heat sink, including a first heat conductor and a second heat conductor, a thermal switch configured to allow or prevent thermal connection between the first and second heat conductors, the thermal switch including at least one thermally conductive material that can connect the first and second conductors by a change in its volume, and the thermal switch including a controller configured to transfer thermal energy to the phase-change material to change a connection state. The connection is made when the heat source goes above a critical temperature, since the connection enables a heat flux to be established between the heat source and the heat sink. | 06-12-2014 |
20140233186 | COOLING DEVICE EQUIPED WITH A THERMOELECTRIC SENSOR - A cooling device of a component includes at least one channel in which a first cooling fluid flows designed to cool a hot area of the component. It further includes a thermoelectric module configured to measure a temperature difference between the hot area of the component and the channel, and a control circuit configured to modulate the flowrate of the first cooling fluid in the channel according to the temperature difference. | 08-21-2014 |
20140260334 | SECURE THERMOELECTRIC DEVICE - The device includes a thermoelectric module provided with a thermocouple. Said thermocouple includes a first and second leg which are made of different thermoelectric materials, electrically connected by a connecting element configured to deform according to the temperature thereof so as to assume: a first deformation position in which the first and second legs are electrically connected in series solely by means of the connecting element; and a second deformation position in which the connecting element is in electrical contact with a shunt contact pad of the device, said shunt contact pad being made of a material, the electrical conductivity of which is greater than the electric conductivity of the connecting element and of the first and second legs. The device also includes a load, the electrical resistance of which is lower than the electrical resistance of the thermoelectric module, said load being electrically connected to the shunt contact pad. | 09-18-2014 |
20140356528 | METHOD FOR TRANSFERRING OBJECTS ONTO A SUBSTRATE BY MEANS OF A COMPACT FILM OF PARTICLES - A method of transferring objects onto a substrate, or a moving substrate, the objects to be transferred being placed in a transfer area including an inlet and an outlet spaced apart from one another by two lateral edges opposite one another, and holding a carrier liquid forming a conveyor, the objects being held by a compact film of particles floating on the carrier liquid of the transfer area, in which the objects are moved with the particle film to be transferred onto the substrate when they reach the outlet. | 12-04-2014 |
20150022054 | THERMAL ENERGY HARVESTING OPTIMISATION WITH BISTABLE ELEMENTS AND COLLABORATIVE BEHAVIOR - System for converting thermal energy into electrical energy (S | 01-22-2015 |
20150044809 | METHOD FOR DEPOSITING PARTICLES ONTO A SUBSTRATE, INCLUDING A STEP OF STRUCTURING A PARTICLE FILM ON A LIQUID CONVEYOR - A method for depositing particles on a substrate, or a running substrate, including: (a) producing at least one first compact film of particles floating on a carrier liquid provided in a transfer area having an outlet of particles arranged facing the substrate; (b) producing at least one pattern by depositing a substance on the first film in the transfer area, along a contour of the pattern, the substance maintaining the particles of the film together in contact with the substance; (c) removing at least one portion of the particles of the first film located interiorly relatively to the contour, or exteriorly relatively to the contour; and then (d) transferring patterns onto the substrate through the outlet of particles. | 02-12-2015 |
20150075749 | INTEGRATED CIRCUIT CHIP COOLING DEVICE - An integrated circuit chip cooling device includes a network of micropipes. A first pipe portion and a second pipe portion of the network are connected by at least one valve. The valve is formed of a bilayer strip. In response to change in temperature, the shape of the bilayer strip changes to move the valve from a substantially closed position to an open position. In one configuration, the change is irreversible. In another configuration, the change is reversible in response to an opposite change in temperature. | 03-19-2015 |
20150084480 | DEVICE FOR CONVERTING HEAT ENERGY INTO MECHANICAL ENERGY WITH IMPROVED EFFICIENCY - The invention relates to a device for converting heat energy into mechanical energy comprising a first ( | 03-26-2015 |