Patent application number | Description | Published |
20100225436 | MICROFABRICATED INDUCTORS WITH THROUGH-WAFER VIAS - The present invention relates to microfabricated inductors with through-wafer vias. In one embodiment, the present invention is an inductor including a first wafer, a first plurality of metal fillings located within the first wafer, and a first plurality of metal conductors connecting the first plurality of metal fillings together to form a first spiral with a first plurality of windings. In another embodiment, the present invention is a method for producing an inductor including the steps of forming a first plurality of vias in a first substrate, filling the first plurality of vias in the first substrate with a first plurality of metal fillings, forming a first plurality of metal conductors, and connecting pairs of the first plurality of metal fillings together using the first plurality of metal conductors to form a spiral. | 09-09-2010 |
20110131798 | MICROFABRICATED INDUCTORS WITH THROUGH-WAFER VIAS - The present invention relates to microfabricated inductors with through-wafer vias. In one embodiment, the present invention is an inductor including a first wafer, a first plurality of metal fillings located within the first wafer, and a first plurality of metal conductors connecting the first plurality of metal fillings together to form a first spiral with a first plurality of windings. In another embodiment, the present invention is a method for producing an inductor including the steps of forming a first plurality of vias in a first substrate, filling the first plurality of vias in the first substrate with a first plurality of metal fillings, forming a first plurality of metal conductors, and connecting pairs of the first plurality of metal fillings together using the first plurality of metal conductors to form a spiral. | 06-09-2011 |
Patent application number | Description | Published |
20100001378 | Through-substrate vias and method of fabricating same - An through-substrate via fabrication method requires forming a through-substrate via hole in a semiconductor substrate, depositing an electrically insulating, continuous and substantially conformal isolation material onto the substrate and interior walls of the via using ALD, and depositing a conductive material into the via and over the isolation material using ALD such that it is electrically continuous across the length of the via hole. The isolation material may be prepared by activating it with a seed layer deposited by ALD. The via hole is preferably formed by dry etching first and second cavities having respective diameters into the substrate's top and bottom surfaces, respectively, to form a single continuous aperture through the substrate. The present method may be practiced at temperatures of less than 200° C. The basic fabrication method may be extended to provide vias with multiple conductive layers, such as coaxial and triaxial vias. | 01-07-2010 |
20100110607 | Vertical capacitors and method of fabricating same - A fabrication method which forms vertical capacitors in a substrate. The method is preferably an all-dry process, comprising forming a through-substrate via hole in the substrate, depositing a first conductive material layer into the via hole using atomic layer deposition (ALD) such that it is electrically continuous across the length of the via hole, depositing an electrically insulating, continuous and substantially conformal isolation material layer over the first conductive layer using ALD, and depositing a second conductive material layer over the isolation material layer using ALD such that it is electrically continuous across the length of the via hole. The layers are arranged such that they form a vertical capacitor. The present method may be successfully practiced at temperatures of less than 200° C., thereby avoiding damage to circuitry residing on the substrate that might otherwise occur. | 05-06-2010 |
20110121427 | THROUGH-SUBSTRATE VIAS WITH POLYMER FILL AND METHOD OF FABRICATING SAME - An through-substrate via fabrication method requires forming a through-substrate via hole in a semiconductor substrate, depositing an electrically insulating, continuous and substantially conformal isolation material onto the substrate and interior walls of the via using ALD, depositing a conductive material into the via and over the isolation material using ALD such that it is electrically continuous across the length of the via hole, and depositing a polymer material over the conductive material such that any continuous top-to-bottom openings present in the via holes are filled by the polymer material. The basic fabrication method may be extended to provide vias with multiple conductive layers, such as coaxial and triaxial vias. | 05-26-2011 |
20120153122 | Imaging Array With Separate Charge Storage Capacitor Layer - An imaging array comprises a photodetector layer, a readout IC (ROIC) layer, and a charge storage capacitor layer which is distinct from the photodetector and ROIC layers; the layers are electrically interconnected to form the array. The capacitors within the charge storage capacitor layer are preferably micromachined; the charge storage capacitor layer can be an interposer layer or an outer layer. | 06-21-2012 |
20120162741 | MICROELECTROMECHANICAL OPTICAL SHUTTER SYSTEM - A microelectromechanical shutter system includes an actuator beam formed in a substrate, at least one actuator electrode spaced apart and electrically isolated from the actuator beam, the at least one actuator electrode angling away from a base of the actuator beam to actuate the actuator beam using a zipper action, and a fiber-optic channel in the substrate to receive a fiber-optic cable. A shutter mirror is included on a distal end of the actuator beam, with the shutter mirror in substantial alignment with a centerline of the fiber-optic channel. Upon application of a voltage between the actuator beam and the at least one actuator electrode, an electrostatic force is created between them to move the shutter mirror across the end of the fiber-optic channel. | 06-28-2012 |
20120286884 | Micro-scale System to Provide Thermal Isolation and Electrical Communication Between Substrates - A microscale apparatus includes a microscale rigidized Parylene strap having a reinforcement structure extending from a first side of the strap, a first silicon substrate suspended by the microscale rigidized Parylene strap, the microscale rigidized Parylene strap conformally coupled to the first substrate, and a second substrate conformally coupled to the microscale rigidized Parylene strap to suspend the first silicon substrate through the microscale rigidized Parylene strap. | 11-15-2012 |
20130293314 | Micro-scale System to Provide Thermal Isolation and Electrical Communication Between Substrates - An apparatus includes a chip-scale atomic clock (CSAC) alkali vapor cell seated on a silicon substrate that is suspended in a package by a metalized Parylene strap having Parylene anchors embedded in a silicon frame, the Parylene strap comprising an extended rigidizing structure, and a plurality of electrical pins extending into an interior of the package, the plurality of electrical pins in electrical communication with the CSAC cell through the metalized Parylene strap, where the CSAC cell is mechanically connected to the package and thermally insulated from the package. | 11-07-2013 |