Oh, Icheon-Si
Byoung-Chan Oh, Icheon-Si KR
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20140241039 | ELECTRONIC DEVICE AND METHOD FOR OPERATING THE SAME - An electronic device including a semiconductor memory. The semiconductor memory includes a plurality of variable resistance elements; a plurality of read voltage application terminals configured to supply different levels of read voltages to respective one ends of the plurality of variable resistance elements; and an analog-to-digital conversion unit configured to generate multi-bit digital data corresponding to a total current which is acquired by summing currents flowing through the plurality of variable resistance elements. | 08-28-2014 |
20140337568 | ELECTRONIC DEVICE AND METHOD FOR OPERATING THE SAME - Provided is an electronic device including a power supply circuit. The power supply circuit includes: a voltage driving unit configured to pull-up drive an output node and generate an output voltage; and a driving control unit configured to receive the output voltage, disable the voltage driving unit from the time at which a divided voltage obtained by dividing the output voltage at a set ratio becomes higher than a first level, and enable the voltage driving unit from the time at which the divided voltage becomes lower than a second level, which is higher than the first level. | 11-13-2014 |
20150049536 | ELECTRONIC DEVICE - Provided an electronic device including a semiconductor memory unit. The semiconductor memory unit includes: a plurality of storage cells each including a variable resistance element of which resistance is changed in response to a current flowing across the variable resistance element and a selecting element coupled to one end of the variable resistance element; a plurality of word lines corresponding to the respective storage cells and each coupled to a selecting element of a corresponding storage cell; a first line coupled to one ends of the plurality of storage cells; a second line coupled to the other ends of the plurality of storage cells; a voltage adjuster configured to adjust the voltage levels of back bias voltages of the selecting elements of the plurality of storage cells; and an access control unit electrically coupled to the first and second lines and passing an access current to a selected storage cell among the plurality of storage cells. | 02-19-2015 |
Hoon Jung Oh, Icheon-Si KR
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20090122461 | CAPACITOR FOR A SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - Disclosed is a capacitor for a semiconductor device, comprising: a lower electrode formed over a predetermined lower structure on a semiconductor substrate; an aluminum oxynitride film formed over the lower electrode and having a low leakage current characteristic; a yttrium oxynitride film formed over the aluminum oxynitride film and having a higher dielectric constant than the aluminum oxynitride film; and an upper electrode formed over the yttrium oxynitride film, and a manufacturing method thereof. | 05-14-2009 |
Hyun-Myung Oh, Icheon-Si KR
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20090126378 | CHILLER OF ETCH EQUIPMENT FOR SEMICONDUCTOR PROCESSING - A chiller for etching equipment for processing a semiconductor includes: a chuck for controlling a temperature of a semiconductor wafer, a coolant pipeline connected to the chuck, a coolant tank connected to the coolant pipeline, an evaporator in the coolant tank, a refrigerant in the evaporator, a compressor for compressing refrigerant flowing from the evaporator, a condenser for condensing the compressed refrigerant from the compressor, and an electronically controlled expansion valve connected to the condenser to receive compressed refrigerant, and connected to the evaporator for feeding the expanded refrigerant into evaporator. | 05-21-2009 |
Jae-Geun Oh, Icheon-Si KR
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20100084720 | Gate in semiconductor device and method of fabricating the same - A gate of a semiconductor device includes a substrate, and a polysilicon layer over the substrate, wherein the polysilicon layer is doped with first conductive type impurities having a concentration that decreases when receding from the substrate and counter-doped with second conductive type impurities having a concentration that increases when receding from the substrate. | 04-08-2010 |
20140287535 | ELECTRONIC DEVICE AND METHOD FOR FABRICATING THE SAME - An electronic device comprising a semiconductor memory unit that includes a resistance variable element formed over a substrate, and including stacked therein a bottom electrode, a variable resistance layer and a top electrode, and a barrier layer formed over the resistance variable element, and including an amorphous silicon layer which is doped with at least one kind of impurity. | 09-25-2014 |
20150069557 | MAGNETORESISTIVE ELEMENT AND METHOD OF MANUFACTURING THE SAME - According to one embodiment, a magnetoresistive element is disclosed. The magnetoresistive element includes a reference layer, a tunnel barrier layer, a storage layer. The storage layer includes a first region and a second region provided outside the first region to surround the first region, the second region including element included in the first region and another element being different from the element. The magnetoresistive element further includes a cap layer including a third region and a fourth region provided outside the third region to surround the third region, the fourth region including an element included in the third region and the another element. | 03-12-2015 |
20150069558 | MAGNETIC MEMORY AND METHOD OF MANUFACTURING THE SAME - According to one embodiment, a magnetic memory is disclosed. The memory includes a conductive layer containing a first metal material, a stacked body above the conductive layer, and including a first magnetization film containing a second metal material, a second magnetization film, and a tunnel barrier layer between the first magnetization film and the second magnetization film, and an insulating layer on a side face of the stacked body, and containing an oxide of the first metal material. The first magnetization film and/or the second magnetization film includes a first region positioned in a central portion, and a second region positioned in an edge portion and containing As, P, Ge, Ga, Sb, In, N, Ar, He, F, Cl, Br, I, Si, B, C, O, Zr, Tb, S, Se, or Ti. | 03-12-2015 |
Jae Min Oh, Icheon-Si KR
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20130240824 | RESISTIVE MEMORY DEVICE AND FABRICATION METHOD THEREOF - A resistive memory device capable of implementing a multi-level cell (MLC) and a fabrication method thereof are provided. The resistive memory device includes a lower electrode connected to a switching device and including a first node and a second node formed on a top thereof to be spaced at a fixed interval, a phase-change material pattern formed on the first node and the second node, an upper electrode formed on the phase-change material pattern, a conductive material layer formed on a top and outer sidewall of the upper electrode, a first contact plug formed on one edge of the upper electrode to be connected to the upper electrode and the conductive material layer, and a second contact plug formed on the other edge of the upper electrode to be connected to the upper electrode and the conductive material layer. | 09-19-2013 |
20150024571 | RESISTIVE MEMORY DEVICE AND FABRICATION METHOD THEREOF - A resistive memory device capable of implementing a multi-level cell (MLC) and a fabrication method thereof are provided. The resistive memory device includes a lower electrode connected to a switching device and including a first node and a second node formed on a top thereof to be spaced at a fixed interval, a phase-change material pattern formed on the first node and the second node, an upper electrode formed on the phase-change material pattern, a conductive material layer formed on a top and outer sidewall of the upper electrode, a first contact plug formed on one edge of the upper electrode to be connected to the upper electrode and the conductive material layer, and a second contact plug formed on the other edge of the upper electrode to be connected to the upper electrode and the conductive material layer. | 01-22-2015 |
Jae Sung Oh, Icheon-Si KR
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20140361426 | STACKED SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME - A stacked semiconductor package includes: a first semiconductor chip formed with a first through electrode, the first through electrode protruding above a first surface of the first semiconductor chip; a first polymer layer formed over the first surface of the first semiconductor chip such that the first through electrode is exposed by the first polymer layer; a second semiconductor chip having a first surface attached onto the first semiconductor chip by medium of the first polymer layer and a vial hole passing through the second semiconductor chip, the first surface of the second semiconductor chip being formed with a bonding pad having a through hole which corresponds to the first through electrode; and a second through electrode located within the through hole and the via hole and is electrically connected with the first through electrode. | 12-11-2014 |
Jung Seok Oh, Icheon-Si KR
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20140068222 | SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SAME - A semiconductor memory device is operated by, inter alia, performing least significant bit programs for pages in a first page group, performing least significant bit programs for pages in a second page group, and performing most significant bit programs for the pages in the first page group. The distance between the second page group and the common source line is greater than that between the first page group and the common source line. | 03-06-2014 |
Pyeong Won Oh, Icheon-Si KR
Patent application number | Description | Published |
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20090122461 | CAPACITOR FOR A SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - Disclosed is a capacitor for a semiconductor device, comprising: a lower electrode formed over a predetermined lower structure on a semiconductor substrate; an aluminum oxynitride film formed over the lower electrode and having a low leakage current characteristic; a yttrium oxynitride film formed over the aluminum oxynitride film and having a higher dielectric constant than the aluminum oxynitride film; and an upper electrode formed over the yttrium oxynitride film, and a manufacturing method thereof. | 05-14-2009 |
Sung Lae Oh, Icheon-Si KR
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20120307544 | SEMICONDUCTOR MEMORY APPARATUS - A semiconductor memory apparatus includes a boundary circuit unit positioned between a low voltage page buffer and a high voltage page buffer and having circuits configured to electrically couple the low voltage page buffer and the high voltage page buffer. The boundary circuit unit includes: a first boundary circuit unit having first and second transistors configured to receive data of a corresponding memory cell area through a signal transmission line selected from a plurality of signal transmission lines extended and arranged along a first direction for each column; a second boundary circuit unit disposed adjacent in the first direction from the first boundary circuit unit and having the plurality of signal transmission lines extended and arranged thereon; and an active region where the first transistor is formed and an active region where the second transistor is formed are isolated from each other. | 12-06-2012 |
20130135930 | NONVOLATILE MEMORY APPARATUS AND METHOD FOR FABRICATING THE SAME - A nonvolatile memory apparatus includes a a memory cell array, a page buffer unit connected to bit lines of the memory cell array through a high voltage switching unit, a first interconnection configured to connect a high voltage switch of the high voltage switching unit, connected to an even bit line, to the page buffer unit, and formed at a first layer, and a second interconnection configured to connect a high voltage switch of the high voltage switching unit, connected to an odd bit line, to the page buffer unit, and formed at a second layer different from the first layer. | 05-30-2013 |