Oh, Chungcheongbuk-Do
Bo-Seok Oh, Chungcheongbuk-Do KR
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20090014815 | High voltage device and method for fabricating the same - A high voltage device includes drift regions formed in a substrate, an isolation layer formed in the substrate to isolate neighboring drift regions, wherein the isolation layer has a depth greater than that of the drift region, a gate electrode formed over the substrate, and source and drain regions formed in the drift regions on both sides of the gate electrode. | 01-15-2009 |
20110260294 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A semiconductor device includes: a first well and a second well formed in a substrate and having a different impurity doping concentration; a first isolation layer and a second isolation layer formed in the first well and the second well, respectively, and having a different depth; and a third isolation layer formed in a boundary region in which the first well and the second well are in contact with each other, and having a combination type of the first isolation layer and the second isolation layer. | 10-27-2011 |
Hack-Soo Oh, Chungcheongbuk-Do KR
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20120013774 | CMOS IMAGE SENSOR FOR HIGH SPEED SIGNAL PROCESSING - A CMOS image sensor includes: a plurality of CDS/PGAs (correlating double sampling/programmable gain amplifiers) for processing output signals of pixels corresponding to same colors on different paths; and an offset difference removing part for removing offset difference that occurs when the same color signals are processed on the different paths, wherein the offset difference removing part includes: a dummy pixel array where light is shielded; a unit for reading signals of the dummy pixel array through the CDS/PGAs and storing average offset values for each path; and a signal synthesizing unit for synthesizing the average offset values and signals of an effective pixel array, which are read through the respective CDS/PGAs, and outputting signals of which offset difference is removed. | 01-19-2012 |
Hae Soon Oh, Chungcheongbuk-Do KR
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20160125946 | SEMICONDUCTOR DEVICE AND OPERATING METHOD THEREOF - A semiconductor device includes a memory array including memory blocks, and an operation circuit suitable for performing a program loop and an erase loop on memory cells and selection transistors included in a selected memory block, wherein the operation circuit performs the program loop on the selection transistors so that a difference occurs between threshold voltages of the selection transistors and a target threshold voltage based on a difference between a cell current value of the selected memory block and a reference cell current value. | 05-05-2016 |
Hyung Seog Oh, Chungcheongbuk-Do KR
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20110169808 | AMPLIFIER INCLUDING DITHERING SWITCH AND DISPLAY DRIVING CIRCUIT USING THE AMPLIFIER - An amplifier and a display driving circuit. The amplifier includes an input stage, a bias stage and an output stage. The input stage determines voltage levels of two nodes in correspondence to two input voltages received in response to a first bias voltage, and includes four path selecting switches, two input transistors and one bias transistor. The bias stage generates two class AB output voltages which correspond to the voltage levels of the two nodes, and includes current mirrors, ten path selecting switches, class AB bias circuits and two bias transistors. The output stage generates an output voltage VOUT that corresponds to the two class AB output voltages, and includes two coupling capacitors and two push-pull transistors. The plurality of path selecting switches operate by one signal of a first path selecting signal and a second path selecting signal that are exclusively enabled with respect to each other. | 07-14-2011 |
20110199821 | POWER MANAGEMENT CHIP FURNISHED WITH VOLTAGE CONTROLLER - A power management IC includes a first IC having a boost converter IC which generates a second voltage using a first voltage supplied from an outside and supplies the second voltages to a charge pump, a reference voltage generation circuit, and an EEPROM; and a second IC configured to be inputted with a third voltage and a fourth voltage as outputs of the charge pump and output a fifth voltage and a sixth voltage. The second IC has a voltage regulator which regulates the third voltage and the fourth voltage or the fifth voltage and the sixth voltage and generates an eighth voltage and a ninth voltage as voltages required for programming operation or erasing operation of the EEPROM. | 08-18-2011 |
Hyung-Seong Oh, Chungcheongbuk-Do KR
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20110164006 | DISPLAY DRIVE CIRCUIT - A display driving circuit includes a buffer section, an N-dot switch circuit, a charge sharing switch circuit, and a sharing voltage level control switch circuit. The buffer section buffers a plurality of pixel driving signals outputted from a plurality of DACs. The N-dot switch circuit selects paths of the plurality of pixel driving signals outputted from the buffer section in response to a first path selecting signal or a second path selecting signal that is determined depending upon a dot inversion method, and switches the paths to a plurality of output terminals. The charge sharing switch circuit shares charges among the plurality of output terminals in response to a charge sharing control signal. The sharing voltage level control switch circuit controls charge sharing between the plurality of output terminals and a voltage level upon charge sharing, in response to a sharing voltage level control signal. | 07-07-2011 |
Kwon-Young Oh, Chungcheongbuk-Do KR
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20090284504 | MEMORY DEVICE WITH ONE-TIME PROGRAMMABLE FUNCTION, AND DISPLAY DRIVER IC AND DISPLAY DEVICE WITH THE SAME - A display driver IC with a built-in memory device having a one-time programmable function is provided. The memory device includes: a cell array comprising a plurality of one-time programmable unit cells and configured to receive a writing voltage generated from an internal voltage generating unit to operate upon writing operation; a detecting unit configured to detect a change of the writing voltage; and a controlling unit configured to control the internal voltage generating unit and the unit cells according to an output signal of the detecting unit. | 11-19-2009 |
20090309824 | DISCHARGE CIRCUIT AND DISPLAY DEVICE WITH THE SAME - A discharge circuit of a device including a drive circuit operating by an inputted negative voltage includes: a discharge unit connected between a first input terminal receiving the negative voltage and a second input terminal receiving a ground voltage, and configured to discharge the negative voltage to the ground voltage of the second input terminal in response to a control signal; and a control unit connected between the first input terminal and a third input terminal receiving an operation voltage corresponding to a normal operation mode and an abnormal operation mode of the drive circuit, and configured to generate the control signal in response to an operation signal for determining an operation state and a non-operation state in the normal operation mode of the drive circuit. | 12-17-2009 |
Sung Lae Oh, Chungcheongbuk-Do KR
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20140346611 | SEMICONDUCTOR DEVICE - A semiconductor device may include a voltage supply unit suitable for supplying a voltage, a first conductive line coupled to the voltage supply unit, a second conductive line formed over the first conductive line, a voltage contact plug formed over the second conductive line, a voltage transmission line formed over the voltage contact plug, and a switching element suitable for switching the voltage transferred from the voltage transmission line. | 11-27-2014 |
20150041901 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device may include a string including at least one drain select transistor, a plurality of first memory cells, a first connection element, a plurality of second memory cells, a second connection element, a plurality of third memory cells, and at least one source select transistor, wherein the at least one drain select transistor, the plurality of first memory cells, the plurality of second memory cells, the plurality of third memory cells, and the at least one source select transistor connected serially via the first connection element and the second connection element. | 02-12-2015 |
20150041903 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device includes a plurality of transistors formed over a substrate, a support body including a horizontal portion and protrusions, wherein the horizontal portion covers at least one of the transistors, and the protrusions are formed over the horizontal portion and located between the transistors, and conductive layers and insulating layers alternately stacked over the support body and protruding upwardly along the sidewalls of the protrusions. | 02-12-2015 |
20150069616 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device includes a substrate on which a plurality of contact regions are defined, a plurality of transistors formed in the plurality of contact regions, a support body formed over the plurality of transistors and including a top surface, portions of which have different heights in the plurality of contact regions, a plurality of stacked structures including a plurality of conductive layers stacked over the support body, slits located between the plurality of stacked structures, first lines coupled to first junctions of the plurality of transistors through the slits, and second lines coupled to second junctions of the plurality of transistors through the slits. | 03-12-2015 |
20150091135 | SEMICONDUCTOR DEVICE - A semiconductor device includes an insulating layer formed on a substrate, and a capacitor including first and second electrodes formed in the insulating layer, wherein a lower surface of the first electrode is formed to have a greater depth than a lower surface of the second electrode in the insulating layer. | 04-02-2015 |
20150243673 | SEMICONDUCTOR DEVICE - Provided are a semiconductor device. The semiconductor device includes a memory block including a drain select line, word lines, and a source select line, which are spaced apart from one another and stacked in a direction perpendicular to a semiconductor substrate; and a peripheral circuit including a switching device connected to a bit line, which is disposed under a vertical channel layer vertically passing through the drain select line, the word lines, and the source select line. | 08-27-2015 |
20150371944 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device includes a plurality of transistors formed over a substrate, a support body including a horizontal portion and protrusions, wherein the horizontal portion covers at least one of the transistors, and the protrusions are formed over the horizontal portion and located between the transistors, and conductive layers and insulating layers alternately stacked over the support body and protruding upwardly along the sidewalls of the protrusions. | 12-24-2015 |
20160111361 | 3D NONVOLATILE MEMORY DEVICE - A 3D nonvolatile memory device including memory cells vertically stacked is disclosed. Word lines are integrally formed to be elongated over adjacent cell regions spaced apart from each other, and portions of the word lines between the cell regions are partially etched in a stepped shape to form word line contact regions. | 04-21-2016 |