Patent application number | Description | Published |
20080291092 | SEMICONDUCTOR DEVICE - A semiconductor device includes a first level layer, a transmitting antenna provided on the first level layer and extending in a first direction, a receiving antenna provided on the first level layer and extending in the first direction, and a plurality of first wiring portions provided on the first level layer and extending in a second direction that makes an angle of 45 to 90 degrees with respect to the first direction. | 11-27-2008 |
20080308945 | Semiconductor Integrated Circuit - A semiconductor integrated circuit according to an example of the present invention includes a first interconnect extending in a first direction, a second interconnect arranged over the first interconnect and extending in a second direction intersecting the first direction, a first via for connecting a first contact part of the first interconnect and a second contact part of the second interconnect, and a second via for connecting a third contact part of the first interconnect and a fourth contact part of the second interconnect. The first and third contact parts are arranged by being aligned in the first direction, and the second and fourth contact parts are arranged by being aligned in the second direction. | 12-18-2008 |
20090042358 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING SAME - The semiconductor device fabrication method according the present invention having, forming an interlayer dielectric film containing carbon above a semiconductor substrate, forming a protective film on that portion of the interlayer dielectric film, which is close to the surface and in which the carbon concentration is low, forming a trench by selectively removing a desired region of the interlayer dielectric film and protective film, such that the region extends from the surface of the protective film to the bottom surface of the interlayer dielectric film, supplying carbon to the interface between the interlayer dielectric film and protective film, and forming a conductive layer by burying a conductive material in the trench. | 02-12-2009 |
20100115479 | Method for generating pattern, method for manufacturing semiconductor device, semiconductor device, and computer program - A method for generating a pattern includes reading out an interconnect layout and a hole layout, the interconnect layout prescribing interconnect patterns, the hole layout prescribing hole patterns configured to connect to the interconnect patterns; extracting one of the hole patterns to be connected within the same interconnect layer level to one of the interconnect patterns in a pattern processing area; extracting a first processing area including the extracted hole pattern; calculating a first pattern density of the interconnect patterns included in the first processing area; and generating first additional patterns in the first processing area based on the first pattern density. | 05-06-2010 |
20100237501 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A method for manufacturing a semiconductor device includes forming an insulating film including silicon, oxygen, carbon and hydrogen above a semiconductor substrate, forming a wiring trench in the insulating film, forming a metal film to be a metal wiring on the insulating film such that the metal film is provided in the wiring trench, forming the metal wiring by removing the metal film outside the wiring trench, performing a hydrophobic treatment to the surface of the insulating film after the forming the metal wiring, and forming a metal cap selectively on an upper surface of the metal wiring by plating after the performing the hydrophobic treatment. | 09-23-2010 |
20110057322 | CARBON NANOTUBE INTERCONNECT AND METHOD OF MANUFACTURING THE SAME - According to one embodiment, a carbon nanotube interconnect includes a first interconnection layer, an interlayer dielectric film, a second interconnection layer, a contact hole, a plurality of carbon nanotubes and a film. The interlayer dielectric film is formed on the first interconnection layer. The second interconnection layer is formed on the interlayer dielectric film. The contact hole is formed in the interlayer dielectric film between the first interconnection layer and the second interconnection layer. The carbon nanotubes are formed in the contact hole. The carbon nanotubes have a first end connected to the first interconnection layer and a second end connected to the second interconnection layer. The film is formed between the interlayer dielectric film and the second interconnection layer. The film has a portion filled between the second ends of the carbon nanotubes. | 03-10-2011 |
20110233779 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - According to one embodiment, a semiconductor device includes an interlayer insulation film provided on a substrate including a Cu wiring, a via hole formed in the interlayer insulation film on the Cu wiring, a first metal film selectively formed on the Cu wiring in the via hole, functioning as a barrier to the Cu wiring, and functioning as a promoter of carbon nanotube growth, a second metal film formed at least on the first metal film in the via hole, and functioning as a catalyst of the carbon nanotube growth, and carbon nanotubes buried in the via hole in which the first metal film and the second metal film are formed. | 09-29-2011 |
20120190212 | LOW DIELECTRIC CONSTANT INSULATING FILM AND METHOD FOR FORMING THE SAME - Disclosed is a low dielectric constant insulating film formed of a polymer containing Si atoms, O atoms, C atoms, and H atoms, which includes straight chain molecules in which a plurality of basic molecules with an SiO structure are linked in a straight chain, binder molecules with an SiO structure linking a plurality of the straight chain molecules. The area ratio of a signal indicating a linear type SiO structure is 49% or more, and the signal amount of the signal indicating Si(CH | 07-26-2012 |