Patent application number | Description | Published |
20130142460 | HYBRID CLAM-SHELL LINEAR BEARING - A linear motion bearing assembly includes (a) first and second interlocking bearing blocks, each having an inner wall which together define an axial space; and (b) a load bearing assembly disposed within the axial space of the interlocking bearing blocks, said load bearing assembly including first and second joinable sleeves, and at least one first load bearing structure disposed within the joined sleeves which includes an inner surface with ball bearings, and at least one second load bearing structure disposed within the joined sleeves which includes an inner low friction surface for facilitating sliding contact with a shaft, but including no ball bearings, the inner surfaces of said first and second load bearing structures together defining an axial channel through which the shaft is disposed and linearly and/or rotatably movable therein. | 06-06-2013 |
20130209008 | LINEAR MOTION BEARING WITH INTERLOCK STRUCTURE - A linear motion bearing assembly comprising a ball retainer structure having at least a portion of a plurality of open axial ball tracks formed therein. The ball tracks including an open load bearing portion, an open return portion and turnarounds interconnecting the load bearing and return portions. A plurality of bearing balls are disposed in the ball tracks. A plurality of load bearing plates are axially positioned adjacent the ball retainer structure for receiving load from the balls disposed in the load bearing portion of the ball tracks. A first outer housing sleeve is effective to hold the ball retainer structure. The first outer housing sleeve includes a first interlock structure. A second outer housing sleeve is effective to hold the ball retainer structure, the second outer housing sleeve including a second interlock structure. The first interlock structure is effective to mate with the second interlock structure. | 08-15-2013 |
20130209009 | CLAM SHELL LINEAR MOTION BEARING ASSEMBLY - A linear motion bearing assembly comprising a rolling element retainer structure and an outer housing sleeve enclosing substantially all of an exposed exterior surface of said rolling element retainer structure. A bearing block effective to enclose substantially all of an exposed exterior surface of the outer housing sleeve, the bearing block including a first bearing block segment effective to enclose a first part of the outer housing sleeve; and a second bearing block segment effective to enclose a second part of the outer housing sleeve, wherein the first bearing block segment and the second bearing block segment include first elements and second elements effective to interlock with each other when the bearing block encloses the outer housing sleeve. | 08-15-2013 |
20130216163 | Linear Motion Bearing with Plate Retaining Structure Having a Plurality of Pieces - A linear motion bearing assembly comprising a ball retainer structure having at least a portion of a plurality of open axial ball tracks formed therein. The ball tracks include an open load bearing portion, an open return portion and turnarounds interconnecting the load bearing and return portions. A plurality of bearing balls are disposed in the ball tracks. A plurality of load bearing plates are axially positioned adjacent the ball retainer structure for receiving load from the balls disposed in the load bearing portion of the ball tracks. A bearing plate to housing intermediary load structure comprises a plurality of pieces and defines at least two spaces in between the pieces. The bearing plate to housing intermediary load structure extends circumferentially around the ball retaining structure. An inner arc of the pieces have a radius of curvature corresponding to a radius of curvature of the ball retainer structure. | 08-22-2013 |
20130216164 | LINEAR MOTION BEARING WITH IMPROVED OUTER HOUSING SLEEVE - A linear motion bearing assembly comprising a ball retainer structure having at least a portion of a plurality of open axial ball tracks formed therein. The ball tracks including an open load-bearing portion, an open return portion and turnarounds interconnecting the load bearing and return portions. A plurality of bearing balls are disposed in the ball tracks. At lease one load bearing plate is axially positioned adjacent said ball retainer structure for receiving load from the balls disposed in the load-bearing portion of the ball tracks. Various outer housing sleeves are disclosed including a structure split axially and a monolithic structure. | 08-22-2013 |
20130236132 | LINEAR BEARING WITH NESTED BEARING TRACKS - A linear motion bearing assembly comprising a load bearing plate structure having at least a portion of a plurality of open axial ball tracks formed therein, each of said plurality of open axial ball tracks comprised of at least two concentric ball tracks. The ball tracks including an open load bearing portion, an open return portion and turnarounds interconnecting the load bearing and return portions. A plurality of bearing balls are disposed in the ball tracks. At lease one load bearing plate is axially positioned adjacent said load bearing plate structure for receiving load from the balls disposed in the load bearing portion of the ball tracks. Various outer housing sleeves are disclosed including a structure split axially and a monolithic structure. | 09-12-2013 |
20140147062 | Linear Motion Bearing System with Self-Aligning Rail - A linear motion bearing system comprising a rolling element retainer structure having at least a portion of a plurality of open axial rolling element tracks formed therein. The rolling element tracks including an open load-bearing portion, an open return portion and turnarounds interconnecting the load bearing and return portions. A plurality of bearing rolling elements are disposed in the rolling element tracks. A plurality of load bearing outer races are axially positioned adjacent the rolling element retainer structure for receiving load from the rolling elements disposed in the load-bearing portion of the rolling element tracks. An outer housing sleeve is effective to hold the rolling element retainer structure. A rail is effective to mate with the rolling element retainer structure, the rail including at least one recess sized and shaped so as to be mateable with at least one of the bearing rolling elements. | 05-29-2014 |
20150176644 | CLAM SHELL LINEAR MOTION BEARING ASSEMBLY - A linear motion bearing assembly comprising a rolling element retainer structure and an outer housing sleeve enclosing substantially all of an exposed exterior surface of said rolling element retainer structure. A bearing block effective to enclose substantially all of an exposed exterior surface of the outer housing sleeve, the bearing block including a first bearing block segment effective to enclose a first part of the outer housing sleeve; and a second bearing block segment effective to enclose a second part of the outer housing sleeve, wherein the first bearing block segment and the second bearing block segment include first elements and second elements effective to interlock with each other when the bearing block encloses the outer housing sleeve. | 06-25-2015 |
20150226257 | LINEAR MOTION BEARING WITH INTERLOCK STRUCTURE - A linear motion bearing assembly comprising a ball retainer structure having at least a portion of a plurality of open axial ball tracks formed therein. The ball tracks including an open load bearing portion, an open return portion and turnarounds interconnecting the load bearing and return portions. A plurality of bearing balls are disposed in the ball tracks. A plurality of load bearing plates are axially positioned adjacent the ball retainer structure for receiving load from the balls disposed in the load bearing portion of the ball tracks. A first outer housing sleeve is effective to hold the ball retainer structure. The first outer housing sleeve includes a first interlock structure. A second outer housing sleeve is effective to hold the ball retainer structure, the second outer housing sleeve including a second interlock structure. The first interlock structure is effective to mate with the second interlock structure. | 08-13-2015 |
Patent application number | Description | Published |
20100072623 | SEMICONDUCTOR DEVICE WITH IMPROVED CONTACT PLUGS, AND RELATED FABRICATION METHODS - Semiconductor device structures and related fabrication methods are provided herein. One fabrication method relates to the formation of conductive contact plugs for a semiconductor device. The method begins by providing a semiconductor device structure having a conductive contact region, a layer of insulating material overlying the conductive contact region, and a via formed in the layer of insulating material and terminating at the conductive contact region. The fabrication process then deposits a first electrically conductive material on the semiconductor device structure such that the first electrically conductive material at least partially fills the via. Then, the process anisotropically etches a portion of the first electrically conductive material located in the filled via, resulting in a lined via. Thereafter, the process deposits a second electrically conductive material on the semiconductor device structure such that the second electrically conductive material at least partially fills the lined via. | 03-25-2010 |
20100109056 | METHODS FOR PROTECTING GATE STACKS DURING FABRICATION OF SEMICONDUCTOR DEVICES AND SEMICONDUCTOR DEVICES FABRICATED FROM SUCH METHODS - Methods for protecting gate stacks during fabrication of semiconductor devices and semiconductor devices fabricated from such methods are provided. In an embodiment, a method for fabricating a semiconductor device comprises forming a gate stack comprising a first gate stack-forming layer overlying a semiconductor substrate and forming first sidewall spacers about sidewalls of the gate stack. After the step of forming the first sidewall spacers, a portion of the first gate stack-forming layer is exposed. The exposed portion is anisotropically etched using the gate stack and the first sidewall spacers as an etch mask. Second sidewall spacers are formed adjacent the first sidewall spacers after the step of anisotropically etching. | 05-06-2010 |
20100244156 | METHODS FOR PROTECTING GATE STACKS DURING FABRICATION OF SEMICONDUCTOR DEVICES AND SEMICONDUCTOR DEVICES FABRICATED FROM SUCH METHODS - Methods for protecting gate stacks during fabrication of semiconductor devices and semiconductor devices fabricated from such methods are provided. In an embodiment, a method for fabricating a semiconductor device comprises forming a gate stack comprising a first gate stack-forming layer overlying a semiconductor substrate and forming first sidewall spacers about sidewalls of the gate stack. After the step of forming the first sidewall spacers, a portion of the first gate stack-forming layer is exposed. The exposed portion is anisotropically etched using the gate stack and the first sidewall spacers as an etch mask. Second sidewall spacers are formed adjacent the first sidewall spacers after the step of anisotropically etching. | 09-30-2010 |
20100295103 | GATE ETCH OPTIMIZATION THROUGH SILICON DOPANT PROFILE CHANGE - Improved semiconductor devices comprising metal gate electrodes are formed with reduced performance variability by reducing the initial high dopant concentration at the top portion of the silicon layer overlying the metal layer. Embodiments include reducing the dopant concentration in the upper portion of the silicon layer, by implanting a counter-dopant into the upper portion of the silicon layer, removing the high dopant concentration portion and replacing it with undoped or lightly doped silicon, and applying a gettering agent to the upper surface of the silicon layer to form a thin layer with the gettered dopant, which layer can be removed or retained. | 11-25-2010 |
20110156146 | eFUSE ENABLEMENT WITH THIN POLYSILICON OR AMORPHOUS-SILICON GATE-STACK FOR HKMG CMOS - An eFUSE is formed with a gate stack including a layer of embedded silicon germanium (eSiGe) on the polysilicon. An embodiment includes forming a shallow trench isolation (STI) region in a substrate, forming a first gate stack on the substrate for a PMOS device, forming a second gate stack on an STI region for an eFUSE, forming first embedded silicon germanium (eSiGe) on the substrate on first and second sides of the first gate stack, and forming second eSiGe on the second gate stack. The addition of eSiGe to the eFUSE gate stack increases the distance between the eFUSE debris zone and an underlying metal gate, thereby preventing potential shorting. | 06-30-2011 |
20110198694 | METHODS FOR FORMING BARRIER REGIONS WITHIN REGIONS OF INSULATING MATERIAL RESULTING IN OUTGASSING PATHS FROM THE INSULATING MATERIAL AND RELATED DEVICES - Methods and devices are provided for fabricating a semiconductor device having barrier regions within regions of insulating material resulting in outgassing paths from the regions of insulating material. A method comprises forming a barrier region within an insulating material proximate the isolated region of semiconductor material and forming a gate structure overlying the isolated region of semiconductor material. The barrier region is adjacent to the isolated region of semiconductor material, resulting in an outgassing path within the insulating material. | 08-18-2011 |
20110227157 | ETSOI WITH REDUCED EXTENSION RESISTANCE - A semiconductor is formed on an SOI substrate, such as an extremely thin SOI (ETSOI) substrate, with increased extension thickness. Embodiments include semiconductor devices having an epitaxially formed silicon-containing layer, such as embedded silicon germanium (eSiGe), on the SOI substrate. An embodiment includes forming an SOI substrate, epitaxially forming a silicon-containing layer on the SOI substrate, and forming a gate electrode on the epitaxially formed silicon-containing layer. After gate spacers and source/drain regions are formed, the gate electrode and underlying silicon-containing layer are removed and replaced with a high-k metal gate. The use of an epitaxially formed silicon-containing layer reduces SOI thickness loss due to fabrication process erosion, thereby increasing extension thickness and lowering extension resistance. | 09-22-2011 |
20110241118 | METAL GATE FILL BY OPTIMIZING ETCH IN SACRIFICIAL GATE PROFILE - A high-k metal gate electrode is formed with reduced gate voids. An embodiment includes forming a replaceable gate electrode, for example of amorphous silicon, having a top surface and a bottom surface, the top surface being larger than the bottom surface, removing the replaceable gate electrode, forming a cavity having a top opening larger than a bottom opening, and filling the cavity with metal. The larger top surface may be formed by etching the bottom portion of the amorphous silicon at greater temperature than the top portion, or by doping the top and bottom portions of the amorphous silicon differently such that the bottom has a greater lateral etch rate than the top. | 10-06-2011 |
20110303954 | SEMICONDUCTOR DEVICES HAVING STRESSOR REGIONS AND RELATED FABRICATION METHODS - Apparatus for semiconductor device structures and related fabrication methods are provided. One method for fabricating a semiconductor device structure involves forming a gate structure overlying a region of semiconductor material, wherein the width of the gate structure is aligned with a <100> crystal direction of the semiconductor material. The method continues by forming recesses about the gate structure and forming a stress-inducing semiconductor material in the recesses. | 12-15-2011 |
20110316093 | SHORT CHANNEL SEMICONDUCTOR DEVICES WITH REDUCED HALO DIFFUSION - A short channel semiconductor device is formed with halo regions that are separated from the bottom of the gate electrode and from each other. Embodiments include implanting halo regions after forming source/drain regions and source/drain extension regions. An embodiment includes forming source/drain extension regions in a substrate, forming source/drain regions in the substrate, forming halo regions under the source/drain extension regions, after forming the source drain regions, and forming a gate electrode on the substrate between the source/drain regions. By forming the halo regions after the high temperature processing involved informing the source/drain and source/drain extension regions, halo diffusion is minimized, thereby maintaining sufficient distance between halo regions and reducing short channel NMOS Vt roll-off. | 12-29-2011 |
20120094466 | SEMICONDUCTOR DEVICE FABRICATION METHOD FOR IMPROVED ISOLATION REGIONS AND DEFECT-FREE ACTIVE SEMICONDUCTOR MATERIAL - A fabrication method for a semiconductor device structure is provided. The device structure has a layer of silicon and a layer of silicon dioxide overlying the layer of silicon, and the method begins by forming an isolation recess by removing a portion of the silicon dioxide and a portion of the silicon. The isolation recess is filled with stress-inducing silicon nitride and, thereafter, the silicon dioxide is removed such that the stress-inducing silicon nitride protrudes above the silicon. Next, the exposed silicon is thermally oxidized to form silicon dioxide hardmask material overlying the silicon. Thereafter, a first portion of the silicon dioxide hardmask material is removed to reveal an accessible surface of the silicon, while leaving a second portion of the silicon dioxide hardmask material intact. Next, silicon germanium is epitaxially grown from the accessible surface of the silicon. | 04-19-2012 |
20120119308 | GATE ETCH OPTIMIZATION THROUGH SILICON DOPANT PROFILE CHANGE - Improved semiconductor devices including metal gate electrodes are formed with reduced performance variability by reducing the initial high dopant concentration at the top portion of the silicon layer overlying the metal layer. Embodiments include reducing the dopant concentration in the upper portion of the silicon layer, by implanting a counter-dopant into the upper portion of the silicon layer, removing the high dopant concentration portion and replacing it with undoped or lightly doped silicon, and applying a gettering agent to the upper surface of the silicon layer to form a thin layer with the gettered dopant, which layer can be removed or retained. | 05-17-2012 |
20120220095 | SEMICONDUCTOR DEVICE FABRICATION METHOD FOR IMPROVED ISOLATION REGIONS AND DEFECT-FREE ACTIVE SEMICONDUCTOR MATERIAL - A fabrication method for a semiconductor device structure is provided. The device structure has a layer of silicon and a layer of silicon dioxide overlying the layer of silicon, and the method begins by forming an isolation recess by removing a portion of the silicon dioxide and a portion of the silicon. The isolation recess is filled with stress-inducing silicon nitride and, thereafter, the silicon dioxide is removed such that the stress-inducing silicon nitride protrudes above the silicon. Next, the exposed silicon is thermally oxidized to form silicon dioxide hardmask material overlying the silicon. Thereafter, a first portion of the silicon dioxide hardmask material is removed to reveal an accessible surface of the silicon, while leaving a second portion of the silicon dioxide hardmask material intact. Next, silicon germanium is epitaxially grown from the accessible surface of the silicon. | 08-30-2012 |
20120235237 | METHODS FOR FORMING BARRIER REGIONS WITHIN REGIONS OF INSULATING MATERIAL RESULTING IN OUTGASSING PATHS FROM THE INSULATING MATERIAL AND RELATED DEVICES - Methods and devices are provided for fabricating a semiconductor device having barrier regions within regions of insulating material resulting in outgassing paths from the regions of insulating material. A method comprises forming a barrier region within an insulating material proximate the isolated region of semiconductor material and forming a gate structure overlying the isolated region of semiconductor material. The barrier region is adjacent to the isolated region of semiconductor material, resulting in an outgassing path within the insulating material. | 09-20-2012 |
20130005128 | METAL GATE FILL BY OPTIMIZING ETCH IN SACRIFICIAL GATE PROFILE - A high-k metal gate electrode is formed with reduced gate voids. An embodiment includes forming a replaceable gate electrode, for example of amorphous silicon, having a top surface and a bottom surface, the top surface being larger than the bottom surface, removing the replaceable gate electrode, forming a cavity having a top opening larger than a bottom opening, and filling the cavity with metal. The larger top surface may be formed by etching the bottom portion of the amorphous silicon at greater temperature than the top portion, or by doping the top and bottom portions of the amorphous silicon differently such that the bottom has a greater lateral etch rate than the top. | 01-03-2013 |
20130153927 | SEMICONDUCTOR DEVICES HAVING STRESSOR REGIONS AND RELATED FABRICATION METHODS - Apparatus for semiconductor device structures and related fabrication methods are provided. One method for fabricating a semiconductor device structure involves forming a gate structure overlying a region of semiconductor material, wherein the width of the gate structure is aligned with a <100> crystal direction of the semiconductor material. The method continues by forming recesses about the gate structure and forming a stress-inducing semiconductor material in the recesses. | 06-20-2013 |
20130249000 | SHORT CHANNEL SEMICONDUCTOR DEVICES WITH REDUCED HALO DIFFUSION - A short channel semiconductor device is formed with halo regions that are separated from the bottom of the gate electrode and from each other. Embodiments include implanting halo regions after forming source/drain regions and source/drain extension regions. An embodiment includes forming source/drain extension regions in a substrate, forming source/drain regions in the substrate, forming halo regions under the source/drain extension regions, after forming the source drain regions, and forming a gate electrode on the substrate between the source/drain regions. By forming the halo regions after the high temperature processing involved informing the source/drain and source/drain extension regions, halo diffusion is minimized, thereby maintaining sufficient distance between halo regions and reducing short channel NMOS Vt roll-off. | 09-26-2013 |
20130320447 | ETSOI WITH REDUCED EXTENSION RESISTANCE - A semiconductor is formed on an SOI substrate, such as an extremely thin SOI (ETSOI) substrate, with increased extension thickness. Embodiments include semiconductor devices having an epitaxially formed silicon-containing layer, such as embedded silicon germanium (eSiGe), on the SOI substrate. An embodiment includes forming an SOI substrate, epitaxially forming a silicon-containing layer on the SOI substrate, and forming a gate electrode on the epitaxially formed silicon-containing layer. After gate spacers and source/drain regions are formed, the gate electrode and underlying silicon-containing layer are removed and replaced with a high-k metal gate. The use of an epitaxially formed silicon-containing layer reduces SOI thickness loss due to fabrication process erosion, thereby increasing extension thickness and lowering extension resistance. | 12-05-2013 |
20140183720 | METHODS OF MANUFACTURING INTEGRATED CIRCUITS HAVING A COMPRESSIVE NITRIDE LAYER - Methods of manufacturing semiconductor integrated circuits having a compressive nitride layer are disclosed. In one example, a method of fabricating an integrated circuit includes depositing an aluminum layer over a semiconductor substrate, depositing a tensile silicon nitride layer or a neutral silicon nitride layer over the aluminum layer, and depositing a compressive silicon nitride layer over the tensile silicon nitride layer or the neutral silicon nitride layer. The compressive silicon nitride layer is deposited at a thickness that is at least about twice a thickness of the tensile silicon nitride layer or the neutral silicon nitride layer. Further, there is no delamination present at an interface between the aluminum layer and the tensile silicon nitride layer or the neutral silicon nitride layer, or at an interface between tensile silicon nitride layer or the neutral silicon nitride layer and the compressive nitride layer. | 07-03-2014 |
Patent application number | Description | Published |
20130327552 | POWER TOOL HAVING MULTIPLE OPERATING MODES - A handheld power tool is configured to receive an input indicative of a clutch setting for an electronic clutch from the tool operator, where the clutch setting is selectable from a drill mode, an automated drive mode and one or more user-defined drive modes. Each of the user-defined drive modes specifies a different value of torque at which to interrupt transmission of torque to the output spindle. In an automated drive mode, the controller interrupt torque to the output spindle in an automated manner when a fastener being driven reaches a desired stopping position. In a selected one of the user-defined drive modes, the controller sets a value of a maximum current threshold in accordance with the selected one of the user-defined drive modes and interrupts torque to the output spindle when current measures exceeding the maximum current threshold. | 12-12-2013 |
20130331994 | FASTENER SETTING ALGORITHM FOR DRILL DRIVER - An improved technique is presented for detecting when a fastener driven by a drill driver has reaches a desired stopping position. The improved techniques generally includes: sampling periodically current delivered to the electric motor; storing a sequence of current measures most recently sampled; and determining a slope for the sequence of current measures by way of linear regression. Transmission of torque to the output spindle can be interrupted based in part on the slope of the current measures. | 12-12-2013 |
20140284070 | OPERATING MODE INDICATOR FOR A POWER TOOL - A handheld power tool is configured to receive an input indicative of a clutch setting for an electronic clutch from the tool operator, where the clutch setting is selectable from a drill mode and a drive mode. In a drill mode, torque applied to the output spindle is ignored; whereas, in the drive mode, the torque applied to the output spindle is monitored and interrupted in an automated manner by a controller when a fastener being driven reaches a desired stopping position. Display states of the interface components of the tool may be set in accordance with current tool conditions and/or various triggering conditions. One such interface component is the input used to set the operating mode (e.g., clutch setting) of the tool. | 09-25-2014 |
20140367134 | REMOTE PROGRAMMING OF A POWER TOOL - A method is provided for controlling operation of a power tool, such as a drill driver. The method begins with one or more descriptors for a fastening application being received by a controller residing in the power tool, where the descriptors are indicative of a fastening application to be performed by the power tool and are received via a wireless data link from a computing device located remotely from the power tool. The descriptors are translated into a threshold value used by a fastener setting algorithm and the threshold value is stored in a data store of the power tool. During a subsequent fastening operation performed using the tool, an operating parameter of the power tool is monitored and evaluated in accordance with the fastener setting algorithm, including the updated threshold value. Example operating parameters include current delivered to the motor and speed of the motor. | 12-18-2014 |
20150041164 | FASTENER SETTING ALGORITHM FOR DRILL DRIVER - A method is provided for setting a fastener in a workpiece. The method includes: monitoring a parameter of the power tool during operation of the power tool, where the parameter is indicative of the placement of a fastener being driven by the power tool in relation to the workpiece; detecting, a change in the parameter, where the detected change in the parameter indicates that the power tool became disengaged with the fastener; modifying operation of the power tool in response to the detected change in the parameter; subsequently detecting a second change in the parameter; and interrupting transmission of torque to the output spindle in response the detected second change in the parameter, thereby properly setting the placement of the fastener in relation to the workpiece. | 02-12-2015 |