Patent application number | Description | Published |
20110007839 | SPUR CANCELLATION IN A DIGITAL BASEBAND TRANSMIT SIGNAL USING CANCELLING TONES - A method for reducing spurs within a transmit signal is disclosed. A cancelling tone is determined. The cancelling tone is added to a baseband transmit signal in the digital domain to obtain a baseband transmit signal with cancelling tone. A spur in the transmit signal is reduced using the cancelling tone. The transmit signal with the reduced spur is transmitted using an antenna. | 01-13-2011 |
20120081188 | WIDEBAND TEMPERATURE COMPENSATED RESONATOR AND WIDEBAND VCO - A resonator of a VCO includes a fine tuning main varactor circuit, an auxiliary varactor circuit, and a coarse tuning capacitor bank circuit coupled in parallel with an inductance. The main varactor circuit includes a plurality of circuit portions that can be separately disabled. Within each circuit portion is a multiplexing circuit that supplies a selectable one of either a fine tuning control signal (FTAVCS) or a temperature compensation control signal (TCAVCS) onto a varactor control node within the circuit portion. If the circuit portion is enabled then the FTAVCS is supplied onto the control node so that the circuit portion is used for fine tuning. If the circuit portion is disabled then the TCAVCS is supplied onto the control node so that the circuit portion is used to combat VCO frequency drift as a function of temperature. How the voltage of the TCAVCS varies with temperature is digitally programmable. | 04-05-2012 |
20120082151 | RECONFIGURABLE LOCAL OSCILLATOR FOR OPTIMAL NOISE PERFORMANCE IN A MULTI-STANDARD TRANSCEIVER - A transceiver for multi-standard operation (usable, for example, to communicate signals both of a first wireless communication standard and of a second wireless communication standard) has a mixer that receives a local oscillator signal generated by a local oscillator. A PLL of the local oscillator involves a VCO, a digitally programmable analog loop filter, a digitally programmable VCO supply voltage circuit, and a digitally programmable VCO varactor bias control circuit. In one aspect, the bandwidth of the analog loop filter is adjusted depending on the communication standard of the signal being communicated. In other aspects, the VCO supply voltage circuit and/or the varactor bias control circuit are configured in different ways to optimize PLL performance depending on the communication standard of the signal being communicated. | 04-05-2012 |
20120092053 | ADAPTIVE CLOCK SWITCHING TO CAPTURE ASYNCHRONOUS DATA WITHIN A PHASE-TO-DIGITAL CONVERTER - A Phase-to-Digital Converter (PDC) within a Phase-Locked Loop (PLL) includes a PDC portion and a PDC decoder portion. The PDC portion receives a reference signal FR and a feedback signal FV and generates therefrom a stream of multi-bit digital values. Each multi-bit value is indicative of a time difference between an edge of FR and a corresponding edge of FV. The PDC decoder portion includes sequential logic elements that are clocked to capture the multi-bit digital values. In order to prevent metastability, the timing of when the sequential logic elements are clocked to capture the multi-bit digital values is adjusted as a function of the phase difference between FR and FV. In one specific example, if the phase difference is small then the falling edge of FR is used to clock the sequential logic elements, whereas if the phase difference is large then the rising edge of FR is used. | 04-19-2012 |
20120146828 | DIGITAL-TO-ANALOG CONVERTER WITH NON-UNIFORM RESOLUTION - A circuit includes a digital-to-analog converter with non-uniform resolution for converting a digital signal into an analog signal. The digital-to-analog converter includes high-resolution circuitry, reduced-resolution circuitry coupled to the high-resolution circuitry and a switch coupled to the high-resolution circuitry and to the reduced-resolution circuitry. The switch couples one of the high-resolution circuitry and the reduced-resolution circuitry to an output node. The circuit also includes a decoder coupled to the switch. The decoder receives the digital signal to control the switch. | 06-14-2012 |
20120201338 | TWO POINT MODULATION DIGITAL PHASE LOCKED LOOP - A two point modulation digital phase locked loop circuit is disclosed. The circuit includes a sampling clock input that is switchable between a plurality of frequencies. The circuit also includes a sigma-delta modulator in a feedback path that receives low-pass modulation data. The circuit also includes a voltage-mode digital-to-analog converter (VDAC) that receives high-pass modulation data. The circuit also includes an analog voltage controlled oscillator coupled to the feedback path and the output of the VDAC. The circuit also includes a phase-to-digital converter (PDC) coupled to the feedback path, the sampling clock and a loop filter. | 08-09-2012 |
20130141177 | TUNABLE INDUCTOR CIRCUIT - A tunable inductor circuit is disclosed. The tunable inductor circuit includes a first inductor. The tunable inductor circuit also includes a second inductor in parallel with the first inductor. The tunable inductor circuit also includes a switch coupled to the second inductor. A resistance of the switch is added in parallel to the first inductor based on operation of the switch. | 06-06-2013 |
20130241754 | DIGITAL-TO-ANALOG CONVERTER WITH NON-UNIFORM RESOLUTION - A circuit includes a digital-to-analog converter with non-uniform resolution for converting a digital signal into an analog signal. The digital-to-analog converter includes high-resolution circuitry, reduced-resolution circuitry coupled to the high-resolution circuitry and a switch coupled to the high-resolution circuitry and to the reduced-resolution circuitry. The switch couples one of the high-resolution circuitry and the reduced-resolution circuitry to an output node. The circuit also includes a decoder coupled to the switch. The decoder receives the digital signal to control the switch. | 09-19-2013 |
20140031076 | SYSTEM AND METHOD OF DETERMINING AN OSCILLATOR GAIN - A method includes generating a first signal based on a difference between a first frequency of a first voltage controlled oscillator (VCO) and a second frequency of a second VCO. The method further includes determining a gain of the first VCO at least partially based on the first signal. | 01-30-2014 |
20140134959 | EXPANDABLE TRANSCEIVERS AND RECEIVERS - Expandable transceivers and receivers supporting operation on multiple frequency bands and multiple carriers are disclosed. In an exemplary design, an apparatus (e.g., a wireless device, an integrated circuit (IC) chip, or circuit module) includes a low noise amplifier (LNA) and interface circuit. The LNA resides on an IC chip and includes a first/on-chip output and a second/off-chip output. The interface circuit also resides on the IC chip, is coupled to the second output of the LNA, and provides an amplified RF signal outside of the IC chip. The apparatus may further include a buffer, load circuit, and downconverter circuit. The buffer resides on the IC chip, is coupled to the first output of the LNA, and receives a second amplified RF signal from outside of the IC chip. The load circuit is coupled to the first output of the LNA. The downconverter circuit is coupled to the load circuit. | 05-15-2014 |
20140134960 | OMNI-BAND AMPLIFIERS - Omni-band amplifiers supporting multiple band groups are disclosed. In an exemplary design, an apparatus (e.g., a wireless device, an integrated circuit, etc.) includes at least one gain transistor and a plurality of cascode transistors for a plurality of band groups. Each band group covers a plurality of bands. The gain transistor(s) receive an input radio frequency (RF) signal. The cascode transistors are coupled to the gain transistor(s) and provide an output RF signal for one of the plurality of band groups. In an exemplary design, the gain transistor(s) include a plurality of gain transistors for the plurality of band groups. One gain transistor and one cascode transistor are enabled to amplify the input RF signal and provide the output RF signal for the selected band group. The gain transistors may be coupled to different taps of a single source degeneration inductor or to different source degeneration inductors. | 05-15-2014 |
20140155014 | RECEIVER IIP2 ANALOG CALIBRATION - Techniques for performing analog calibration of a receiver to optimize a second-order input intercept point (IIP2). In an aspect, a signal generator modeling an interferer is coupled to an adjustable input of a receiver, e.g., a gate bias voltage of a mixer. For example, the signal generator output may be a single-tone on-off keying (OOK) modulated signal. The mixer mixes the signal down to baseband, wherein an analog correlator correlates the down-converted signal with the known sequence of bits used to perform the OOK modulation. The analog correlation output is then provided to drive the bias voltage in the mixer, e.g., one or more gate voltages of transistors in the differential mixer, to optimize the overall receiver IIP2. Further aspects of the disclosure provide for calibrating receivers having multiple LNA's, and also dual or diversity receivers having multiple receive paths. | 06-05-2014 |
20140162580 | RECONFIGURABLE RECEIVER CIRCUITS FOR TEST SIGNAL GENERATION - Receiver circuits that can be reconfigured to generate test signals in a wireless device are disclosed. In an exemplary design, an apparatus includes a mixer and an amplifier. The mixer downconverts an input radio frequency (RF) signal based on a local oscillator (LO) signal in a first mode. The amplifier, which is formed by at least a portion of the mixer, amplifies the LO signal and provides an amplified LO signal in a second mode. In another exemplary design, an apparatus includes an amplifier and an attenuator. The amplifier receives and amplifies an input RF signal in a first mode. The attenuator, which is formed by at least a portion of the amplifier, receives and passes an LO signal in a second mode. | 06-12-2014 |
20140218124 | APPARATUS AND METHOD FOR GENERATING AN OSCILLATING OUTPUT SIGNAL - An apparatus for generating an oscillating output signal includes an inductive-capacitive (LC) circuit and a current tuning circuit. The LC circuit includes a primary inductor and a varactor coupled to the primary inductor. A capacitance of the varactor is responsive to a voltage at a control input of the varactor. The current tuning circuit includes a secondary inductor and a current driving circuit coupled to the secondary inductor. The current driving circuit is responsive to a current at a control input of the current driving circuit. An effective inductance of the primary inductor is adjustable via magnetic coupling to the secondary inductor, and a frequency of the oscillating output signal is responsive to the effective inductance of the primary inductor and to the capacitance of the varactor. | 08-07-2014 |
20140273901 | REDUCING POWER CONSUMPTION ON A RECEIVER - A method for reducing power consumption on a wireless communication device is described. The wireless communication device includes a first stage active filter and a second stage active filter. A condition measurement is obtained that includes a signal measurement condition. If it is determined that the condition measurement is above a threshold, the second stage active filter is bypassed. | 09-18-2014 |
20140295783 | RECONFIGURABLE RECEIVER CIRCUITS FOR TEST SIGNAL GENERATION - Receiver circuits that can be reconfigured to generate test signals in a wireless device are disclosed. In an exemplary design, an apparatus includes a mixer and an amplifier. The mixer downconverts an input radio frequency (RF) signal based on a local oscillator (LO) signal in a first mode. The amplifier, which is formed by at least a portion of the mixer, amplifies the LO signal and provides an amplified LO signal in a second mode. In another exemplary design, an apparatus includes an amplifier and an attenuator. The amplifier receives and amplifies an input RF signal in a first mode. The attenuator, which is formed by at least a portion of the amplifier, receives and passes an LO signal in a second mode. | 10-02-2014 |
20140370882 | METHOD AND APPARATUS FOR CONCURRENT COMMUNICATION WITH MULTIPLE WIRELESS COMMUNICATION SYSTEMS OF DIFFERENT RADIO ACCESS TECHNOLOGIES - A wireless device supporting concurrent communication with multiple wireless systems of different radio access technologies (RATs) are disclosed. In an exemplary design, an apparatus includes first and second receivers supporting concurrent signal reception from wireless systems of different RATs. The first receiver receives a first downlink signal from a first wireless system of a first RAT. The second receiver receives a second downlink signal from a second wireless system of a second RAT, which is different from the first RAT. The first and second receivers may operate concurrently. The second receiver may be broadband and/or may support carrier aggregation. The apparatus may further include first and second local oscillator (LO) generators to generate LO signals for the first and second receivers, respectively, based on different divider ratios in order to mitigate voltage controlled oscillator (VCO) pulling. | 12-18-2014 |