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| 20090065776 | Print Processing for Patterned Conductor, Semiconductor and Dielectric Materials - Embodiments relate to printing features from an ink containing a material precursor. In some embodiments, the material includes an electrically active material, such as a semiconductor, a metal, or a combination thereof. In another embodiment, the material includes a dielectric. The embodiments provide improved printing process conditions that allow for more precise control of the shape, profile and dimensions of a printed line or other feature. The composition(s) and/or method(s) improve control of pinning by increasing the viscosity and mass loading of components in the ink. An exemplary method thus includes printing an ink comprising a material precursor and a solvent in a pattern on the substrate; precipitating the precursor in the pattern to form a pinning line; substantially evaporating the solvent to form a feature of the material precursor defined by the pinning line; and converting the material precursor to the patterned material. | 03-12-2009 |
| 20090085095 | Profile Engineered Thin Film Devices and Structures - The present invention relates to electrically active devices (e.g., capacitors, transistors, diodes, floating gate memory cells, etc.) having dielectric, conductor, and/or semiconductor layers with smooth and/or dome-shaped profiles and methods of forming such devices by depositing or printing (e.g., inkjet printing) an ink composition that includes a semiconductor, metal, or dielectric precursor. The smooth and/or dome-shaped cross-sectional profile allows for smooth topological transitions without sharp steps, preventing feature discontinuities during deposition and allowing for more complete step coverage of subsequently deposited structures. The inventive profile allows for both the uniform growth of oxide layers by thermal oxidation, and substantially uniform etching rates of the structures. Such oxide layers may have a uniform thickness and provide substantially complete coverage of the underlying electrically active feature. Uniform etching allows for an efficient method of reducing a critical dimension of an electrically active structure by simple isotropic etch. | 04-02-2009 |
| 20100123582 | Surveillance Devices with Multiple Capacitors - The present invention relates to surveillance and/or identification devices having capacitors connected in parallel or in series, and methods of making and using such devices. Devices with capacitors connected in parallel, where one capacitor is fabricated with a relatively thick capacitor dielectric and another is fabricated with a relatively thin capacitor dielectric achieve both a high-precision capacitance and a low breakdown voltage for relatively easy surveillance tag deactivation. Devices with capacitors connected in series result in increased lateral dimensions of a small capacitor. This makes the capacitor easier to fabricate using techniques that may have relatively limited resolution capabilities. | 05-20-2010 |
| 20130189823 | Profile Engineered Thin Film Devices and Structures - The present invention relates to electrically active devices (e.g., capacitors, transistors, diodes, floating gate memory cells, etc.) having dielectric, conductor, and/or semiconductor layers with smooth and/or dome-shaped profiles and methods of forming such devices by depositing or printing (e.g., inkjet printing) an ink composition that includes a semiconductor, metal, or dielectric precursor. The smooth and/or dome-shaped cross-sectional profile allows for smooth topological transitions without sharp steps, preventing feature discontinuities during deposition and allowing for more complete step coverage of subsequently deposited structures. The inventive profile allows for both the uniform growth of oxide layers by thermal oxidation, and substantially uniform etching rates of the structures. Such oxide layers may have a uniform thickness and provide substantially complete coverage of the underlying electrically active feature. Uniform etching allows for an efficient method of reducing a critical dimension of an electrically active structure by simple isotropic etch. | 07-25-2013 |
| 20130344301 | PRINT PROCESSING FOR PATTERNED CONDUCTOR, SEMICONDUCTOR AND DIELECTRIC MATERIALS - Embodiments relate to printing features from an ink containing a material precursor. In some embodiments, the material includes an electrically active material, such as a semiconductor, a metal, or a combination thereof. In another embodiment, the material includes a dielectric. The embodiments provide improved printing process conditions that allow for more precise control of the shape, profile and dimensions of a printed line or other feature. The composition(s) and/or method(s) improve control of pinning by increasing the viscosity and mass loading of components in the ink. An exemplary method thus includes printing an ink comprising a material precursor and a solvent in a pattern on the substrate; precipitating the precursor in the pattern to form a pinning line; substantially evaporating the solvent to form a feature of the material precursor defined by the pinning line; and converting the material precursor to the patterned material. | 12-26-2013 |
| 20140091909 | Surveillance Devices with Multiple Capacitors - The present invention relates to surveillance and/or identification devices having capacitors connected in parallel or in series, and methods of making and using such devices. Devices with capacitors connected in parallel, where one capacitor is fabricated with a relatively thick capacitor dielectric and another is fabricated with a relatively thin capacitor dielectric achieve both a high-precision capacitance and a low breakdown voltage for relatively easy surveillance tag deactivation. Devices with capacitors connected in series result in increased lateral dimensions of a small capacitor. This makes the capacitor easier to fabricate using techniques that may have relatively limited resolution capabilities. | 04-03-2014 |
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| 20130081677 | DOPANT INK COMPOSITION AND METHOD OF FABRICATING A SOLAR CELL THERE FROM - Dopant ink compositions and methods of fabricating solar cells there from are described. A dopant ink composition may include a cross-linkable matrix precursor, a bound dopant species, and a solvent. A method of fabricating a solar cell may include delivering a dopant ink composition to a region above a substrate. The dopant ink composition includes a cross-linkable matrix precursor, a bound dopant species, and a solvent. The method also includes baking the dopant ink composition to remove a substantial portion of the solvent of the dopant ink composition, curing the baked dopant ink composition to cross-link a substantial portion of the cross-linkable matrix precursor of the dopant ink composition, and driving dopants from the cured dopant ink composition toward the substrate. | 04-04-2013 |
| 20140352781 | LASER CONTACT PROCESSES, LASER SYSTEM, AND SOLAR CELL STRUCTURES FOR FABRICATING SOLAR CELLS WITH SILICON NANOPARTICLES - A laser contact process is employed to form contact holes to emitters of a solar cell. Doped silicon nanoparticles are formed over a substrate of the solar cell. The surface of individual or clusters of silicon nanoparticles is coated with a nanoparticle passivation film. Contact holes to emitters of the solar cell are formed by impinging a laser beam on the passivated silicon nanoparticles. For example, the laser contact process may be a laser ablation process. In that case, the emitters may be formed by diffusing dopants from the silicon nanoparticles prior to forming the contact holes to the emitters. As another example, the laser contact process may be a laser melting process whereby portions of the silicon nanoparticles are melted to form the emitters and contact holes to the emitters. | 12-04-2014 |
| 20150030217 | SIGNAL STRENGTH ENHANCEMENT IN A BIOMETRIC SENSOR ARRAY - A biometric imager may comprise a plurality of sensor element traces formed in or on a sensor substrate which may comprise at least a portion of a display screen defining a biometric sensing area and forming in-active pixel locations; an auxiliary active circuit formed in or on the sensor substrate on the periphery of the biometric sensing area and in direct or indirect electrical contact with the sensor element traces; and providing a signal processing interface to a remotely located controller integrated circuit. The sensor element traces may form a portion of one dimensional linear sensor array or pixel locations in a two dimensional grid array capacitive gap biometric imaging sensor. The auxiliary circuit may provide pixel location selection or pixel signal amplification. The auxiliary circuit may be mounted on a surface of the display screen. The auxiliary circuit further comprising a separate pixel location selection controller circuit. | 01-29-2015 |
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| 20130081680 | SOLAR CELL WITH DOPED GROOVE REGIONS SEPARATED BY RIDGES - Solar cells with doped groove regions separated by ridges and methods of fabricating solar cells are described. In an example, a solar cell includes a substrate having a surface with a plurality of grooves and ridges. A first doped region of a first conductivity type is disposed in a first of the grooves. A second doped region of a second conductivity type, opposite the first conductivity type, is disposed in a second of the grooves. The first and second grooves are separated by one of the ridges. | 04-04-2013 |
| 20130081687 | METHOD FOR FORMING DIFFUSION REGIONS IN A SILICON SUBSTRATE - A method of manufacturing solar cells is disclosed. The method comprises depositing an etch-resistant dopant material on a silicon substrate, the etch-resistant dopant material comprising a dopant source, forming a cross-linked matrix in the etch-resistant dopant material using a non-thermal cure of the etch-resistant dopant material, and heating the silicon substrate and the etch-resistant dopant material to a temperature sufficient to cause the dopant source to diffuse into the silicon substrate. | 04-04-2013 |
| 20140048133 | METHOD FOR FORMING DIFFUSION REGIONS IN A SILICON SUBSTRATE - A method of manufacturing solar cells is disclosed. The method comprises depositing an etch-resistant dopant material on a silicon substrate, the etch-resistant dopant material comprising a dopant source, forming a cross-linked matrix in the etch-resistant dopant material using a non-thermal cure of the etch-resistant dopant material, and heating the silicon substrate and the etch-resistant dopant material to a temperature sufficient to cause the dopant source to diffuse into the silicon substrate. | 02-20-2014 |
| 20140166093 | SOLAR CELL EMITTER REGION FABRICATION USING N-TYPE DOPED SILICON NANO-PARTICLES - Methods of fabricating solar cell emitter regions using N-type doped silicon nano-particles and the resulting solar cells are described. In an example, a method of fabricating an emitter region of a solar cell includes forming a plurality of regions of N-type doped silicon nano-particles on a first surface of a substrate of the solar cell. A P-type dopant-containing layer is formed on the plurality of regions of N-type doped silicon nano-particles and on the first surface of the substrate between the regions of N-type doped silicon nano-particles. At least a portion of the P-type dopant-containing layer is mixed with at least a portion of each of the plurality of regions of N-type doped silicon nano-particles. | 06-19-2014 |
| 20140170800 | SOLAR CELL EMITTER REGION FABRICATION USING SILICON NANO-PARTICLES - Methods of fabricating solar cell emitter regions using silicon nano-particles and the resulting solar cells are described. In an example, a method of fabricating an emitter region of a solar cell includes forming a region of doped silicon nano-particles above a dielectric layer disposed above a surface of a substrate of the solar cell. A layer of silicon is formed on the region of doped silicon nano-particles. At least a portion of the layer of silicon is mixed with at least a portion of the region of doped silicon nano-particles to form a doped polycrystalline silicon layer disposed on the dielectric layer. | 06-19-2014 |
| 20140273331 | METHODS FOR WET CHEMISTRY POLISHING FOR IMPROVED LOW VISCOSITY PRINTING IN SOLAR CELL FABRICATION - A method of fabricating a solar cell is disclosed. The method includes forming a polished surface on a silicon substrate and forming a first flowable matrix in an interdigitated pattern on the polished surface, where the polished surface allows the first flowable matrix to form an interdigitated pattern comprising features of uniform thickness and width. In an embodiment, the method includes forming the silicon substrate using a method such as, but not limited to, of diamond wire or slurry wafering processes. In another embodiment, the method includes forming the polished surface on the silicon substrate using a chemical etchant such as, but not limited to, sulfuric acid (H | 09-18-2014 |
| 20140295609 | SOLAR CELL EMITTER REGION FABRICATION USING SILICON NANO-PARTICLES - Methods of fabricating solar cell emitter regions using silicon nano-particles and the resulting solar cells are described. In an example, a method of fabricating an emitter region of a solar cell includes forming a region of doped silicon nano-particles above a dielectric layer disposed above a surface of a substrate of the solar cell. A layer of silicon is formed on the region of doped silicon nano-particles. At least a portion of the layer of silicon is mixed with at least a portion of the region of doped silicon nano-particles to form a doped polycrystalline silicon layer disposed on the dielectric layer. | 10-02-2014 |
