Patent application number | Description | Published |
20110068316 | NONVOLATILE MEMORY ELEMENT AND NONVOLATILE MEMORY DEVICE - According to one embodiment, a nonvolatile memory device includes a plurality of nonvolatile memory elements each of that includes a resistance change film. The resistance change film is capable of recording information by transitioning between a plurality of states having different resistances in response to at least one of a voltage applied to the resistance change film or a current passed through the resistance change film, and the resistance change film includes an oxide containing at least one element selected from the group consisting of Hf, Zr, Ni, Ta, W, Co, Al, Fe, Mn, Cr, and Nb. An impurity element contained in the resistance change film is at least one element selected from the group consisting of Mg, Ca, Sr, Ba, Sc, Y, La, V, Ta, B, Ga, In, Tl, C, Si, Ge, Sn, Pb, N, P, As, Sb, Bi, S, Se, and Te, and the impurity element has an absolute value of standard Gibbs energy of oxide formation larger than an absolute value of standard Gibbs energy of oxide formation of the element contained in the oxide. | 03-24-2011 |
20110286260 | NONVOLATILE MEMORY DEVICE AND METHOD FOR DRIVING SAME - According to one embodiment, a nonvolatile memory device includes a memory unit and a control unit. The memory unit includes first and second interconnects, and a memory cell. The second interconnect is non-parallel to the first interconnect. The memory cell includes a resistance change layer provided at an intersection between the first and second interconnects. The control unit is connected to the first and second interconnects to supply voltage and current to the resistance change layer. The control unit increases an upper limit of a current supplied to the first interconnect based on a change of a potential of the first interconnect when applying a set operation voltage to the first interconnect in a set operation of changing the resistance change layer from a first state with a first resistance value to a second state with a second resistance value being less than the first resistance value. | 11-24-2011 |
20120235221 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME - According to one embodiment, a semiconductor device includes a substrate, a first stacked body, a memory film, a first channel body, a second stacked body, a gate insulating film and a second channel body. A step part is formed between a side face of the select gate and the second insulating layer. A film thickness of a portion covering the step part of the second channel body is thicker than a film thickness of a portion provided between the second insulating layers of the second channel body. | 09-20-2012 |
20130056815 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME - According to one embodiment, a nonvolatile semiconductor memory device includes: a first stacked body; a memory film; a first channel body layer provided inside the memory film; an interlayer insulating flm provided on the first stacked body; a second stacked body having a select gate electrode layer, and a second insulating layer; a gate insulating film provided on a side wall of a second hole communicating with the first hole and penetrating the second stacked body and the interlayer insulating flm in a stacking direction of the second stacked body; and a second channel body layer provided inside the gate insulating film in the second hole. A first pore diameter of the second hole at an upper end of the select gate electrode layer is smaller than a second pore diameter of the second hole at an lower end of the select gate electrode layer. | 03-07-2013 |
20130069139 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME - According to one embodiment, a nonvolatile semiconductor memory device includes a substrate, an electrode layer provided above the substrate, a first insulating layer provided on the electrode layer, a stacked body provided on the insulating layer, a memory film, a channel body layer, a channel body connecting portion and a second insulating layer. The stacked body has a plurality of conductive layers and a plurality of insulating film alternately stacked on each other. The memory film is provided on a sidewall of each of a pair of holes penetrating the stacked body in a direction of stacking the stacked body. The channel body layer is provided on an inner side of the memory film in each of the pair of the holes. | 03-21-2013 |
20130075805 | METHOD FOR MANUFACTURING NONVOLATILE SEMICONDUCTOR STORAGE DEVICE AND NONVOLATILE SEMICONDUCTOR STORAGE DEVICE - According to one embodiment, a method for manufacturing a nonvolatile semiconductor storage device includes; forming a first and a second stacked bodies; forming a through hole penetrating through the first stacked body, a second portion communicating with the first portion and penetrating through a select gate, and a third portion communicating with the second portion and penetrating through a second insulating layer; forming a memory film, a gate insulating film, and a channel body; forming a third insulating layer inside the channel body; forming a first embedded portion above a boundary portion inside the third portion; exposing the channel body by removing part of the first embedded portion and part of the third insulating layer in the third portion; and embedding a second embedded portion including silicon having higher impurity concentration than the first embedded portion above the first embedded portion inside the third portion. | 03-28-2013 |
20130228852 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE - According to one embodiment, a method for manufacturing a semiconductor device includes forming a plurality of insulating isolation sections provided so as to extend in a first direction, isolate the stacked body in a second direction, and have a projection projecting from the stacked body. Each insulating isolation section has a side wall including recessed sections and projected sections repeated along the first direction. The method includes forming a sidewall film on a side wall of the projection of the insulating isolation section, and forming a plurality of first holes surrounded by the sidewall film and isolated by the sidewall film in the first direction, between the plurality of insulating isolation sections. The method includes forming a second hole in the stacked body provided under the first hole by etching with the insulating isolation section and the sidewall film used as a mask. | 09-05-2013 |
20140001544 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE | 01-02-2014 |
20140038396 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME - According to one embodiment, a semiconductor device includes a substrate, a first stacked body, a memory film, a first channel body, a second stacked body, a gate insulating film and a second channel body. A step part is formed between a side face of the select gate and the second insulating layer. A film thickness of a portion covering the step part of the second channel body is thicker than a film thickness of a portion provided between the second insulating layers of the second channel body. | 02-06-2014 |
20140284685 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME - According to one embodiment, a nonvolatile semiconductor memory device includes: a stacked body including each of a plurality of electrode layers and each of a plurality of insulating layers stacked alternately; a first interlayer insulating film; a select gate electrode; a second interlayer insulating film; a pair of semiconductor layers; a first insulating film; a second insulating film; a third interlayer insulating film; a first contact electrode connected to one upper end of the pair of semiconductor layers; a second contact electrode connected to the other upper end of the pair of semiconductor layers; a third contact electrode connected to the second contact electrode; a first interconnect layer connected to the first contact electrode; and a second interconnect layer connected to the third contact electrode. | 09-25-2014 |
20140284693 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME - According one embodiment, a nonvolatile semiconductor memory device, includes: a stacked body, and each of a plurality of electrode layers and each of a plurality of insulating layers being stacked alternately in the a stacked body; a first interlayer insulating film on the stacked body; a gate electrode on the first interlayer insulating film; a second interlayer insulating film on the gate electrode; a semiconductor layer extended from an upper end of the second interlayer insulating film to a lower end of the stacked body; a first insulating film between the semiconductor layer and each of the plurality of electrode layers; and a second insulating film between the semiconductor layer and the gate electrode, a thickness of the semiconductor layer provided above an upper end of the gate electrode being thicker than a thickness of the semiconductor layer provided below the upper end of the gate electrode. | 09-25-2014 |
20140284694 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME - According to one embodiment, a nonvolatile semiconductor memory device includes: a stacked body, each of a plurality of electrode layers and each of a plurality of insulating layers being stacked alternately in the stacked body; an interlayer insulating film provided on the stacked body; a gate electrode provided on the interlayer insulating film; a semiconductor layer extending from an upper end of the gate electrode to a lower face of the stacked body; a first insulating film provided between the semiconductor layer and each of the plurality of electrode layers and including at least one layer of a nitride film; and a second insulating film provided between the gate electrode and the semiconductor layer and including at least one layer of a nitride film, a film thickness of at least a part of the second insulating film being thinner than a film thickness of the first insulating film. | 09-25-2014 |
20150249094 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE - According to one embodiment, a method is disclosed for manufacturing a semiconductor device. The second insulating film seals the hole near an interface of the insulating layer and the select gate. The second insulating film is provided on a side wall of the channel body with a space left in the hole above the select gate. The method can include burying a semiconductor film in the space, in addition, forming a conductive film in contact with the channel body. | 09-03-2015 |
Patent application number | Description | Published |
20110031463 | RESISTANCE-CHANGE MEMORY - According to one embodiment, a resistance-change memory includes a variable resistance element having a laminated structure in which a first electrode, a resistance-change film and a second electrode are laminated, and set to a low-resistance state and a high-resistance state according to stored data, an insulating film provided on a side surface of the variable resistance element, and a fixed resistance element provided on a side surface of the insulating film, and includes a conductive film, the fixed resistance element being connected in parallel with the variable resistance element. | 02-10-2011 |
20110031467 | INFORMATION RECORDING AND REPRODUCING APPARATUS - An information recording and reproducing apparatus according to an embodiment has a memory cell including a recording layer operative to change in a reversible manner between a first state having a certain resistance value upon application of a voltage pulse and a second state having a resistance value higher than that of the first state. The recording layer includes a first compound layer represented by a composition formula of A | 02-10-2011 |
20110037046 | RESISTANCE-CHANGE MEMORY AND METHOD OF MANUFACTURING THE SAME - According to one embodiment, a resistance-change memory includes a laminated structure in which a lower electrode, an insulating film and an upper electrode are stacked, and a resistance-change film provided on a side surface of the laminated structure, and configured to store data in accordance with an electric resistance change. | 02-17-2011 |
20120069627 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - A nonvolatile semiconductor memory device includes: a memory cell array including plural first lines, plural second lines, and plural memory cells each including a variable resistance element; a first decoder connected to at least one ends of the plurality of first lines and configured to select at least one of the first lines; at least one pair of second decoders connected to both ends of the plurality of second lines and configured such that one of the pair of second decoders is selected for selecting the second lines according to a distance between the one of the first lines selected by the first decoder and the both ends of the second lines; and a voltage application circuit configured to apply a certain voltage between the first line and the second line selected by the first decoder and the second decoder. | 03-22-2012 |
20120217461 | SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor memory device according to an embodiment includes: first lines provided on a substrate; second lines provided between the first lines and the substrate so as to intersect the first lines; and a first memory cell array including first memory cells, each of the first memory cells being provided at respective intersections of the first lines and the second lines and including a current rectifying element and a variable resistor connected in series. The variable resistor of the first memory cell includes a first recording layer and a second recording layer, the first recording layer being made of an oxide of a first metal material, the second recording layer being made of the first metal material and being formed so as to contact with the first recording layer. The second recording layer is closer to the first line than the first recording layer is. | 08-30-2012 |
Patent application number | Description | Published |
20090068452 | BASE MEMBER WITH BONDING FILM, BONDING METHOD AND BONDED BODY - A base member with a bonding film that can be firmly bonded to an object with high dimensional accuracy and efficiently bonded to the object at a low temperature, a bonding method which is capable of efficiently bonding such a base member and the object at a low temperature, and a bonded body formed by firmly bonding the base member and the object with high dimensional accuracy and therefore being capable of providing high reliability are provided. The base member is adapted to be bonded to an object through the bonding film thereof. The base member includes a substrate, and a bonding film provided on the substrate, the bonding film containing metal atoms and leaving groups each composed of an organic ingredient, and having a surface, wherein when energy is applied to at least a predetermined region of the surface of the bonding film, the leaving groups, which exist in the vicinity of the surface within the region, are removed from the bonding film so that the region develops a bonding property with respect to the object. | 03-12-2009 |
20100183885 | BONDING METHOD OF SILICON BASE MEMBERS, DROPLET EJECTION HEAD, DROPLET EJECTION APPARATUS, AND ELECTRONIC DEVICE - A bonding method of silicon base members is provided. The bonding method of silicon base members comprises: applying an energy to a first silicon base member including Si—H bonds to selectively cut the Si—H bonds so that the first silicon base member is cleaved and divided to one silicon base member and the other silicon base member, and the one silicon base member having a cleavage surface and dangling bonds of silicon obtained by cutting the Si—H bonds; and bonding the cleavage surface of the one silicon base member and a surface of a second silicon base member on which dangling bonds of silicon are exposed to thereby bond the cleavage surface and the surface together through their dangling bonds. | 07-22-2010 |
20100201735 | BONDING METHOD OF SILICON BASE MEMBERS, DROPLET EJECTION HEAD, DROPLET EJECTION APPARATUS, AND ELECTRONIC DEVICE - A bonding method of silicon base members is provided. The bonding method of silicon base members comprises: applying an energy to a surface of a first silicon base member having Si—H bonds on the surface to selectively cut the Si—H bonds so that dangling bonds of the silicon (Si) is exposed on the surface of the first silicon base member; and bonding the surface of the first silicon base member, on which the dangling bonds of the silicon has been exposed, and a surface of a second silicon base member on which dangling bonds of silicon are exposed so that the surface of the first silicon base member and the surface of the second silicon base member are bonded together through their dangling bonds. | 08-12-2010 |
Patent application number | Description | Published |
20080219054 | SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING OF THE SAME - A semiconductor memory device includes a plurality of active areas each extending in a first direction and including a memory cell string which includes select transistors and memory cells, current paths of which are connected in series, a first extension portion which is provided between one-side terminal end portions of two active areas neighboring in a second direction that crosses the first direction, and a second extension portion which is provided between other-side terminal end portions of the two active areas neighboring in the second direction, the first and second extension portions connecting the two active areas in a loop configuration. | 09-11-2008 |
20080315296 | NON-VOLATILE SEMICONDUCTOR STORAGE DEVICE AND METHOD OF MANUFACTURING THE SAME - A non-volatile semiconductor storage device | 12-25-2008 |
20100052042 | SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF - The semiconductor memory device of the present invention includes a plurality of memory strings having a plurality of electrically reprogrammable memory cells connected in series, the memory strings having a column shaped semiconductor, a first insulation film formed around the column shaped semiconductor, a charge accumulation layer formed around the first insulation film, a second insulation film formed around the charge accumulation film and a plurality of electrodes formed around the second insulation film, a bit line connected to one end of the memory strings via a plurality of selection transistors, and a conducting layer extending in two dimensions and in which the plurality of electrodes of the memory strings and the plurality of electrodes of different memory strings are shared respectively, wherein each end part of the conducting layer is formed in step shapes in a direction parallel with the bit line. | 03-04-2010 |
20110284947 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF - A nonvolatile semiconductor memory device that have a new structure are provided, in which memory cells are laminated in a three dimensional state so that the chip area may be reduced. The nonvolatile semiconductor memory device of the present invention is a nonvolatile semiconductor memory device that has a plurality of the memory strings, in which a plurality of electrically programmable memory cells is connected in series. The memory strings comprise a pillar shaped semiconductor; a first insulation film formed around the pillar shaped semiconductor; a charge storage layer formed around the first insulation film; the second insulation film formed around the charge storage layer; and first or nth electrodes formed around the second insulation film (n is natural number more than 1). The first or nth electrodes of the memory strings and the other first or nth electrodes of the memory strings are respectively the first or nth conductor layers that are spread in a two dimensional state. | 11-24-2011 |
20110287597 | Nonvolatile semicondutor memory device and manufacturing method thereof - A nonvolatile semiconductor memory device that have a new structure are provided, in which memory cells are laminated in a three dimensional state so that the chip area may be reduced. The nonvolatile semiconductor memory device of the present invention is a nonvolatile semiconductor memory device that has a plurality of the memory strings, in which a plurality of electrically programmable memory cells is connected in series. The memory strings comprise a pillar shaped semiconductor; a first insulation film formed around the pillar shaped semiconductor; a charge storage layer formed around the first insulation film; the second insulation film formed around the charge storage layer; and first or nth electrodes formed around the second insulation film (n is natural number more than 1). The first or nth electrodes of the memory strings and the other first or nth electrodes of the memory strings are respectively the first or nth conductor layers that are spread in a two dimensional state. | 11-24-2011 |
20140124850 | SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF - The semiconductor memory device of the present invention includes a plurality of memory strings having a plurality of electrically reprogrammable memory cells connected in series, the memory strings having a column shaped semiconductor, a first insulation film formed around the column shaped semiconductor, a charge accumulation layer formed around the first insulation film, a second insulation film formed around the charge accumulation film and a plurality of electrodes formed around the second insulation film, a bit line connected to one end of the memory strings via a plurality of selection transistors, and a conducting layer extending in two dimensions and in which the plurality of electrodes of the memory strings and the plurality of electrodes of different memory strings are shared respectively, wherein each end part of the conducting layer is formed in step shapes in a direction parallel with the bit line. | 05-08-2014 |
20150372006 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF - A nonvolatile semiconductor memory device that have a new structure are provided, in which memory cells are laminated in a three dimensional state so that the chip area may be reduced. The nonvolatile semiconductor memory device of the present invention is a nonvolatile semiconductor memory device that has a plurality of the memory strings, in which a plurality of electrically programmable memory cells is connected in series. The memory strings comprise a pillar shaped semiconductor; a first insulation film formed around the pillar shaped semiconductor; a charge storage layer formed around the first insulation film; the second insulation film formed around the charge storage layer; and first or nth electrodes formed around the second insulation film (n is natural number more than 1). The first or nth electrodes of the memory strings and the other first or nth electrodes of the memory strings are respectively the first or nth conductor layers that are spread in a two dimensional state. | 12-24-2015 |
20160048530 | INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, AND NON-TRANSITORY COMPUTER READABLE MEDIUM - An information processing apparatus includes a first display controller, an accepting unit, a grouping unit, and a memory controller. The first display controller controls a display to display plural images representing respective files. The accepting unit accepts an operation for selecting at least two or more images from among the plural images. The grouping unit forms a group by associating plural files represented by the at least two or more images with one another with the at least two or more images kept displayed on the display in a case where the accepting unit has accepted the operation. The memory controller controls a memory to store information indicating display positions of the at least two or more images on a screen in association with the group that has been formed by the grouping unit. | 02-18-2016 |
Patent application number | Description | Published |
20130121688 | OPTICAL TRANSMITTER AND OPTICAL TRANSMISSION METHOD - An optical transmitter includes a plurality of VCSELs (vertical cavity surface emitting laser) that convert an electrical signal into an optical signal and transmit the converted optical signal. The optical transmitter measures a time for each of the VCSELs of transmitting an optical signal. Then, the optical transmitter assigns an electrical signal, indicating information to be transmitted, to one or more VCSELs, out of the VCSELs, other than a VCSEL of which a cumulative time measured is more than a predetermined threshold. | 05-16-2013 |
20130259053 | SWITCH, INFORMATION PROCESSING APPARATUS, AND COMMUNICATION CONTROL METHOD - A PCIe switch stores therein a first identifier used by a CPU to identify a device, a second identifier that is a common identifier to identify the device in a network formed among a plurality of switches that connect the CPU to the device, and a destination of an access request to the device in an associated manner. When having received an access request from the CPU, the PCIe switch identifies a second identifier and a destination that are associated with a first identifier included in the access request. After that, the PCIe switch adds the identified second identifier to the access request, and transmits the access request with the second identifier added to the identified destination. | 10-03-2013 |
20140215264 | INFORMATION PROCESSING APPARATUS AND CONTROL METHOD FOR INFORMATION PROCESSING APPARATUS - An information processing apparatus includes a switch unit configured to connect some of the arithmetic processing devices and some of the storage devices in accordance with connection information, a first control unit being configured to output physical information converted from the logical information of the arithmetic processing device at the transmission destination and the physical information of the corresponding arithmetic processing device via a transfer path in accordance with the correlation information, a second control unit configured to change the connection information in response to occurrence of a failure of some arithmetic processing device in the system, and to control the switch unit such that the failed arithmetic processing device is replaced with another one included in the plural arithmetic processing devices. | 07-31-2014 |
20150106658 | INFORMATION PROCESSING APPARATUS AND FAILURE DETECTION METHOD OF INFORMATION PROCESSING APPARATUS - An information processing apparatus includes a storage device, an arithmetic processing unit, a first converting device, and a second converting device. The storage device outputs data in accordance with a memory access request. The arithmetic processing unit performs an arithmetic operation on the data. The first converting device converts a memory access request issued by the arithmetic processing unit to a memory access signal and sends to the storage device. The second converting device converts a memory access request issued by the arithmetic processing unit to a memory access signal, acquires the memory access signal sent by the first converting device, and compares the content of a memory access performed by using the converted memory access signal with the content of a memory access performed by using the acquired memory access signal, and determines whether the first converting device has failed. | 04-16-2015 |