Patent application number | Description | Published |
20100000815 | Control Method of Electromotor - A control method of the electromotor comprises: setting a target alternating axis current based on the rotor angular velocity of the electromotor and a target direct axis current based on the torque of the motor; simultaneously detecting three-phase currents and current rotor position angle of the electromotor; converting the three-phase currents to an actual alternating axis current and an actual direct axis current by Park and Clark conversions; inputting the difference between the target current and the actual current to a current loop, outputting the required direct axis current and the required alternating axis current; determining the three phase voltages according to the required direct axis current and alternating axis current and the angle of the electromotor rotor position; obtaining PWM control waveform through three-phase voltages, wherein said PWM control waveform is configured to control the conversion from direct current to alternating current and drives the electromotor. | 01-07-2010 |
20110158332 | Distributed Base Station System and Method for Networking thereof and Base Band Unit - The present invention discloses a distributed base station system as well as its networking method and base band unit. In this system, the base band unit (BBU) and RF unit (RFU) of the base station are separated, and the RFU is equipped with base band RF interfaces for interconnecting the BBU and transmitting data information, thereby forming the base station. Based on the separation of the BBU from the RFU, the BBU capacity is further divided at the same time, and every unit is also arranged independently. The BBU networking and capacity expansion may be achieved with capacity expansion interfaces and base band RF interfaces provided by BBU interface units in flexible and convenient ways. | 06-30-2011 |
20140106805 | MULTI-MODE BASE STATION AND OPERATING METHOD AND WIRELESS COMMUNICATION SYSTEM THEREOF - A multi-mode base station and an operating method and a wireless communication system thereof are provided. The multi-mode base station includes: at least two protocol processing modules, vested in at least two modes respectively, and adapted to process data and/or signaling of the mode according to the protocol corresponding to the mode; and an interface processing module, adapted to distinguish the mode of the data and/or the signaling while receiving the data and/or the signaling, and distribute the data and/or the signaling to the protocol processing module corresponding to the mode. Thus, the reconfiguration of the multi-mode base station can be performed more conveniently and quickly. | 04-17-2014 |
20140215273 | VOLTAGE TESTING DEVICE AND METHOD FOR CPU - The disclosure provides a voltage testing device and a method. A voltage testing device includes a PCB, a digital switch, and a detecting chip. The PCB includes a CPU socket, a signal producing chip, and a voltage regulator connected to the CPU socket. The digital switch sets predetermined data. The detecting chip is inserted in the CPU socket. The detecting chip includes a reading module, a converting module, a sending module, and a control module. The signal producing chip sends a start-up signal to the control module. The converting module coverts the predetermined data to SVID data. The sending module sends the SVID data to the voltage regulator. The voltage regulator sends a CPU voltage to the CPU socket. The voltage value testing device calculates a value of the CPU voltage to determined if the value of the CPU voltage associates with a voltage corresponding to the predetermined data. | 07-31-2014 |
20140266750 | APPARATUS AND METHOD FOR TESTING WORKING VOLTAGE OF CPU - An apparatus for testing working voltage of a central processing unit (CPU) includes a programmable logic device (PLD) having a dummy load, a voltage regulating controller, a CPU socket and a south bridge. The CPU socket is electrically connected to the voltage regulating controller via a series voltage identification (SVID) bus. The south bridge outputs a CPU voltage determining signal. The dummy load is electrically connected to the voltage regulating controller via the SVID bus. The PLD receives the CPU voltage determining signal, and outputs a voltage requesting signal via the SVID bus. The voltage regulating controller receives the voltage requesting signal, and outputs a CPU working voltage to the CPU socket accordingly. The PLD detects the CPU working voltage on the CPU socket, and determines whether the CPU working voltage meets requirements of specification. | 09-18-2014 |
20140317324 | INTERRUPT CONTROL SYSTEM AND METHOD - An interrupt control system includes a plurality of interrupt sources and a processor. Each interrupt source when activated includes a flag bit. The processor includes a parallel port with multiple pins and a decoding module. The different interrupt sources are connected to different pins of the parallel port. The parallel port thus receives different codes when different interrupt sources generate an interrupt. The decoding module decodes the code received by the parallel port to establish the interrupt source which has generated the interrupt. | 10-23-2014 |
20140317455 | LPC BUS DETECTING SYSTEM AND METHOD - A LPC bus detecting system includes a PLD for detecting a LPC bus of a server. The PLD includes a detecting module connected to the LPC bus and an Embedded Block RAM (EBR) connected to the detecting module. The detecting module is capable of decoding signals transferred by the LPC bus and storing decoded data to the EBR. The present disclosure further discloses a method for detecting the LPC bus. | 10-23-2014 |
20140334101 | FAN SPEED CONTROL SYSTEM - A fan speed control system includes a BMC, a CPLD, and a temperature sensor. The BMC includes an operation signal sending pin. The CPLD includes an operation signal receiving pin connected to the operation signal sending pin. The temperature sensor is configured for detecting temperatures of electronic components. When the BMC fails to operate normally, the operation signal sending pin sends a BMC_fail signal to the operation signal receiving pin, the temperature sensor sends the detected temperatures to the CPLD. The CPLD compares the detected temperatures with the corresponding preset standard temperatures and adjusts the speed of the fan module according to a comparing result. | 11-13-2014 |
20140351620 | POWER SUPPLY DETECTING SYSTEM AND DETECTING METHOD - A detecting system of a power supply includes a logic unit and a baseboard management controller. The logic unit is configured to receive a health state of a power supply. The baseboard management controller is electrically connected to the logic unit. The BMC is configured to detect the power input state of the power supply. After detecting the power input state of the power supply, the BMC is configured to transmit a signal to the logic unit, and the logic unit is configured to receive the health state of the power supply and send a feedback of the health state to the BMC after receiving the signal. | 11-27-2014 |
20150039926 | DELAY SYSTEM AND METHOD FOR SERVER - A system of delaying the shutdown of a server, the server including a data processing unit connected to an external power supply unit. The delay system includes a delay controlling unit, a first discharging unit, and a second discharging unit. The delay controlling unit is coupled to the data processing unit and thus the external power supply unit. On shutdown, the first discharging unit discharges to provide power for data processing unit, the second discharging unit is invoked to continue supplying power for a necessary period when the discharging voltage value of the first discharging unit is found to be less than a predetermined voltage value. | 02-05-2015 |
20150058482 | SYSTEM INSIGHT DISPLAY - A system insight display includes a complex programmable logic device (CPLD), a network connecting module, and a baseboard management controller (BMC). The CPLD monitors a plurality of states of a plurality of function components. The BMC connects the CPLD through a predefined bus. The BMC can receive information corresponding to the plurality of states from the CPLD and establish a user interface to indicate the plurality of states. The BMC can respond to a display request from a remote computer through the network connecting module to display information regarding the plurality of states to the user interface. | 02-26-2015 |