Patent application number | Description | Published |
20160062046 | CONNECTING DEVICE AND CONNECTING DEVICE FOR ROBOT MANIPULATOR - A connecting device configured to couple to a robot arm and a robot tool includes a first connecting part including a fixing member having at least one first magnetic part, at least one first optical fiber connector, and at least one first electrical connector which are coupled to the fixing member. A second connecting part which is removable and securely coupled to the first connecting part including a fixing member having at least one second magnetic part, at least one second optical fiber connector, and at least one first conduction connector which are coupled to the fixing member. The first magnetic part and the second magnetic part have opposite magnetic force. When the first magnetic part contacts the second magnetic part, the first optical fiber connector connect to the second optical fiber connector and the first electrical connector connects to the first conduction connector. | 03-03-2016 |
20160084671 | CALIBRATION DEVICE AND CALIBRATION METHOD - A calibration device to calibrate precise horizontality of a light emitting element includes a retaining rack, a microprocessor, a regulating member, two driven members, and two photo sensing members. The regulating member drives the light emitting element, the two driven members are on the retaining rack, and the microprocessor controls the driven members to move linearly. The photo sensing members detect light transmitted and data as to the vertical distance between two driven members, and vertical distance between the photo sensing member and the two driven members, is stored. The microprocessor calculates the moving distance of the photo sensing members carried by the driven members based on the signals of light detected, and further calculates declination of the light emitting element. The microprocessor can adjust the orientation of light emitting element. | 03-24-2016 |
Patent application number | Description | Published |
20130200380 | ORGANIC ELECTROLUMINESCENT DISPLAY DEVICE - An organic electroluminescent display device includes a bottom substrate, a covering substrate, a pixel controlling unit, a first organic light emitting unit, and a second organic light emitting unit. The covering substrate is disposed oppositely to the bottom substrate. The pixel controlling unit is disposed between the bottom substrate and the covering substrate. The first organic light emitting unit is disposed between the pixel controlling unit and the covering substrate. The second organic light emitting unit is disposed between the pixel controlling unit and the bottom substrate. The pixel controlling unit is electrically connected to the first organic light emitting unit and the second organic light emitting unit. | 08-08-2013 |
20130329157 | LIQUID CRYSTAL DISPLAY AND MANUFACTURING METHOD THEREOF - The present invention relates to a liquid crystal display and a manufacturing method thereof. The insulation layer of the liquid crystal display has: a first surface having a first opening; a second surface having a second opening; and a connecting structure having a via formed between the first and the second surfaces, wherein the via connects the first opening and the second opening, and the second opening is smaller than the first opening. The manufacturing method includes the steps of: providing a semiconductor layer having a surface with an area; forming a photoresist layer on the area; forming a protective layer on the semiconductor layer and the photoresist layer; and removing the photoresist layer through a lift-off process, so as to form a via penetrating the protective layer to expose the area of the semiconductor. | 12-12-2013 |
20140027760 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A semiconductor device and manufacturing method thereof are provided. The manufacturing method of the semiconductor device includes sequentially forming a gate electrode, a gate insulating layer, an oxide semiconductor layer and an etching stop layer on a substrate. The etching stop layer has two contact openings exposing a portion of the oxide semiconductor layer. A metal layer is formed on the etching stop layer, and connected with the oxide semiconductor layer via the contact openings. A half-tone patterned photoresist layer is formed on the metal layer, and is taken as an etching mask to remove the metal layer and the etching stop layer. A thickness of the half-tone patterned photoresist layer is reduced until a second portion of the half-tone patterned photoresist layer is removed, such that a patterned photoresist layer is formed as an etching mask for removing the metal layer and the oxide semiconductor layer. | 01-30-2014 |
20140048797 | SEMICONDUCTOR DEVICE - There is provided a semiconductor device including a first conductive layer, an insulating layer, a second conductive layer, a channel layer, a passivation layer and a third conductive layer. The insulating layer covers the first conductive layer. The second conductive layer is formed on the insulating layer and has an inner opening. The channel layer is formed on the inner opening of the second conductive layer to fully cover the inner opening. The passivation layer is formed upon the channel layer to cover the channel layer and has a contact hole inside the inner opening of the second conductive layer. The third conductive layer is formed in the contact hole. | 02-20-2014 |
20140103307 | VERTICAL THIN-FILM TRANSISTOR STRUCTURE OF DISPLAY PANEL AND METHOD OF FABRICATING THE SAME - A vertical thin-film transistor structure includes a substrate, a source electrode, an insulation layer, a drain electrode, two first channel layers, a gate insulation layer and a gate electrode, which are stacked upward in that order on the substrate. The first channel layers are respectively disposed at two opposite ends of the drain electrode, and extend from the upper surface of the drain electrode to the upper surface of the source electrode respectively. Each of the first channel layers contacts the source electrode and the drain electrode. The gate insulation layer is disposed on the source electrode, the first channel layers and the drain electrode. The gate electrode is disposed on the gate insulation layer and covers the first channel layers. Therefore, the volume of the conventional thin-film transistor structure shrinks, and the ratio of the volume of the conventional thin-film transistor structure to that of a pixel structure decreases. | 04-17-2014 |
20140145196 | PIXEL STRUCTURE - A pixel structure includes a substrate, a gate line, and a transistor. The gate line includes a gate electrode disposed on the substrate, and the gate electrode has at least, one closed opening. The transistor is disposed on the substrate and electrically connected to the gate line. The transistor includes the gate electrode, a dielectric layer, a channel layer, a source electrode, a drain electrode, and a pixel electrode. The dielectric layer is disposed on the gate electrode and the substrate. The channel layer is disposed on a portion of the dielectric layer. At least one portion of the channel layer overlaps at least one portion of the closed opening. The source electrode and the drain electrode are disposed on the channel layer and at opposite sides of the closed opening. The pixel electrode is electrically connected to the drain electrode. | 05-29-2014 |
20140183520 | OXIDE THIN FILM TRANSISTOR STRUCTURE AND METHOD THEREOF - An oxide thin film transistor structure includes a substrate, a drain electrode disposed on the substrate, and a first insulation layer disposed on the drain electrode and the substrate. The first insulation layer has a first opening to expose a part of the drain electrode. A gate electrode and a gate insulation layer are sequentially disposed on the first insulation layer and located around the first opening. A metal oxide channel layer is disposed on the gate insulation layer and located in the first opening. A source electrode is disposed on the metal oxide channel layer. An area of the metal oxide channel layer corresponding to the first opening is a channel region. | 07-03-2014 |
Patent application number | Description | Published |
20140084898 | STEP DOWN CONVERTER - A step down DC converter includes a switch, one end of the switch is coupled to a DC voltage source, and the other end of the switch is coupled to a first inductor and a first diode which serial coupled to the first inductor. The converter further includes an auto charge pump circuit which is coupled to the first inductor and the first diode and provides an output current to a load. | 03-27-2014 |
20140098573 | DC/DC CONVERTER - A DC/DC converter is coupled between a DC source and a load. The DC/DC converter includes a first charge pump circuit coupled to the DC source, a second charge pump coupled to the load, a first switch coupled to the first charge pump circuit, a second switch coupled to the second charge pump circuit, and a first inductor, wherein, one terminal of the first inductor coupled to the first charge pump circuit and the second charge pump circuit, and the other terminal coupled to a common node between the first switch and the second switch. And wherein, the first inductor, the first switch and the second switch are configured between the first charge pump and the second charge pump. | 04-10-2014 |
20140104893 | ISOLATED INTERLEAVED DC CONVERTER - An isolated interleaved DC converter has a main circuit architecture integrating a transformer, a dual-phase interleaved step-up circuit, a voltage type auto charge pump circuit with a double-voltage rectifier circuit. The circuit of the invention integrates with the transformer, and combines the dual-phase interleaved boost circuit and the voltage type auto charge pump circuit at a primary side of the transformer to reduce the input current ripple. At a secondary side of the transformer, the circuit of the invention further combines the double-voltage rectifier circuit. The active switching elements can be further integrated in the dual-phase interleaved boost circuit to realize the soft switching technology while reducing EMI and the switching loss and increasing the circuit conversion efficiency. | 04-17-2014 |
20140112026 | RESONANT DC CONVERTER - A resonant DC converter, combines a voltage type auto charge pump circuit with a full-bridge or half-bridge resonant DC conversion circuit at a primary side of a transformer, combines a double-voltage rectifier circuit at a secondary side of the transformer, and grants the circuit of the invention with characteristics of variable circuit architecture by means of the design of circuit parameters and the action of the LC resonant circuit. Integration of switching elements of the converter circuit and the use of characteristics of automatically changing the circuit architecture contribute to reduce the switching losses and increase the circuit conversion efficiency. Low output voltage ripple enables the circuit of the invention to avoid using large-capacitance electrolytic capacitors and be able to extend the service life of the transformer. The operation of the circuit of the invention at boost or buck mode can be controlled by adjusting the circuit parameters. | 04-24-2014 |
Patent application number | Description | Published |
20150061061 | PHOTO DIODE AND METHOD OF FORMING THE SAME - A method for forming a photo diode is provided. The method includes: forming a first pair of electrodes and a second pair of electrodes over a substrate by using a conductive layer; forming a dielectric layer over the substrate; patterning the dielectric layer over the substrate; forming a photo conversion layer over the substrate; and forming a color filter layer over the photo conversion layer, wherein at least a portion of the dielectric layer separates a first portion of the color filter layer corresponding to a first pixel from a second portion of the color filer layer corresponding to a second pixel, and a refractive index of the dielectric layer is lower than a refractive index of the color filter layer, wherein the first pair of electrodes corresponds to the first pixel and the second pair of electrodes corresponds to the second pixel. | 03-05-2015 |
20150076637 | PHOTO DIODE AND METHOD OF FORMING THE SAME - A method for forming a photo diode is provided. The method includes: forming a first bottom electrode corresponding to a first pixel and a second bottom electrode corresponding to a second pixel over a substrate; forming a dielectric layer over the substrate; patterning the dielectric layer over the substrate; forming a photo conversion layer over the substrate; and forming a top electrode over the photo conversion layer; forming a color filter layer over the top electrode, wherein at least a portion of the dielectric layer separates a first portion of the color filter layer corresponding to a first pixel from a second portion of the color filer layer corresponding to a second pixel, and a refractive index of the dielectric layer is lower than a refractive index of the color filter layer. | 03-19-2015 |
20150279901 | PHOTO DIODE AND METHOD OF FORMING THE SAME - A method for forming a photo diode is provided. The method includes: forming a first pair of electrodes and a second pair of electrodes over a substrate by using a conductive layer; forming a dielectric layer over the substrate; patterning the dielectric layer over the substrate; forming a photo conversion layer over the substrate; and forming a color filter layer over the photo conversion layer, wherein at least a portion of the dielectric layer separates a first portion of the color filter layer corresponding to a first pixel from a second portion of the color filter layer corresponding to a second pixel, and a refractive index of the dielectric layer is lower than a refractive index of the color filter layer, wherein the first pair of electrodes corresponds to the first pixel and the second pair of electrodes corresponds to the second pixel. | 10-01-2015 |
Patent application number | Description | Published |
20100271294 | Method for Reducing Resonance Energy of an LCD panel and Related LCD Device - A method for reducing resonance energy of an LCD panel includes providing a plurality of driving signal patterns, each defining a non-overlap area width of a synchronization signal and a scan-line charging frequency, and determining an order of the plurality of driving signal patterns to modulate driving signals of the LCD panel accordingly. | 10-28-2010 |
20120187999 | INTERPOLATION CIRCUIT - An interpolation circuit adapted to receive a plurality of inputs is provided. The inputs include a first input group and a second input group. The interpolation circuit includes a first selecting channel, a second selecting channel, and an interpolation unit. The first selecting channel receives the first input group and outputs a first input of the first input group according to a selecting signal. The second selecting channel receives the second input group and the first input and outputs a second input of the second input group according to the selecting signal. The first selecting channel and the second selecting channel respectively output the first input or the second input. The interpolation unit is coupled to the first selecting channel and the second selecting channel, and receives the first input and the second input, and accordingly performs an interpolation to output an interpolation result. | 07-26-2012 |
20120229171 | FREQUENCY SYNTHESIZER AND FREQUENCY SYNTHESIZING METHOD FOR CONVERTING FREQUENCY'S SPURIOUS TONES INTO NOISE - One of the advantages of direct frequency synthesis technique (e.g., flying-adder architecture) is its capability of generating arbitrary frequency by utilizing the time-average-frequency concept. In the clock output of the direct frequency synthesizer, instead of one type of cycle, there are two types of cycles. Unlike the conventional one-type-cycle clock wherein clock energy is concentrated at its designed frequency, Time-Average-Frequency based clock spreads some of its energy into spurious tones, which could be harmful to certain applications. The spurious tones are caused by the periodic carry sequence generated from a fractional part accumulator inside the frequency synthesizer. The invention suggests a method and an apparatus to break this periodicity and convert the spurious tones into broadband noise. | 09-13-2012 |
20120287140 | Display Interface Circuit - A display interface circuit includes a physical layer circuit for receiving and modulating an original data signal and an original clock signal, a frame buffer for storing and outputting the data signal according to the clock signal and a command signal, a display serial interface for transmitting the data signal and the clock signal through packetization, a configuration register for generating the command signal according to an asynchronous clock signal and the data signal, and an asynchronous delay circuit for adjusting a clock latency that the clock signal takes to be sent to the configuration register to generate the asynchronous clock signal. | 11-15-2012 |
20120311214 | ARBITRATION CIRCUIT AND ARBITRATION METHOD THEREOF - An arbitration circuit and an arbitration method thereof are provided to arbitrate requests from a plurality of data processing devices for access to a shared resource. The arbitration method has steps of generating a first data stream for respectively identifying whether the data processing devices are currently serviced, generating a second data stream for identifying whether the data processing devices issue any request for access the shared resource, and performing AND operations on the first and second data streams in parallel to generate a third data stream that is used for determining which of the requests may be granted. Because the requests are processed in parallel, the arbitration time can be reduced. | 12-06-2012 |
Patent application number | Description | Published |
20150079846 | POWER SOCKET - A power socket is to be electrically connected to an internal terminal of an electronic device and to be electrically and separably connected to a plug. The plug has a tubular interior surface and an exterior surface. The power socket includes a body, a central terminal, a first conductor, and a second conductor. The body includes a surrounding wall that has an inner surface defining an accommodating space. The central terminal is disposed in the accommodating space, and is electrically connected to the internal terminal. The first conductor is disposed on the inner surface and has a first elastic portion. The second conductor is electrically connected to the central terminal, and has a second elastic portion. | 03-19-2015 |
20150288219 | Portable Power Bank - The present invention relates to a portable power bank comprising a battery pack, a first control module and a second control module, wherein the battery pack further comprises at least two cells connected in series, and wherein the first control module and the second control module both electrically connected to a first terminal and a second terminal of the battery pack; the first controller is configured for regulating the DC input voltage for charging the battery pack and the second controller is configured for regulating the DC output voltage for charging an external device. | 10-08-2015 |
20150372521 | Portable Power Bank - The present invention provides a power bank comprising a battery protection board, controller board, and a host connector. The host connector is compatible with an accessory connector on a fast charger board, and the host connector is connected to the accessory connector for boosting the charging rate of the power bank. The fast charger board connected to the power bank may, for powering laptops and electric bicycles, elevate the output voltage of the power bank to 12V or above. The power bank may further connect with other external components, such as an LED module and a wireless transceiver module, in order to extend the functionality of the power bank. | 12-24-2015 |
Patent application number | Description | Published |
20130190677 | PHOTO-STIMULATION METHOD AND KIT WITH AGONIST AGENT - Disclosed is a photo-stimulation method employing an agonist agent, and a kit for introducing same. The method includes the following steps: providing a light-emitting diode (LED) illuminant which is a yellow, red, green, blue LED or a mixture of two or more kinds thereof, and an agonist agent which contains 0.5% to 2% calcium ion; and adding the agonist agent to a subject and illuminating the subject by the LED illuminant to promote collagen synthesis, to suppress microbial growth, or to inhibit melanin synthesis, wherein the yellow LED is in an illuminance range from 1,000 to 3,500 lux, the red LED is in an illuminance range from 6,000 to 9,500 lux, the green LED is in an illuminance range from 1000 to 5000 lux, and the blue LED is in an illuminance range from 3,000 to 7,000 lux. | 07-25-2013 |
20130190843 | PHOTO-STIMULATION METHOD AND DEVICE - Disclosed is a photo-stimulation method and device. The method includes the following steps: providing a light-emitting diode (LED) illuminant which is a yellow, red, or blue LED; and illuminating a subject by the LED illuminant to promote collagen synthesis, to suppress microbial growth, or to inhibit melanin synthesis, wherein the yellow LED is in an illuminance range from 1,000 to 3,500 lux, the red LED is in an illuminance range from 6,000 to 9,500 lux, and the blue LED is in an illuminance range from 3,000 to 7,000 lux. | 07-25-2013 |
20130190844 | PHOTO-STIMULATION METHOD AND DEVICE WITH LIGHT MIXTURE - Disclosed is a photo-stimulation method and device with a light mixture. The method includes the following steps: providing a light-emitting diode (LED) illuminant which is a combination of a yellow LED and a red LED; and illuminating a subject by the LED illuminant to promote collagen synthesis, to suppress microbial growth, or to inhibit melanin synthesis, wherein the yellow LED is in an illuminance range from 1,000 to 3,500 lux, the red LED is in an illuminance range from 6,000 to 9,500 lux, and the number ratio of the yellow LED to the red LED is 0.5-2:0.5-2. | 07-25-2013 |