Patent application number | Description | Published |
20120321577 | Skin-whitening composition containing tyrosinase inhibitor - A skin-whitening composition containing a tyrosinase inhibitor is disclosed. The skin-whitening composition includes: the tyrosinase inhibitor (CitrusC) of 0.1-2.5 wt % based on a weight of the skin-whitening composition; ascorbic acid 2-glucoside of 0.1-2.5 wt % based on the weight of the skin-whitening composition; and tranexamic acid of 0.1-2.5 wt % based on the weight of the skin-whitening composition; wherein the ingredients of the composition work synergistically on whitening skin. | 12-20-2012 |
20130164233 | SKIN-WHITENING ESSENCE COMPOSITION CONTAINING TYROSINASE INHIBITOR - A skin-whitening essence composition containing a tyrosinase inhibitor is disclosed. The skin-whitening essence composition includes: 0.1-2.5 wt % of the tyrosinase inhibitor (CitrusC), 0.1-2.5 wt % of ascorbic acid 2-glucoside (AA2G), 0.1-2.5 wt % of tranexamic acid and a moisturizing essence base that work synergistically to provide the skin-whitening essence composition with skin-whitening effect. | 06-27-2013 |
20130330373 | CREAM COMPOSITION ENHANCING SKIN ABSORPTION OF GLUCOSAMINE - The resent invention relates to a cream composition of glucosamine, including at least 10 wt %-15 wt % of glucosamine HCL, a methylsulfonylmethane component, a chondroitin component, and a cream base, wherein the composition promotes penetration of glucosamine from skin of affected area by synergistic interaction between components, in order to enhance absorption of human body. | 12-12-2013 |
20150031646 | CARRIER ENHANCING ABSORPTION OF MEDICATION - A carrier enhancing absorption of medication includes a target medication, an emulsifier, a small-molecular hyaluronic acid (HA) component, an absorption enhancer and a cream base, wherein the carrier promotes infiltration of target medication from skin over affected area and enhance the absorption efficacy of human body by synergistic interaction. | 01-29-2015 |
Patent application number | Description | Published |
20110025147 | Motor Assembly with a Thermally Conductive Bridging Member - A motor assembly includes a housing, a revolving shaft revolvably mounted in the housing, a magnet mounting portion surrounding and rotatable with the revolving shaft, a magnet disposed on the magnet mounting portion, a magnetically inducible core having a plurality of stator poles spaced apart from rotor magnetic poles of the magnet, and a plurality of stator windings wound on the stator poles, respectively. The stator windings are spaced apart from end walls of the housing by axial intervals. A thermally conductive bridging member is disposed to span the axial intervals to conduct heat emanating from the stator windings to the end walls so as to dissipate heat out of the housing. | 02-03-2011 |
20130068149 | MOTORIZED-SURFBOARD-BASED WATER MOTORCYCLE - A water motorcycle includes a motorized surfboard unit having a deck portion and driven by a drive motor, and a motorbike frame unit detachably mounted on the deck portion by means of retaining hook units. The motorbike frame unit includes a seat module provided with a rider's seat, and a handle module provided with an upright handlebar frame. The surfboard unit can be used independently for surfing or combined with the motorbike frame unit to function as a water motorcycle. | 03-21-2013 |
20140053764 | STEERING DEVICE FOR A SURFBOARD - A steering device for a surfboard includes a steering unit, a driving unit and a transmitting unit. The steering unit is operable for controlling a movement of the surfboard. The driving unit includes a base seat secured to a board body of the surfboard, a rotatable linking member disposed in the base seat, and a drive arm mounted with a handle. The drive arm is rotatable and substantially untwistable, is connected to the linking member, and extends outwardly of the base seat. Rotation of the drive arm drives the linking member to rotate, thereby driving operation of the steering unit via the transmitting unit. | 02-27-2014 |
Patent application number | Description | Published |
20120242926 | LIQUID CRYSTAL DISPLAY DEVICE AND ELECTRONIC EQUIPMENT HAVING THE SAME - A liquid crystal display device includes a support frame having a bottom wall, and a main surrounding wall extending upwardly from and formed integrally as one piece with the bottom wall. The bottom wall and the surrounding wall cooperatively define a receiving space. The bottom wall includes a first support disposed in the receiving space. The main surrounding wall includes a second support disposed in the receiving space and spacedly above the first support. A backlight module is supported on the first support. A liquid crystal display panel is supported on the second support so that the liquid crystal display panel is positioned above the backlight module. | 09-27-2012 |
20140140003 | ELECTRONIC DEVICE AND HOUSING THEREOF - An electronic device and housing thereof are provided. The electronic device includes housing, a partition, multiple electronic elements, and a fan. The housing has a side edge, where the side edge is provided with a slit. The partition is disposed in the case, is separated by a distance with the slit, and divides the interior of the case into a first and a second space. The partition has a through hole, the second space is in communication with the first space through the through hole, and the first space is in communication with the outside of the case through the slit. The electronic elements and the fan are disposed in the second space, and an air outlet of the fan is adjacent to the through hole, so that air in the second space can be driven to flow from the first space to the outside through the slit. | 05-22-2014 |
20140327856 | LIQUID CRYSTAL DISPLAY DEVICE AND ELECTRONIC EQUIPMENT HAVING THE SAME - A liquid crystal display device includes a support frame having a bottom wall, and a main surrounding will extending upwardly from and formed integrally as one piece with the bottom wall. The bottom wall and the surrounding wall cooperatively define a receiving space. The bottom wall includes a first support disposed in the receiving space. The main surrounding wall includes a second support disposed in the receiving space and spacedly above the first support. A backlight module is supported on the first support. A liquid crystal display panel is supported on the second support so that the liquid crystal display panel is positioned above the backlight module. | 11-06-2014 |
Patent application number | Description | Published |
20140264802 | Semiconductor Device with Thick Bottom Metal and Preparation Method Thereof - A semiconductor device with thick bottom metal comprises a semiconductor chip covered with a top plastic package layer at its front surface and a back metal layer at its back surface, the top plastic package layer surrounds sidewalls of the metal bumps with a top surface of the metal bumps exposing from the top plastic package layer, a die paddle for the semiconductor chip to mount thereon and a plastic package body. | 09-18-2014 |
20140361420 | HYBRID PACKAGING MULTI-CHIP SEMICONDUCTOR DEVICE AND PREPARATION METHOD THEREOF - A hybrid packaging multi-chip semiconductor device comprises a lead frame unit, a first semiconductor chip, a second semiconductor chip, a first interconnecting structure and a second interconnecting structure, wherein the first semiconductor chip is attached on a first die paddle and the second semiconductor chip is flipped and attached on a third pin and a second die paddle, the first interconnecting structure electrically connecting a first electrode at a front surface of the first semiconductor chip and a third electrode at a back surface of the second semiconductor chip and a second electrode at the front surface of the first semiconductor chip is electrically connected by second interconnecting structure. | 12-11-2014 |
20150021780 | THIN POWER DEVICE AND PREPARATION METHOD THEREOF - A thin power device comprises a substrate having a first set of first contact pads at a front surface of the substrate electrically connecting to a second set of second contact pads at a back surface of the substrate, a through opening opened from the front surface and through the substrate exposing a third contact pad at the back surface of the substrate, a semiconductor chip embedded into the through opening with a back metal layer at a back surface of the semiconductor chip attached on the third contact pad, and a plurality of conductive structures electrically connecting electrodes at a front surface of the semiconductor chip with the corresponding first contact pads in the first sets of first contact pads. | 01-22-2015 |
20150035129 | STACKED MULTI - CHIP PACKAGING STRUCTURE AND MANUFACTURING METHOD THEREOF - A stacked multi-chip packaging structure comprises a lead frame, a first semiconductor chip mounted on the lead frame, a second semiconductor chip flipped-chip mounted on the lead frame, a metal clip mounted on top of the first and second semiconductor chips and a third semiconductor chip stacked on the meal clip; bonding wires electrically connecting electrodes on the third semiconductor chip to the first and second semiconductor chips and the pins of the lead frame; plastic molding encapsulating the lead frame, the chips and the metal clip. | 02-05-2015 |
20150179626 | METHOD OF MAKING STACKED MULTI-CHIP PACKAGING STRUCTURE - A stacked multi-chip packaging structure comprises a lead frame, a first semiconductor chip mounted on the lead frame, a second semiconductor chip flipped-chip mounted on the lead frame, a metal clip mounted on top of the first and second semiconductor chips and a third semiconductor chip stacked on the metal clip; bonding wires electrically connecting electrodes on the third semiconductor chip to the first and second semiconductor chips and the pins of the lead frame; plastic molding encapsulating the lead frame, the chips and the metal clip. | 06-25-2015 |
20150189764 | PREPARATION METHOD OF A THIN POWER DEVICE - A thin power device comprises a substrate having a first set of first contact pads at a front surface of the substrate electrically connecting to a second set of second contact pads at a back surface of the substrate, a through opening opened from the front surface and through the substrate exposing a third contact pad at the back surface of the substrate, a semiconductor chip embedded into the through opening with a back metal layer at a back surface of the semiconductor chip attached on the third contact pad, and a plurality of conductive structures electrically connecting electrodes at a front surface of the semiconductor chip with the corresponding first contact pads in the first sets of first contact pads. | 07-02-2015 |
20150236005 | Method of Hybrid Packaging a Lead Frame Based Multi-Chip Semiconductor Device with Multiple Interconnecting Structures - A hybrid packaging multi-chip semiconductor device comprises a lead frame unit, a first semiconductor chip, a second semiconductor chip, a first interconnecting structure and a second interconnecting structure, wherein the first semiconductor chip is attached on a first die paddle and the second semiconductor chip is flipped and attached on a third pin and a second die paddle, the first interconnecting structure electrically connecting a first electrode at a front surface of the first semiconductor chip and a third electrode at a back surface of the second semiconductor chip and a second electrode at the front surface of the first semiconductor chip is electrically connected by second interconnecting structure. | 08-20-2015 |
20150279766 | SEMICONDUCTOR DEVICE WITH THICK BOTTOM METAL AND PREPARATION METHOD THEREOF - A semiconductor device with thick bottom metal comprises a semiconductor chip covered with a top plastic package layer at its front surface and a back metal layer at its back surface, the top plastic package layer surrounds sidewalls of the metal bumps with a top surface of the metal bumps exposing from the top plastic package layer, a die paddle for the semiconductor chip to mount thereon and a plastic package body. | 10-01-2015 |
20150325559 | EMBEDDED PACKAGE AND METHOD THEREOF - The present invention discloses a new embedded package comprising: a pre-mold lead frame with a plurality of chips attached thereon, where the molding material fills the voids of the lead frame, so that the lead frame is entirely solid; a plurality of pins arranged around the lead frame; a metal clip attached on and electrically connecting the chips together; first laminate layer which covers the chips, the lead frame, a metal clip and pins; conductive plug and extension formed to connect an electrode of a chip to a corresponding pin or to connect the chips together. The new embedded package of the invention with a three-dimensional stack capacity improves the thickness, thermal and electrical properties and the flexible power and logic hybrid design. | 11-12-2015 |
20150357268 | POWER SEMICONDUCTOR DEVICE WITH SMALL CONTACT FOOTPRINT AND THE PREPARATION METHOD - A power semiconductor package with a small footprint and a preparation method thereof are disclosed. The first semiconductor chip and second semiconductor chip are attached on the front and back sides of a die paddle. Conductive pads are then attached on the electrodes at the top surfaces of the first and second semiconductor chips flowed by the formation of a plastic package body covering the die paddle, first and second semiconductor chips, the conductive pads, where a side surface of a conductive pad is exposed from a side surface of the plastic package body. | 12-10-2015 |
20160093559 | SEMICONDUCTOR PACKAGE WITH SMALL GATE CLIP AND ASSEMBLY METHOD - A method of manufacturing a semiconductor package having a small gate clip is disclosed. A first and second semiconductor chips, each of which includes a source electrode and a gate electrode at a top surface, are attached on two adjacent lead frame units of a lead frame such that the lead frame unit with the first chip formed thereon is rotated 180 degrees in relation to the other lead frame unit with the second semiconductor chip formed thereon. A first and second clip sets are mounted on the first and second semiconductor chips, wherein the first clip set is connected to the gate electrode of the first chip, the source electrode of the second chip, and their corresponding leads and the second clip set is connected to the gate electrode of the second chip, the source electrode of the first chip and their corresponding leads. | 03-31-2016 |
20160093560 | POWER SEMICONDUCTOR DEVICE AND THE PREPARATION METHOD - An ultrathin power semiconductor package with high thermal dissipation performance and its preparation method are disclosed. The package includes a lead frame unit with a staggered structure including an upper section and a lower section. A thin layer is attached on the surface of the lead frame unit having a plurality of contact holes on the upper section and at least one opening on the lower section. A semiconductor chip is attached on the opening on the lower section of the lead frame unit and then a plurality of metal bumps are deposited, where one metal bump is formed on each contact hole on the upper section and on each of the electrodes on the top surface of the semiconductor chip. | 03-31-2016 |
20160099238 | EMBEDDED PACKAGE AND METHOD THEREOF - The present invention discloses anew embedded package comprising: a pre-mold lead frame with a plurality of chips attached thereon, where the molding material fills the voids of the lead frame, no that the lead frame is entirely solid; a plurality of pins arranged around the lead frame; a metal clip attached on and electrically connecting the chips together; first laminate layer which covers the chips, the lead frame, a metal clip and pins; conductive plug and extension formed to connect an electrode of a chip to a corresponding pin or to connect the chips together. The new embedded package of the invention with a three-dimensional stack capacity improves the thickness, thermal and electrical properties and the flexible power and logic hybrid design. | 04-07-2016 |
Patent application number | Description | Published |
20120248539 | FLIP CHIP SEMICONDUCTOR DEVICE - A semiconductor device package comprises a lead frame having a die paddle comprising a first chip installation area and a second chip installation area, a recess area formed in the first chip installation area, and multiple metal pillars formed in the recess area, a notch divides the first chip installation area into a transverse base extending transversely and a longitudinal base extending longitudinally, and separates the recess area into a transverse recess part formed in the transverse base and a longitudinal recess part formed in longitudinal base; a portion of a transverse extending part connecting to an external pin extends into a portion inside of the notch. | 10-04-2012 |
20130037935 | WAFER LEVEL PACKAGE STRUCTURE AND THE FABRICATION METHOD THEREOF - The present invention relates to a package for semiconductor device and the fabrication method for integrally encapsulating a whole semiconductor chip within a molding compound. In the semicondcutor device package, bonding pads distributed on the top of the chip are redistributed into an array of redistributed bonding pads located in an dielectric layer by utilizing the redistribution technique. The electrodes or signal terminals on the top of the semiconductor chip are connected to an electrode metal segment on the bottom of the chip by conductive materials filled in through holes formed in a silicon substrate of a semiconductor wafer. Furthermore, the top molding portion and the bottom molding portion seal the semiconductor chip completely, thus providing optimum mechanical and electrical protections. | 02-14-2013 |
20130130443 | METHOD FOR PACKAGING ULTRA-THIN CHIP WITH SOLDER BALL THERMO-COMPRESSION IN WAFER LEVEL PACKAGING PROCESS - The invention generally relates to a packaging method of an ultra-thin chip, more specifically, the invention relates to a method for packaging the ultra-thin chip with solder ball thermo-compression in wafer level packaging process. The method starts with disposing solder balls on metal pads arranged on the front surface of semiconductor chips that are formed at the front surface of a semiconductor wafer. The solder balls are soften by heating the wafer, a compression plate is applied with a pressure on the top ends of the solder balls thus forming a co-planar top surface at the top ends of the solder balls. A molding compound is deposited on the front surface of the wafer with the top ends of the solder balls exposed. The wafer is then ground from its back surface to reduce its thickness to achieve ultra-thin chip. | 05-23-2013 |
20130221507 | ALUMINUM ALLOY LEAD-FRAME AND ITS USE IN FABRICATION OF POWER SEMICONDUCTOR PACKAGE - A semiconductor package is provided with an Aluminum alloy lead-frame without noble metal plated on the Aluminum base lead-frame. Aluminum alloy material with proper alloy composition and ratio for making an aluminum alloy lead-frame is provided. The aluminum alloy lead-frame is electroplated with a first metal electroplating layer, a second electroplating layer and a third electroplating layer in a sequence. The lead-frame electroplated with the first, second and third metal electroplating layers is then used in the fabrication process of a power semiconductor package including chip connecting, wire bonding, and plastic molding. After the molding process, the area of the lead-frame not covered by the molding compound is electroplated with a fourth metal electroplating layer that is not easy to be oxidized when exposing to air. | 08-29-2013 |
20140175628 | COPPER WIRE BONDING STRUCTURE IN SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF - A semiconductor device comprises a first top electrode and a second top electrode at a front surface of the die, at least a Ni plating layer and an Au plating layer overlaying the Ni plating layer are formed on each of the first top electrode and the second top electrode. A copper clip attaches on the Au plating layer of the second top electrode. A gold (Au) stud bump is formed on the Au plating layer of the first top electrode with a copper wire connected on the stud bump. The Au stud bump is thicker than a thickness of the Au plating layer and thinner than a thickness of the copper clip to avoid copper wire NSOP (non-stick on pad) problem due to Ni plating layer diffusion during the solder reflow process in the copper clip attachment. | 06-26-2014 |