Patent application number | Description | Published |
20090160869 | EXTENDED TEXTURE MAPPING UNIT - An extended TMU system of a graphics system is disclosed. The extended TMU system includes a novel parameter, which allows the texture mapping unit to obtain multiple samples, calculate a dot product for the multiple samples, and return a sample of a maximum dot product value, all in a single call. The extended TMU system speeds up the performance of a primitive operation essential to collision detection. Compared to other approaches, the extended TMU system reduce the amount of data transferred during the primitive computation between the core and the TMU by around 75%, and also improves the throughput between 10%-40% for three fundamental collision detection algorithms. | 06-25-2009 |
20090249026 | Vector instructions to enable efficient synchronization and parallel reduction operations - In one embodiment, a processor may include a vector unit to perform operations on multiple data elements responsive to a single instruction, and a control unit coupled to the vector unit to provide the data elements to the vector unit, where the control unit is to enable an atomic vector operation to be performed on at least some of the data elements responsive to a first vector instruction to be executed under a first mask and a second vector instruction to be executed under a second mask. Other embodiments are described and claimed. | 10-01-2009 |
20100082939 | TECHNIQUES FOR EFFICIENT IMPLEMENTATION OF BROWNIAN BRIDGE ALGORITHM ON SIMD PLATFORMS - Methods and apparatus for implementing Brownian Bridge algorithm on Single Instruction Multiple Data (SIMD) computing platforms are described. In one embodiment, a memory stores a plurality of data corresponding to an SIMD (Single Instruction, Multiple Data) instruction. A processor may include a plurality of SIMD lanes. Each of the plurality of the SIMD lanes may process one of the plurality of data stored in the memory in accordance with the SIMD instruction. Other embodiments are also described. | 04-01-2010 |
20110025700 | Using a Texture Unit for General Purpose Computing - An interpolation unit, such as may be found in a texture unit or texture sampler, may be used utilized to perform general purpose mathematical computations such as dot products. This enables some general purpose computations and operations to be offloaded from a central processing unit to an interpolation unit. The interpolation unit may use linear interpolators in order to perform the dot product calculations. | 02-03-2011 |
20110134137 | Texture Unit for General Purpose Computing - A texture unit may be used utilized to perform general purpose mathematical computations such as dot products. This enables some general purpose computations and operations to be offloaded from a central processing unit to the texture unit. The texture unit may use linear interpolators in order to perform the dot product calculations. | 06-09-2011 |
20110148896 | Grouping Pixels to be Textured - A region or group of pixels may be textured as a unit, using a range specifier and one or more anchor pixels to define the group. In some embodiments, processing grouped pixels improves efficiency. | 06-23-2011 |
20110153996 | Parallel and Vectored Gilbert-Johnson-Keerthi Graphics Processing - Parallel and vectored data structures may be used in a single instruction multiple data processor that applies the Gilbert-Johnson-Keerthi algorithm. As a result, the performance of multi-core processors doing graphics processing may be increased in some cases. | 06-23-2011 |
20120159130 | MECHANISM FOR CONFLICT DETECTION USING SIMD - A system and method are configured to detect conflicts when converting scalar processes to parallel processes (“SIMDifying”). Conflicts may be detected for an unordered single index, an ordered single index and/or ordered pairs of indices. Conflicts may be further detected for read-after-write dependencies. Conflict detection is configured to identify operations (i.e., iterations) in a sequence of iterations that may not be done in parallel. | 06-21-2012 |
20140068226 | VECTOR INSTRUCTIONS TO ENABLE EFFICIENT SYNCHRONIZATION AND PARALLEL REDUCTION OPERATIONS - In one embodiment, a processor may include a vector unit to perform operations on multiple data elements responsive to a single instruction, and a control unit coupled to the vector unit to provide the data elements to the vector unit, where the control unit is to enable an atomic vector operation to be performed on at least some of the data elements responsive to a first vector instruction to be executed under a first mask and a second vector instruction to be executed under a second mask. Other embodiments are described and claimed. | 03-06-2014 |
20140176590 | Texture Unit for General Purpose Computing - A texture unit may be used to perform general purpose mathematical computations such as dot products. This enables some general purpose computations and operations to be offloaded from a central processing unit to the texture unit. The texture unit may use linear interpolators in order to perform the dot product calculations. | 06-26-2014 |