Patent application number | Description | Published |
20090002914 | Variable capacitor tuned using laser micromachining - A variable capacitor device is disclosed in which the capacitive tuning ratio and quality factor are increased to very high levels, and in which the capacitance value of the device is tuned and held to a desired value with a high level of accuracy and precision using a laser micromachining tuning process on suitably designed and fabricated capacitor devices. The tuning of the variable capacitor devices can be performed open-loop or closed-loop, depending on the precision of the eventual capacitor value needed or desired. Furthermore, the tuning to a pre-determined value can be performed before the variable capacitor device is connected to a circuit, or alternatively, the tuning to a desired value can be performed after the variable capacitor device has been connected into a circuit. | 01-01-2009 |
20090092162 | Means for improved implementation of laser diodes and laser diode arrays - A laser diode system is disclosed in which a substrate made of a semiconductor material containing laser diodes is bonded to a substrate made from a metallic material without the use of any intermediate joining or soldering layers between the two substrates. The metal substrate acts as an electrode and/or heat sink for the laser diode semiconductor substrate. Microchannels may be included in the metal substrate to allow coolant fluid to pass through, thereby facilitating the removal of heat from the laser diode substrate. A second metal substrate including cooling fluid microchannels may also be bonded to the laser diode substrate to provide greater heat transfer from the laser diode substrate. The bonding of the substrates at low temperatures, combined with modifications to the substrate surfaces, enables the realization of a low electrical resistance interface and a low thermal resistance interface between the bonded substrates. | 04-09-2009 |
20090283927 | Method of fabricating small dimensioned lens elements and lens arrays using surface tension effects - A method is disclosed of implementing lens elements or lens arrays having dimensions ranging from a few centimeters down to the micro-scale or nano-scale using the surface tension of the lens material in a molten state to allow the curved shape of the lens to be precisely defined. The method has useful application in the fabrication of lens elements and lens arrays out of a large variety of material types, including elemental materials, as well as compound materials and alloys. The method also allows the implementation of lenses having far superior surface smoothness compared to other approaches, as well as very accurate lens shapes. The method allows the making of high quality lenses and lens arrays, wherein the diameter of the lenses are on the order of a few microns or less. Convex, concave, plano-convex, plano-concave, compound lenses, and many other types of lens shapes can be implemented using the method of the present invention. | 11-19-2009 |
20090286382 | Low-temperature wafer bonding of semiconductor substrates to metal substrates - A method of wafer or substrate bonding a substrate made of a semiconductor material with a substrate made from a metallic material is disclosed. The method allows the bonding of the two substrates together without the use of any intermediate joining gluing, or solder layer(s) between the two substrates. The method allows the moderate or low temperature bonding of the metal and semiconductor substrates, combined with methods to modify the materials so as to enable low electrical resistance interfaces to be realized between the bonded substrates, and also combined with methods to obtain a low thermal resistance interface between the bonded substrates, thereby enabling various useful improvements for fabrication, packaging and manufacturing of semiconductor devices and systems. | 11-19-2009 |
20100108254 | Tailorable titanium-tungsten alloy material thermally matched to semiconductor substrates and devices - The present invention relates generally to a metallic alloy composed of Titanium and Tungsten that together form an alloy having a Coefficient of Thermal Expansion (CTE), wherein the content of the respective constituents can be adjusted so that the alloy material can be nearly perfectly matched to that of a commonly used semiconductor and ceramic materials. Moreover, alloys of Titanium-Tungsten have excellent electrical and thermal conductivities making them ideal material choices for many electrical, photonic, thermoelectric, MMIC, NEMS, nanotechnology, power electronics, MEMS, and packaging applications. The present invention describes a method for designing the TiW alloy so as to nearly perfectly match the coefficient of thermal expansion of a large number of different types of commonly used semiconductor and ceramic materials. The present invention also describes a number of useful configurations wherein the TiW material is made as well as how it can be shaped, formed and polished into heat sink, heat spreaders, and electrodes for many applications. The present invention also discloses the direct bonding of a TiW substrate to a semiconductor substrate. | 05-06-2010 |
20100118407 | Method of reflecting impinging electromagnetic radiation and limiting heating caused by absorbed electromagnetic radiation using engineered surfaces on macro-scale objects - A method of reflecting impinging electromagnetic radiation by using engineered surfaces of alternating layers of materials having different indices of refraction is described. These layers can be fabrication or applied onto the surfaces of macro-scale objects. Also, a method of limiting the heating within the interior of an object being impinged upon by electromagnetic radiation is described. | 05-13-2010 |
20110250706 | METHOD OF FABRICATING MEMS, NEMS, PHOTONIC, MICRO- AND NANO-FABRICATED DEVICES AND SYSTEMS - An improved method for the fabrication of Micro-Electro-Mechanical Systems (MEMS), Nano-Electro-Mechanical Systems (NEMS), Photonics, Nanotechnology, 3-Dimensional Integration, Micro- and Nano-Fabricated Devices and Systems for both rapid prototyping development and manufacturing is disclosed. The method includes providing a plurality of different standardized and repeatable process modules usable in fabricating the devices and systems, defining a process sequence for fabricating a predefined one of the devices or systems, and identifying a series of the process modules that are usable in performing the defined process sequence and thus in fabricating the predefined device or system. | 10-13-2011 |
20120281725 | MEANS FOR IMPROVED IMPLEMENTATION OF LASER DIODES AND LASER DIODE ARRAYS - A laser diode system is disclosed in which a substrate made of a semiconductor material containing laser diodes is bonded to a substrate made from a metallic material without the use of any intermediate joining or soldering layers between the two substrates. The metal substrate acts as an electrode and/or heat sink for the laser diode semiconductor substrate. Microchannels may be included in the metal substrate to allow coolant fluid to pass through, thereby facilitating the removal of heat from the laser diode substrate. A second metal substrate including cooling fluid microchannels may also be bonded to the laser diode substrate to provide greater heat transfer from the laser diode substrate. The bonding of the substrates at low temperatures, combined with modifications to the substrate surfaces, enables the realization of a low electrical resistance interface and a low thermal resistance interface between the bonded substrates. | 11-08-2012 |
20130008875 | VARIABLE CAPACITOR TUNED USING LASER MICROMACHINING - A variable capacitor device is disclosed in which the capacitive tuning ratio and quality factor are increased to very high levels, and in which the capacitance value of the device is tuned and held to a desired value with a high level of accuracy and precision using a laser micromachining tuning process on suitably designed and fabricated capacitor devices. The tuning of the variable capacitor devices can be performed open-loop or closed-loop, depending on the precision of the eventual capacitor value needed or desired. Furthermore, the tuning to a pre-determined value can be performed before the variable capacitor device is connected to a circuit, or alternatively, the tuning to a desired value can be performed after the variable capacitor device has been connected into a circuit. | 01-10-2013 |
20130344819 | VERSATILE COMMUNICATION SYSTEM AND METHOD OF IMPLEMENTATION USING HETEROGENEOUS INTEGRATION - A communication system front-end architecture and a method of fabricating same are disclosed in which a diverse set of semiconductor technologies and device types (including CMOS, SiGe CMOS, InP HBTs (heterojunction bipolar transistors), InP HEMTs (high electron mobility transistors), GaN HEMTs, SiC devices, any number from a diverse set of MEMS sensors and actuators, and potentially photonics) is merged onto a single silicon, or other material substrate to thereby enable the development of smaller, lighter, and higher performance systems. | 12-26-2013 |
20140268076 | SELF-ALIGNED DYNAMIC PATTERN GENERATOR DEVICE AND METHOD OF FABRICATION - A dynamic pattern generator (DPG) device and method of making a DPG device are disclosed. The DPG device is used in semiconductor processing tools that require multiple electron-beams, such as direct-write lithography. The device is a self-aligned DPG device that enormously reduces the required tolerances for aligning the various electrode layers, as compared to other design configurations including the non-self-aligned approach and also greatly simplifies the process complexity and cost. A process sequence for both integrated and non-integrated versions of the self-aligned DPG device is described. Additionally, an advanced self-aligned DPG device that eliminates the need for a charge dissipating coating or layer to be used on the device is described. Finally, a fabrication process for the implementation of both integrated and non-integrated versions of the advanced self-aligned DPG device is described. | 09-18-2014 |
20150034592 | METHOD FOR ETCHING DEEP, HIGH-ASPECT RATIO FEATURES INTO GLASS, FUSED SILICA, AND QUARTZ MATERIALS - A method or process is disclosed for etching deep, high-aspect ratio features into silicon dioxide material layers and substrates, including glass, fused silica, quartz, or similar materials, using a plasma etch technology. The method has application in the fabrication and manufacturing of MEMS, microelectronic, micro-mechanical, photonic and nanotechnology devices in which silicon dioxide material layers or substrates are used and must be patterned and etched. Devices that benefit from the method described in this invention include the fabrication of MEMS gyroscopes, resonators, oscillators, microbalances, accelerometers, for example. The etch method or process allows etch depths ranging from below 10 microns to over 1 millimeter and aspect ratios from less than 1 to 1 to over 10 to 1 with etched feature sidewalls having vertical or near vertical angles. Additionally, the disclosed method provides requirements of the etched substrates to reduce or eliminate undesired effects of an etch. | 02-05-2015 |