Mi Hyun Hwang
Mi Hyun Hwang, Gyeonggi-Do KR
Patent application number | Description | Published |
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20100117716 | PERIODIC SIGNAL GENERATING CIRCUIT DEPENDENT UPON TEMPERATURE FOR ESTABLISHING A TEMPERATURE INDEPENDENT REFRESH FREQUENCY - A periodic signal generating circuit which is dependent upon temperature for establishing a temperature independent refresh frequency is presented The periodic signal generating circuit includes a reference voltage generating unit and a periodic signal generating unit. The reference voltage generating unit produces a reference voltage which exhibits a variable voltage level in response to temperature. The periodic signal generating unit produces a periodic signal in response to a set voltage to determine the reference voltage and an oscillation period, wherein a transition timing of the set voltage is controlled by the reference voltage. As a result the periodic signal has a relatively constant period which can be produced regardless of the temperature variation. | 05-13-2010 |
20100329060 | COUNTER CONTROL SIGNAL GENERATOR AND REFRESH CIRCUIT - A counter control signal generator comprises a first pulse signal generator configured to generate a first pulse signal including a pulse generated when a self-refresh period is terminated, a second pulse signal generator configured to generate a second pulse signal including a pulse generated in sync with a cyclic signal generated during a refresh period, and a signal generator configured to generate a counter control signal counting an address of a memory cell, corresponding to a memory cell on which a refresh operation is conducted, in response to the first and second pulse signals. | 12-30-2010 |
20110026561 | TEMPERATURE INFORMATION OUTPUTTING CIRCUIT AND A SEMICONDUCTOR MEMORY APPARATUS USING THE SAME - A temperature information outputting circuit of a semiconductor memory apparatus for accurately performing a temperature measuring test is presented. The temperature information outputting circuit includes first, second and third temperature information outputting units. The first temperature information outputting unit outputs a first temperature information signal to a single temperature information outputting pad when a first test signal is enabled. The second temperature information outputting unit stores a second temperature information signal when the first test signal is enabled and outputs the stored second temperature information signal to the single temperature information outputting pad when a second test signal is enabled. The third temperature information outputting unit stores a third temperature information signal when the first test signal is enabled and outputs the stored third temperature information signal to the single temperature information outputting pad when a third test signal is enabled. | 02-03-2011 |
Mi Hyun Hwang, Anyang-Si KR
Patent application number | Description | Published |
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20090002057 | Temperature sensor circuit and method for controlling the same - A temperature sensor circuit includes a first reference voltage generator configured to generate a first reference voltage signal by using a first signal linearly varying with temperature, a second reference voltage generator configured to generate a second reference voltage signal with a predetermined logic level by using the first reference voltage signal, and a controller configured to compare the first signal with the second reference voltage signal and control a voltage level of the first signal according to the comparison result. | 01-01-2009 |
20090003409 | Temperature sensor and semiconductor memory device using the same - A semiconductor memory device includes a temperature sensor. The temperature sensor includes a temperature data signal generator and a temperature signal extractor. The temperature data signal generator generates temperature data signals for respective temperate ranges of internal temperature. The temperature signal extractor receives the temperature data signals and a pulse signal with a predetermined cycle, extracts the temperature data signal that is activated for at least two cycles of the pulse signal, and generates a temperature signal corresponding to the extracted temperature data signal. | 01-01-2009 |
20090109775 | Precharge voltage supply circuit and semiconductor memory device using the same - A precharge voltage supply circuit and a semiconductor memory device using the same are described. The precharge voltage supply circuit includes a first voltage supplier configured to reduce a precharge voltage and supply the reduced precharge voltage in response to a power down mode signal that is activated in a power down mode, a second voltage supplier configured to supply a power voltage in a predetermined section from a point of time when exiting the power down mode, and a third voltage supplier configured to supply the precharge voltage after a lapse of the predetermined section. | 04-30-2009 |
20090267674 | Clock control circuit and semiconductor memory device using the same - A clock control circuit comprises a control signal generating unit configured to generate a control signal disabled in a predetermined state while in an active mode, and a clock transferring unit configured to transfer an external clock in response to the control signal. | 10-29-2009 |
20100007404 | Temperature sensor circuit and method for controlling the same - A temperature sensor circuit comprises a first reference voltage generator configured to generate a first signal that linearly varies with temperature and a first reference voltage signal that maintains a certain level irrespective of temperature, a second reference voltage generator configured to generate a second reference voltage signal by using the first reference voltage signal, and a controller configured to compare the first signal with the second reference voltage signal and control a voltage level of the first signal according to a comparison result. | 01-14-2010 |
20100141321 | Buffer enable signal generating circuit and input circuit using the same - An input circuit comprises a buffer enable signal generating circuit for generating a buffer enable signal having an predetermined enable period in response to an external command, and a buffer circuit for buffering and outputting the external command and an external address signal in response to the buffer enable signal. | 06-10-2010 |
20120025872 | Buffer Enable Signal Generating Circuit And Input Circuit Using The Same - An input circuit comprises a buffer enable signal generating circuit for generating a buffer enable signal having an predetermined enable period in response to an external command, and a buffer circuit for buffering and outputting the external command and an external address signal in response to the buffer enable signal. | 02-02-2012 |
Mi Hyun Hwang, Seoul KR
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20120182814 | PROGRAMMING CIRCUIT USING ANTIFUSE - A programming circuit using an antifuse includes a fuse signal generation unit including an antifuse which connects a node with a low voltage in response to a test address when the node is driven to a level of a high voltage, and configured to output a signal of the node as a fuse signal in response to a test mode signal; and a programming signal generation unit configured to buffer the fuse signal in response to a power-up signal and generate a programming signal. | 07-19-2012 |
20130308395 | DATA OUTPUT CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device including internally generated control signals that help to ensure that buffered and amplified data from a memory cell is properly presented to a global line independent of the enable period of the internally generated enable signal EN. in the semiconductor memory device in accordance with an embodiment of the present invention, since data is outputted through the global line commonly connected to multiple banks, pre-charge signal generation units are disposed in the respective banks to prevent contention on the global line. | 11-21-2013 |
20140219040 | SEMICONDUCTOR MEMORY DEVICE INCLUDING BULK VOLTAGE GENERATION CIRCUIT - A semiconductor memory device includes a bulk voltage generation circuit configured to interrupt driving of a bulk voltage in response to an exit signal which is generated in synchronization with a time at which a power-down mode is ended, and discharge charges of a first node from which the bulk voltage is outputted, in response to the exit signal; and an internal circuit including a MOS transistor which is supplied with the bulk voltage. | 08-07-2014 |
Mi Hyun Hwang, Suwon-Si KR
Patent application number | Description | Published |
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20130164021 | IMAGE FORMING APPARATUS - An image forming apparatus has a structure which prevents contamination of charging units charging photoconductors. The image forming apparatus includes photoconductor units, charging units charging the photoconductor units, and a fan-motor unit changing the flow of air between the photoconductor units and the charging units to prevent substances of fine particles from flowing into the charging units. | 06-27-2013 |