Patent application number | Description | Published |
20110234526 | Single-layer projected capacitive touch panel and method of manufacturing the same - A single-layer projected capacitive touch panel has a glass cover, a touch sensing circuit layer, an insulating ink layer, a conductive wire layer, an insulator layer, a conductive glue layer and a flexible printed circuit (FPC) board. The touch sensing circuit layer, the insulating ink layer, the conductive wire layer, the insulator layer and the conductive glue layer are mounted on a circuit surface of the glass cover in sequence. The insulating ink layer covers the touch sensing circuit layer and has multiple through slots. Each through slot is filled with an electric conductor. The FPC is fastened on the conductive wire layer by a conductive glue layer. Therefore, the touch panel of the present invention is thinner, provides better penetrability and costs less than conventional projected capacitive touch panels. | 09-29-2011 |
20120007824 | Capacitive touch panel - A capacitive touch panel sequentially has a first glass substrate, a lower touch sensitive layer, a lower insulation ink layer, a lower conductor layer, a lower insulation layer, a lower conductive adhesive layer, a flexible circuit board, a transparent insulation adhesive layer, an upper insulation layer, an upper conductive adhesive layer, an upper conductor layer, an upper insulation ink layer, an upper touch sensitive layer and a second glass substrate. The aforementioned structure allows fabrication of the capacitive touch panel to be separated into a lower panel fabrication process and an upper panel fabrication process. The two independent fabrication processes prevent the capacitive touch panel from being damaged in one of the processes when the process is completed so as to increase the yield in production and further facilitate producing large-size touch panel. | 01-12-2012 |
20130215082 | Projected capacitive touch panel and method of manufacturing the same - A projected capacitive touch panel has a glass cover, a touch sensing circuit layer, an insulating ink Layer, a conductive wire layer, an insulator layer, a conductive glue layer and a flexible printed circuit (ITC) board. The touch sensing circuit layer, the insulating ink layer the conductive wire layer, the insulator layer and the conductive glue layer are mounted on a circuit surface of the glass cover in sequence. The insulating ink layer cover the touch sensing circuit layer and has multiple through slots. Each through slot is filled with an electric conductor. The FPC is fastened on the conductive wire layer by a conductive glue layer | 08-22-2013 |
Patent application number | Description | Published |
20130271205 | DUAL-SUBSTRATE CAPACITIVE TOUCH PANEL - A capacitive touch panel sequentially has a first glass substrate, a lower touch sensitive layer, a lower insulation ink layer, a lower conductor layer, a lower insulation layer, a lower conductive adhesive layer, a flexible circuit board, a transparent insulation adhesive layer, an upper insulation layer, an upper conductive adhesive layer, an upper conductor layer, an upper insulation ink layer, an upper touch sensitive layer and a second glass substrate. The aforementioned structure allows fabrication of the capacitive touch panel to be separated into a lower panel fabrication process and an upper panel fabrication process. The two independent fabrication processes prevent the capacitive touch panel from being damaged in one of the processes when the process is completed so as to increase the yield in production and further facilitate producing large-size touch panel. | 10-17-2013 |
20130277196 | DUAL-SUBSTRATE CAPACITIVE TOUCH PANEL - A capacitive touch panel sequentially has a first glass substrate, a lower touch sensitive layer, a lower insulation ink layer, a lower conductor layer, a lower insulation layer, a lower conductive adhesive layer, a flexible circuit board, a transparent insulation adhesive layer, an upper insulation layer, an upper conductive adhesive laver, an upper conductor layer, an upper insulation ink layer, an upper touch sensitive layer and a second glass substrate. The aforementioned structure allows fabrication of the capacitive touch panel to be separated into a lower panel fabrication process and an upper panel fabrication process. The two independent fabrication processes prevent the capacitive touch panel from being damaged in one of the processes when the process is completed so as to increase the yield in production and further facilitate producing large-size touch panel. | 10-24-2013 |
20130277197 | DUAL-SUBSTRATE CAPACITIVE TOUCH PANEL - A capacitive touch panel sequentially has a first transparent substrate, a lower touch sensitive layer, a lower conductor layer, a lower insulation layer, a lower conductive adhesive layer, a flexible circuit board, a transparent insulation adhesive laver, an upper insulation layer, an upper conductive adhesive layer, an upper conductor layer, an upper insulation ink layer, an upper touch sensitive layer and a second transparent substrate. The aforementioned structure allows fabrication of the capacitive touch panel to be separated into a lower panel fabrication process and an upper panel fabrication process. The two independent fabrication processes prevent the capacitive touch panel from being damaged in one of the processes when the process is completed, thereby increase the yield in production and further facilitate producing large-size touch panel. | 10-24-2013 |
20140152920 | SINGLE-LAYER PROJECTED CAPACITIVE TOUCH PANEL AND METHOD OF MANUFACTURING THE SAME - A single-layer projected capacitive touch panel has a glass cover, a touch sensing circuit layer, an insulating ink layer, a conductive wire layer, an insulator layer, a conductive glue layer and a flexible printed circuit (FPC) board. The touch sensing circuit layer, the insulating ink layer, the conductive wire layer, the insulator layer and the conductive glue layer are mounted on a circuit surface of the glass cover in sequence. The insulating ink layer covers the touch sensing circuit layer and has multiple through slots. Each through slot is filled with an electric conductor. The FPC is fastened on the conductive wire layer by a conductive glue layer. Therefore, the touch panel of the present invention is thinner, provides better penetrability and costs less than conventional projected capacitive touch panels. | 06-05-2014 |
20150317031 | SINGLE-LAYER PROJECTED CAPACITIVE TOUCH PANEL AND METHOD OF MANUFACTURING THE SAME - A single-layer projected capacitive touch panel has a glass cover, a touch sensing circuit layer, an insulating ink layer, a conductive wire layer, an insulator layer, a conductive glue layer and a flexible printed circuit (FPC) board. The touch sensing circuit layer, the insulating ink layer, the conductive wire layer, the insulator layer and the conductive glue layer are mounted on a circuit surface of the glass cover in sequence. The insulating ink layer covers the touch sensing circuit layer and has multiple through slots. Each through slot is filled with an electric conductor. The FPC is fastened on the conductive wire layer by a conductive glue laver. | 11-05-2015 |
Patent application number | Description | Published |
20130217271 | ELECTRICAL CONNECTOR - An electrical connector includes a first terminal and a second terminal. The second terminal is fixed at the first terminal and enclosed by the first terminal, in which the second terminal includes a tube-shaped structure, the tube-shaped structure has a clipping portion and two end-surfaces, the two end-surfaces lean against each other to form a seam. The inner diameter of the clipping portion is smaller than the inner diameters of other portions of the tube-shaped structure. When a third terminal of a coupling connector is inserted into the tube-shaped structure to make the tube-shaped structure elastically deformed, the two end-surfaces are separated from each other and the clipping portion clips the third terminal. | 08-22-2013 |
20140177296 | POWER CONVERSION APPARATUS - A power conversion apparatus is provided. The power conversion apparatus includes an AC to DC adapter, an input port, a power conversion control unit, and a restart circuit. The AC to DC adapter converts an AC input voltage into a DC output voltage according to an external signal of an electronic apparatus and provides the DC output voltage to the electronic apparatus. The input port receives the AC input voltage through an AC input terminal. If the power conversion apparatus does not output the DC output voltage to the electronic apparatus, the power conversion control unit turns off the power conversion apparatus. If the restart circuit detects that an insertion action occurs on the input port, the restart circuit transmits a trigger signal to turn on the power conversion control unit in an off mode. | 06-26-2014 |
20140232205 | ELECTRONIC APPARATUS - An electronic apparatus is provided. The electronic apparatus includes a controller, a first trigger circuit, a switch unit and a logic circuit. The controller provides a setting signal. The first trigger circuit provides a trigger signal according to at least one of first trigger situations. The switch unit is connected to a power input terminal. The logic circuit adjusts a switching signal according to the setting signal and the trigger signal. The switch unit decides whether to provide an input voltage at the power input terminal to the electronic apparatus according to the switching signal. | 08-21-2014 |
20140312792 | BACKLIGHT DRIVING MODULE - A backlight driving module including a power converter module and a processor module is provided. The power converter module is configured to convert a first power to a second power to drive the backlight module according to a driving parameter set. The processor module is configured to provide the first power to the power converter module. One of the processor module and the power converter module determines a configuration of the backlight module by using identification information. The driving parameter set corresponds to the configuration of the backlight module. | 10-23-2014 |
Patent application number | Description | Published |
20140106698 | VARIABLE BAND PASS FILTER DEVICE - A variable filter device has: a first series arm which is serially connected to a signal line, includes a variable capacitance and an inductance, and constitutes a series resonator; first and second parallel arms, which are connected between the signal line and the ground on both sides of the first series arm, each of which includes a variable capacitance and an inductance, and constitutes a grounded series resonator. The first series arm defines the center frequency of the pass band, and the first and second parallel arms define attenuation poles sandwiching the pass band. | 04-17-2014 |
20140125897 | ELECTRIC DEVICE HAVING VARIABLE CAPACITANCE ELEMENT AND ITS MANUFACTURE - An electric device includes a dielectric substrate, a high frequency signal line formed on the surface of the dielectric substrate, a ground conductor facing the high frequency signal line through at least part of the thickness of the dielectric substrate, an upper electrode of capacitor disposed above the surface of the dielectric substrate and faces the high frequency signal line, and a liquid crystal material filled in a space defined between the high frequency signal line and the upper electrode of capacitor. | 05-08-2014 |
20140183014 | ELECTRIC EQUIPMENT HAVING MOVABLE PORTION, AND ITS MANUFACTURE - On seed metal layer of first metal, pedestal and counter electrode are formed of second metal by plating, adjacent to free space region. The free space region is filled with first sacrificial layer. By using resist pattern, second sacrificial metal layer is formed, extending from the first sacrificial layer to a portion of the pedestal, and lower structure of third metal is formed on the second sacrificial layer, by contiguous plating, exposing a portion of the pedestal not formed with the second sacrificial layer, the third metal having composition and thermal expansion coefficient equivalent to the second metal. Upper structure of fourth metal having composition and thermal expansion coefficient equivalent to the second and third metals is formed on the pedestal and the lower structure by plating. The first and second sacrificial layers are removed, leaving an electric equipment with a movable portion. | 07-03-2014 |
20160058393 | DIAGNOSTIC APPARATUS, DIAGNOSTIC METHOD, AND COMPUTER-READABLE STORAGE MEDIUM - A sensor part has sensor cells provided in a matrix arrangement on a sensor that detects a pulse within a region in which the pulse of a diagnostic target is detected, in a state in which a pressure is applied to the region through the sensor. A diagnostic apparatus acquires a distribution of a pulse waveform based on the pulse detected in a state in which the pressure is constant, determines observation positions within the region, and determines a maximum amplitude at the observation positions that are determined by increasing the pressure, based on the distribution of the pulse waveform. A digitized score of the pulse at each observation position is computed based on the pressure at a time when the pulse waveform having the maximum amplitude is obtained at each observation position. | 03-03-2016 |
Patent application number | Description | Published |
20130240348 | High Efficiency Broadband Semiconductor Nanowire Devices - Amongst the candidates for very high efficiency electronics, solid state light sources, photovoltaics, and photoelectrochemical devices, and photobiological devices are those based upon metal-nitride nanowires. Enhanced nanowire performance typically require heterostructures, quantum dots, etc which requirement that these structures are grown with relatively few defects and in a controllable reproducible manner. Additionally flexibility according to the device design requires that the nanowire at the substrate may be either InN or GaN. Methods of growing relatively defect free nanowires and associated structures for group IIIA-nitrides are presented without the requirement for foreign metal catalysts, overcoming the non-uniform growth of prior art techniques and allowing self-organizing quantum dot, quantum well and quantum dot-in-a-dot structures to be formed. Such metal-nitride nanowires and quantum structure embedded nanowires support a variety of devices including but not limited to very high efficiency electronics, solid state light sources, photovoltaics, and photoelectrochemical devices, and photobiological devices. | 09-19-2013 |
20160027961 | METHODS AND DEVICES FOR SOLID STATE NANOWIRE DEVICES - Solid state sources offers potential advantages including high brightness, electricity savings, long lifetime, and higher color rendering capability, when compared to incandescent and fluorescent light sources. To date however, many of these advantages, however, have not been borne out in providing white LED lamps for general lighting applications. The inventors have established that surface recombination through non-radiative processes results in highly inefficient electrical injection. Exploiting in-situ grown shells in combination with dot-in-a-wire LED structures to overcome this limitation through the effective lateral confinement offered by the shell the inventors have demonstrated core-shell dot-in-a-wire LEDs, with significantly improved electrical injection efficiency and output power, providing phosphor-free InGaN/GaN nanowire white LEDs operating with milliwatt output power and color rendering indices of 95-98. Additionally, the inventors demonstrate efficient UV nanowire LEDs for medical applications as well as the non-degraded growth of nanowire LEDs on amorphous substrates. | 01-28-2016 |
Patent application number | Description | Published |
20110127490 | Method of Growing Uniform Semiconductor Nanowires without Foreign Metal Catalyst and Devices Thereof - Amongst the candidates for very high efficiency solid state lights sources and full solar spectrum solar cells are devices based upon InGaN nanowires. Additionally these nanowires typically require heterostructures, quantum dots, etc which all place requirements for these structures to be grown with relatively few defects. Further manufacturing requirements demand reproducible nanowire diameter, length etc to allow these nanowires to be embedded within device structures. Additionally flexibility according to the device design requires that the nanowire at the substrate may be either InN or GaN. According to the invention a method of growing relatively defect free nanowires and associated structures for group III—nitrides is presented without the requirement for foreign metal catalysts and overcoming the non-uniform growth of prior art non-catalyst growth techniques. The technique also allows for unique dot-within-a-dot nanowire structures. | 06-02-2011 |
20110163421 | Method for Fabricating Optical Semiconductor Tubes and Devices Thereof - Semiconductor micro- and nanotubes allow the incorporation of ordered structures such as quantum wells and quantum dots into them providing the potential for ultralow threshold micro- and nanoscale lasers for use in applications such as future ultrahigh-speed photonic systems as well as quantum information processing. According to the invention a means of manufacturing these with high reproducibility, low processing complexity, and at high densities is provided. Also provided is a means of releasing these micro- and nanotubes with low stress and a method of “pick-and-place” allowing micro- and nanotubes to be exploited in devices integrated on substrates that are either incompatible with the manufacturing technique or where the area of substrate required to manufacture them is detrimental to the cost or performance of the circuit. | 07-07-2011 |
20120205613 | High Efficiency Broadband Semiconductor Nanowire Devices and Methods of Fabricating without Foreign Catalysis - Amongst the candidates for very high efficiency solid state light sources and full solar spectrum solar cells are devices based upon InGaN nanowires. Additionally these nanowires typically require heterostructures, quantum dots, etc which all place requirements for these structures to be grown with relatively few defects and in a controllable reproducible manner. Additionally flexibility according to the device design requires that the nanowire at the substrate may be either InN or GaN. According to the invention a method of growing relatively defect free nanowires and associated structures for group IIIA-nitrides is presented without the requirement for foreign metal catalysts and overcoming the non-uniform growth of prior art non-catalyst growth techniques. According to other embodiments of the invention self-organizing dot-within-a-dot nanowire and dot-within-a-dot-within-a-well nanowire structures are presented. | 08-16-2012 |
20130087890 | METHOD FOR FABRICATING OPTICAL SEMICONDUCTOR TUBES AND DEVICES THEREOF - Semiconductor micro- and nanotubes allow the incorporation of ordered structures such as quantum wells and quantum dots into them providing the potential for ultralow threshold micro- and nanoscale lasers for use in applications such as future ultrahigh-speed photonic systems as well as quantum information processing. According to the invention a means of manufacturing these with high reproducibility, low processing complexity, and at high densities is provided. Also provided is a means of releasing these micro- and nanotubes with low stress and a method of “pick-and-place” allowing micro- and nanotubes to be exploited in devices integrated on substrates that are either incompatible with the manufacturing technique or where the area of substrate required to manufacture them is detrimental to the cost or performance of the circuit. | 04-11-2013 |