Patent application number | Description | Published |
20140001596 | Sinker with a Reduced Width | 01-02-2014 |
20150021687 | SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE SEMICONDUCTOR STRUCTURE WITH DEEP TRENCH ISOLATION STRUCTURES - The density of a transistor array is increased by forming one or more deep trench isolation structures in a semiconductor material. The deep trench isolation structures laterally surround the transistors in the array. The deep trench isolation structures limit the lateral diffusion of dopants and the lateral movement of charge carriers. | 01-22-2015 |
20150097225 | TRENCH GATE TRENCH FIELD PLATE SEMI-VERTICAL SEMI-LATERAL MOSFET - A semiconductor device has a vertical drain extended MOS transistor with deep trench structures to define a vertical drift region and at least one vertical drain contact region, separated from the vertical drift region by at least one instance of the deep trench structures. Dopants are implanted into the vertical drain contact regions and the semiconductor device is annealed so that the implanted dopants diffuse proximate to a bottom of the deep trench structures. The vertical drain contact regions make electrical contact to the proximate vertical drift region at the bottom of the intervening deep trench structure. At least one gate, body region and source region are formed above the drift region at, or proximate to, a top surface of a substrate of the semiconductor device. The deep trench structures are spaced so as to form RESURF regions for the drift region. | 04-09-2015 |
20150097230 | TRENCH GATE TRENCH FIELD PLATE VERTICAL MOSFET - A semiconductor device having a vertical drain extended MOS transistor may be formed by forming deep trench structures to define vertical drift regions of the transistor, so that each vertical drift region is bounded on at least two opposite sides by the deep trench structures. The deep trench structures are spaced so as to form RESURF regions for the drift region. Trench gates are formed in trenches in the substrate over the vertical drift regions. The body regions are located in the substrate over the vertical drift regions. | 04-09-2015 |
20150097231 | VERTICAL TRENCH MOSFET DEVICE IN INTEGRATED POWER TECHNOLOGIES - A semiconductor device having a vertical drain extended MOS transistor may be formed by forming deep trench structures to define at least one vertical drift region bounded on at least two opposite sides by the deep trench structures. The deep trench structures include dielectric liners. The deep trench structures are spaced so as to form RESURF regions for the drift region. Vertical gates are formed in vertically oriented gate trenches in the dielectric liners of the deep trench structures, abutting the vertical drift regions. A body implant mask for implanting dopants for the transistor body is also used as an etch mask for forming the vertically oriented gate trenches in the dielectric liners. | 04-09-2015 |
20150118861 | CZOCHRALSKI SUBSTRATES HAVING REDUCED OXYGEN DONORS - A method of semiconductor fabrication includes providing an unpatterned lightly doped Czochralski bulk silicon substrate (LDCBS substrate) having a concentration of oxygen atoms of at least (≧) 10 | 04-30-2015 |
20150214096 | SINKER WITH A REDUCED WIDTH - The width of a heavily-doped sinker is substantially reduced by forming the heavily-doped sinker to lie in between a number of closely-spaced trench isolation structures, which have been formed in a semiconductor material. During drive-in, the closely-spaced trench isolation structures significantly limit the lateral diffusion. | 07-30-2015 |
20150270391 | SEMICONDUCTOR STRUCTURE WITH A DOPED REGION BETWEEN TWO DEEP TRENCH ISOLATION STRUCTURES - The density of a transistor array is increased by forming one or more deep trench isolation structures in a semiconductor material. The deep trench isolation structures laterally surround the transistors in the array. The deep trench isolation structures limit the lateral diffusion of dopants and the lateral movement of charge carriers. | 09-24-2015 |
20150325638 | VERTICAL TRENCH MOSFET DEVICE IN INTEGRATED POWER TECHNOLOGIES - A semiconductor device having a vertical drain extended MOS transistor may be formed by forming deep trench structures to define at least one vertical drift region bounded on at least two opposite sides by the deep trench structures. The deep trench structures include dielectric liners. The deep trench structures are spaced so as to form RESURF regions for the drift region. Vertical gates are formed in vertically oriented gate trenches in the dielectric liners of the deep trench structures, abutting the vertical drift regions. A body implant mask for implanting dopants for the transistor body is also used as an etch mask for forming the vertically oriented gate trenches in the dielectric liners. | 11-12-2015 |
20150340496 | TRANSISTOR HAVING DOUBLE ISOLATION WITH ONE FLOATING ISOLATION - A semiconductor device includes at least a first transistor including at least a second level metal layer (second metal layer) above a first level metal layer coupled by a source contact to a source region doped with a first dopant type. The second level metal layer is coupled by a drain contact to a drain region doped with the first dopant type. A gate stack is between the source region and drain region having the second level metal layer coupled by a contact thereto. The second level metal layer is coupled by a contact to a first isolation region doped with the second dopant type. The source region and drain region are within the first isolation region. A second isolation region doped with the first dopant type encloses the first isolation region, and is not coupled to the second level metal layer so that it electrically floats. | 11-26-2015 |
20150349092 | TRENCH GATE TRENCH FIELD PLATE SEMI-VERTICAL SEMI-LATERAL MOSFET - A semiconductor device has a vertical drain extended MOS transistor with deep trench structures to define a vertical drift region and at least one vertical drain contact region, separated from the vertical drift region by at least one instance of the deep trench structures. Dopants are implanted into the vertical drain contact regions and the semiconductor device is annealed so that the implanted dopants diffuse proximate to a bottom of the deep trench structures. The vertical drain contact regions make electrical contact to the proximate vertical drift region at the bottom of the intervening deep trench structure. At least one gate, body region and source region are formed above the drift region at, or proximate to, a top surface of a substrate of the semiconductor device. The deep trench structures are spaced so as to form RESURF regions for the drift region. | 12-03-2015 |
Patent application number | Description | Published |
20090137851 | Purification of glycerin obtained as a bioproduct from the transesterification of triglycerides in the synthesis of biofuel - Methods for purifying glycerin contaminated with one or more lower boiling alcohols such as methanol, ethanol, straight, branched or cyclic C3-C6 alcohols, and the like. The methods are particularly useful for purifying crude glycerin phases recovered from the synthesis of biofuels. The present invention uses distillation techniques to strip alcohol contaminants from glycerin. In contrast to conventional methods that carry out distillation either under substantially anhydrous or very wet conditions, the present invention carries out distillation in the presence of a limited amount of water, e.g., from about 0.8 to about 5 parts by weight of water per 100 parts by weight of contaminated glycerin to be purified. | 05-28-2009 |
20110060168 | IMPROVED HYDROGENATION PROCESS - The present invention provides an improved hydrogenation processes wherein heat is efficiently managed so that catalyst productivity is optimized. More particularly, in the processes of the present invention, a nonaqueous solvent is added to a reactant to provide a nonaqueous solvent/reactant mixture that can act as a heat sink and absorb at least a portion of the heat generated within the reactor. Desirably, a reaction product, or a solvent with a minimal number of hydroxyl groups, is utilized so that the formation of unwanted byproducts can be minimized. | 03-10-2011 |
20130111805 | AVIATION GASOLINE - A high octane non-leaded gasoline meeting ASTM D910 LL standard is provided that includes a base gasoline fuel having a minimum MON of 96.5 and meeting the ASTM D910 standard. An octane-boosting component is mixed with the base gasoline fuel that raises the MON above 99.6 and the blended fuel complies with ASTM D910. The octane-boosting component is selected from a group including an additive, TEL only and a TEL containing gasoline. | 05-09-2013 |
20130253237 | HIGH PERFORMANCE LIQUID ROCKET PROPELLANT - Disclosed is a high performance hydrocarbon fuel characterized by a hydrogen content greater than 14.3% by weight, a hydrogen to carbon atomic ratio greater than 2.0 and/or a heat of combustion greater than 18.7 KBtu/lb. The disclosed fuels generally have a paraffin content that is at least 90% by mass and a C | 09-26-2013 |
20140202132 | HIGH PERFORMANCE LIQUID ROCKET PROPELLANT - Disclosed is a process of fueling a rocket engine or air-breathing engine for a hypersonic vehicle with a high performance hydrocarbon fuel characterized by a hydrogen content greater than 14.3% by weight, a hydrogen to carbon atomic ratio greater than 2.0 and/or a heat of combustion greater than 18.7 KBtu/lb. The disclosed fuels generally have a paraffin content that is at least 90% by mass and a C | 07-24-2014 |
20140260510 | PENTAMETHYLHEPTANE AS A PRIMARY REFERENCE STANDARD FOR CETANE NUMBER - A composition useful as a Reference Standard for measurement of Cetane Number or for use as a standard for determining a Derived Cetane Number consists essentially of a blend of n-hexadecane and 2,2,4,6,6-pentamethylheptane. The disclosed Reference Standards can be used directly as substitutes for blends of n-hexadecane and 2,2,4,4,6,8,8-heptamethylnonane in ASTM D613-10a for determining Cetane Number, or in ASTM D6890, ASTM 07170 or ASTM D7668 to determine a Derived Cetane Number. | 09-18-2014 |
Patent application number | Description | Published |
20090057729 | SEMICONDUCTOR DEVICE AND METHODS FOR FABRICATING SAME - A semiconductor device is provided which includes a substrate including an inactive region and an active region, a gate electrode structure having portions overlying the active region, a compressive layer overlying the active region, and a tensile layer overlying the inactive region and located outside the active region. The active region has a lateral edge which defines a width of the active region, and a transverse edge which defines a length of the active region. The gate electrode structure includes: a common portion spaced apart from the active region; a plurality of gate electrode finger portions integral with the common portion, and a plurality of fillet portions integral with the common portion and the gate electrode finger portions. A portion of each gate electrode finger portion overlies the active region. The fillet portions are disposed between the common portion and the gate electrode finger portions, and do not overlie the active region. The compressive layer also overlies the gate electrode finger portions, and the tensile layer is disposed adjacent the transverse edge of the active region. | 03-05-2009 |
20100044761 | SEMICONDUCTOR DEVICE AND METHODS FOR FABRICATING SAME - A semiconductor device is provided which includes a substrate including an inactive region and an active region, a gate electrode structure having portions overlying the active region, a compressive layer overlying the active region, and a tensile layer overlying the inactive region and located outside the active region. The active region has a lateral edge which defines a width of the active region, and a transverse edge which defines a length of the active region. The gate electrode structure includes: a common portion spaced apart from the active region; a plurality of gate electrode finger portions integral with the common portion, and a plurality of fillet portions integral with the common portion and the gate electrode finger portions. A portion of each gate electrode finger portion overlies the active region. The fillet portions are disposed between the common portion and the gate electrode finger portions, and do not overlie the active region. The compressive layer also overlies the gate electrode finger portions, and the tensile layer is disposed adjacent the transverse edge of the active region. | 02-25-2010 |
20100207175 | SEMICONDUCTOR TRANSISTOR DEVICE HAVING AN ASYMMETRIC EMBEDDED STRESSOR CONFIGURATION, AND RELATED MANUFACTURING METHOD - A semiconductor transistor device is provided. The transistor device includes a layer of semiconductor material, a gate structure overlying the layer of semiconductor material, a source region in the layer of semiconductor material, and a drain region in the layer of semiconductor material. The source region has a stress-inducing semiconductor material located therein, while the drain region is free of any stress-inducing semiconductor material. This asymmetric arrangement of stress-inducing elements results in relatively high source-body leakage, and relatively low drain-body leakage, which is beneficial in analog circuit applications. | 08-19-2010 |
20100301423 | SEMICONDUCTOR DEVICES WITH IMPROVED LOCAL MATCHING AND END RESISTANCE OF RX BASED RESISTORS - Semiconductor devices are formed with reduced variability between close proximity resistors, improved end resistances, and reduced random dopant mismatch. Embodiments include ion implanting a dopant, such as B, at a relatively high dosage, e.g. about 4 to about 6 keV, and at a relatively low implant energy, e.g., about 1.5 to about 2E15/cm | 12-02-2010 |
Patent application number | Description | Published |
20090060314 | LOCKBOX IMAGING SYSTEM - A system and method for imaging and capturing information from checks and documents contained in a lockbox remittance. A computer workstation is used to generate and print a header sheet that includes information identifying the check. The header sheet is appended to the front of the documents and the document are imaged using a scanner. Identifying information from each of the documents is used to create a data record for each document. In parallel to the scanning of the documents, the checks are scanned and images are created for each of the checks. Additionally, identifying information from each of the checks (e.g., the check number, the amount, etc.) is manually input into a database, thus creating a data record for each check. Once all of the data entry and scanning has been completed, an automatic association process takes place in which the check data records, the check images, the document data records and the document images are all automatically associated and cross-referenced such that the system recreates an electronic version of the original batch of physical papers. All of the associated data and images are contained in a database, from which all of the information for a lockbox customer can be electronically retrieved over the Internet. | 03-05-2009 |
20100128324 | LOCKBOX IMAGING SYSTEM - A system and method for imaging and capturing information from checks and documents contained in a lockbox remittance. A computer workstation is used to generate and print a header sheet that includes information identifying the check. The header sheet is appended to the front of the documents and the document are imaged using a scanner. Identifying information from each of the documents is used to create a data record for each document. In parallel to the scanning of the documents, the checks are scanned and images are created for each of the checks. Additionally, identifying information from each of the checks (e.g., the check number, the amount, etc.) is manually input into a database, thus creating a data record for each check. Once all of the data entry and scanning has been completed, an automatic association process takes place in which the check data records, the check images, the document data records and the document images are all automatically associated and cross-referenced such that the system recreates an electronic version of the original batch of physical papers. All of the associated data and images are contained in a database, from which all of the information for a lockbox customer can be electronically retrieved over the Internet. | 05-27-2010 |