Patent application number | Description | Published |
20090136409 | METHOD FOR PRODUCING POLYCRYSTALLINE SILICON - The present invention provides a method for producing polycrystalline silicon. The method for producing polycrystalline silicon comprises the steps of (A), (B), and (C),
| 05-28-2009 |
20090166644 | MONOLITHIC LIGHT EMITTING DEVICE AND DRIVING METHOD THEREFOR - A monolithic light-emitting device and driving method therefore includes a plurality of light-emitting diodes, array-arranged monolithically on a single substrate. Thie light-emitting diodes include a pn junction-containing semiconductor material and a phosphor-containing layer passing light emitted from the semiconductor material, absorbing part, or whole of the light for conversion into light having a different wavelength. The array is constituted of a light-emitting diode group consisting of m (m≧2) pieces of the light-emitting diode, the light emitting diode group being constituted of N types (N≧2, providing N≦m) of light-emitting diodes, each having either one of preset N types of light-emitting spectrum patterns. An average light-emitting spectrum from the whole array can be changed by regulating a power supplied to the light-emitting diodes for each light-emitting diode group sorted according to the type of the light-emitting spectrum pattern. | 07-02-2009 |
20090320746 | METHOD FOR PRODUCING GROUP III-V COMPOUND SEMICONDUCTOR - The present invention provides a method for producing a Group III-V compound semiconductor, comprising a step of feeding a Group III raw material, a Group V raw material, a carrier gas, and if necessary, other raw materials, to a reactor to grow a Group III-V compound semiconductor on a substrate in the reactor by a metalorganic vapor phase epitaxy, wherein the Group III raw material and the Group V raw material are independently fed to the reactor, and hydrogen halide is fed to the reactor together with a raw material other than the Group V raw material, or the carrier gas. | 12-31-2009 |
20100084742 | Method for manufacturing semiconductor epitaxial crystal substrate - The present invention provides a method for manufacturing a gallium nitride semiconductor epitaxial crystal substrate with a dielectric film which has a low gate leak current and negligibly low gate lag, drain lag, and current collapse characteristics. The method for manufacturing a semiconductor epitaxial crystal substrate is a method for manufacturing a semiconductor epitaxial crystal substrate in which a dielectric layer of a nitride dielectric material or an oxide dielectric material in an amorphous form functioning as a passivation film or a gate insulator is provided on a surface of a nitride semiconductor crystal layer grown by metal organic chemical vapor deposition. In the method, after the nitride semiconductor crystal layer is grown in an epitaxial growth chamber, the dielectric layer is grown on the nitride semiconductor crystal layer in the epitaxial growth chamber. | 04-08-2010 |
20100117094 | GALLIUM NITRIDE EPITAXIAL CRYSTAL, METHOD FOR PRODUCTION THEREOF, AND FIELD EFFECT TRANSISTOR - The present invention provides a gallium nitride type epitaxial crystal, a method for producing the crystal, and a field effect transistor using the crystal. The gallium nitride type epitaxial crystal comprises a base substrate and the following (a) to (e), wherein a connection layer comprising a gallium nitride type crystal is arranged in an opening of the non-gallium nitride type insulating layer to electrically connect the first buffer layer and the p-conductive type semiconductor crystal layer. (a) a gate layer, (b) a high purity first buffer layer containing a channel layer contacting an interface on the base substrate side of the gate layer, (c) a second buffer layer arranged on the base substrate side of the first buffer layer, (d) a non-gallium nitride type insulating layer arranged on the base substrate side of the second buffer layer, and having the opening at a part thereof, and (e) a p-conductive type semiconductor crystal layer arranged on the base substrate side of the insulating layer. | 05-13-2010 |
20110012178 | SEMICONDUCTOR WAFER, METHOD OF MANUFACTURING A SEMICONDUCTOR WAFER, AND SEMICONDUCTOR DEVICE - Provided is a semiconductor wafer having decreased interface state density at the semiconductor-insulator interface, a method of manufacturing this semiconductor wafer, and a semiconductor device. | 01-20-2011 |
20110180903 | SEMICONDUCTOR SUBSTRATE, ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR SUBSTRATE - There is provided a semiconductor wafer having a base wafer, an insulating layer, and a Si | 07-28-2011 |
20110233689 | SEMICONDUCTOR DEVICE, PROCESS FOR PRODUCING SEMICONDUCTOR DEVICE, SEMICONDUCTOR SUBSTRATE, AND PROCESS FOR PRODUCING SEMICONDUCTOR SUBSTRATE - There is provided a semiconductor device that includes a III-V Group compound semiconductor having a zinc-blende-type crystal structure, an insulating material being in contact with the (111) plane of the III-V Group compound semiconductor, a plane of the III-V Group compound semiconductor equivalent to the (111) plane, or a plane that has an off angle with respect to the (111) plane or the plane equivalent to the (111) plane, and an MIS-type electrode being in contact with the insulating material and including a metal conductive material. | 09-29-2011 |
20120061730 | SEMICONDUCTOR WAFER, ELECTRONIC DEVICE, A METHOD OF PRODUCING SEMICONDUCTOR WAFER, AND METHOD OF PRODUCING ELECTRONIC DEVICE - There is provided a semiconductor wafer including a base wafer that has an impurity region in which an impurity atom has been introduced into silicon, a plurality of seed bodies provided in contact with the impurity region, and a plurality of compound semiconductors each provided in contact with the corresponding seed bodies and lattice-matched or pseudo-lattice-matched to the corresponding seed bodies. The semiconductor wafer can further include an inhibitor provided on the base wafer and in which a plurality of apertures exposing at least a part of the impurity region are provided. | 03-15-2012 |
20120074463 | SEMICONDUCTOR WAFER, PHOTOELECTRIC CONVERSION DEVICE, METHOD OF PRODUCING SEMICONDUCTOR WAFER, AND METHOD OF PRODUCING PHOTOELECTRIC CONVERSION DEVICE - Provided is a semiconductor wafer including: a base wafer containing silicon; an inhibitor that has been formed on the base wafer, has an aperture in which a surface of the base wafer is exposed, and inhibits crystal growth; and a light-absorptive structure that has been formed inside the aperture in contact with a surface of the base wafer exposed inside the aperture, where the light-absorptive structure includes a first semiconductor and a second semiconductor. | 03-29-2012 |
20120138898 | SENSOR, SEMICONDUCTOR WAFER, AND METHOD OF PRODUCING SEMICONDUCTOR WAFER - A sensor includes: a base wafer containing silicon; a seed member provided directly or indirectly on the base wafer; and a photothermal absorber that is made of a Group 3-5 compound semiconductor lattice-matching or pseudo lattice-matching the seed member and being capable of generating a carrier upon absorbing light or heat, where the photothermal absorber outputs an electric signal in response to incident light to be introduced into the photothermal absorber or heat to be applied to the photothermal absorber. A semiconductor wafer includes: a base wafer containing silicon; a seed member provided directly or indirectly on the base wafer; and a photothermal absorber that is made of a Group 3-5 compound semiconductor lattice-matching or pseudo lattice-matching the seed member and being capable of generating a carrier upon absorbing light or heat. | 06-07-2012 |
20120228673 | FIELD-EFFECT TRANSISTOR, SEMICONDUCTOR WAFER, METHOD FOR PRODUCING FIELD-EFFECT TRANSISTOR AND METHOD FOR PRODUCING SEMICONDUCTOR WAFER - Provided is a field-effect transistor including a gate insulating layer, a first semiconductor crystal layer in contact with the gate insulating layer, and a second semiconductor crystal layer lattice-matching or pseudo lattice-matching the first semiconductor crystal layer. Here, the gate insulating layer, the first semiconductor crystal layer, and the second semiconductor crystal layer are arranged in the order of the gate insulating layer, the first semiconductor crystal layer, and the second semiconductor crystal layer, the first semiconductor crystal layer is made of In | 09-13-2012 |
Patent application number | Description | Published |
20120205747 | SEMICONDUCTOR SUBSTRATE, FIELD-EFFECT TRANSISTOR, INTEGRATED CIRCUIT, AND METHOD FOR FABRICATING SEMICONDUCTOR SUBSTRATE - A semiconductor substrate includes a substrate, an insulating layer, and a semiconductor layer. The insulating layer is over and in contact with the substrate. The insulating layer includes at least one of an amorphous metal oxide and an amorphous metal nitride. The semiconductor layer is over and in contact with the insulating layer. The semiconductor layer is formed by crystal growth. | 08-16-2012 |
20130341721 | SEMICONDUCTOR WAFER, FIELD-EFFECT TRANSISTOR, METHOD OF PRODUCING SEMICONDUCTOR WAFER, AND METHOD OF PRODUCING FIELD-EFFECT TRANSISTOR - Provided is a semiconductor wafer including a base wafer, a first insulating layer, and a semiconductor layer. Here, the base wafer, the first insulating layer and the semiconductor layer are arranged in an order of the base wafer, the first insulating layer and the semiconductor layer, the first insulating layer is made of an amorphous metal oxide or an amorphous metal nitride, the semiconductor layer includes a first crystal layer and a second crystal layer, the first crystal layer and the second crystal layer are arranged in an order of the first crystal layer and the second crystal layer in such a manner that the first crystal layer is positioned closer to the base wafer, and the electron affinity E | 12-26-2013 |
20140054726 | METHOD OF PRODUCING SEMICONDUCTOR WAFER, SEMICONDUCTOR WAFER, METHOD OF PRODUCING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE - There is provided a fabrication technique of a MOS structure that has a small EOT without increasing the interface trap density. More specifically, provided is a method of producing a semiconductor wafer that includes a semiconductor crystal layer, an interlayer made of an oxide, nitride, or oxynitride of a semiconductor crystal constituting the semiconductor crystal layer, and a first insulating layer made of an oxide and in which the semiconductor crystal layer, the interlayer, and the first insulating layer are arranged in the stated order. The method includes (a) forming the first insulating layer on an original semiconductor crystal layer, and (b) exposing a surface of the first insulating layer with a nitrogen plasma to nitride, oxidize, or oxynitride a part of the original semiconductor crystal layer, thereby forming the interlayer, together with the semiconductor crystal layer that is the rest of the original semiconductor crystal layer. | 02-27-2014 |
20140091392 | SEMICONDUCTOR DEVICE, SEMICONDUCTOR WAFER, METHOD FOR PRODUCING SEMICONDUCTOR WAFER, AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE - There is provided a semiconductor device including a first channel-type first MISFET formed and a second channel-type second MISFET: a first source and a first drain of the first MISFET and a second source and a second drain of the second MISFET are made of the same conductive substance, and the work function Φ | 04-03-2014 |
20140091393 | SEMICONDUCTOR DEVICE, SEMICONDUCTOR WAFER, METHOD FOR PRODUCING SEMICONDUCTOR WAFER, AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE - There is provided a semiconductor device including: a first source and a first drain of a first-channel-type MISFET formed on a first semiconductor crystal layer, which are made of a compound having an atom constituting the first semiconductor crystal layer and a nickel atom, a compound having an atom constituting the first semiconductor crystal layer and a cobalt atom, or a compound having an atom constituting the first semiconductor crystal layer, a nickel atom, and a cobalt atom; and a second source and a second drain of a second-channel-type MISFET formed on a second semiconductor crystal layer, which are made of a compound having an atom constituting the second semiconductor crystal layer and a nickel atom, a compound having an atom constituting the second semiconductor crystal layer and a cobalt atom, or a compound having an atom constituting the second semiconductor crystal layer, a nickel atom, and a cobalt atom. | 04-03-2014 |
20140091398 | SEMICONDUCTOR DEVICE, SEMICONDUCTOR WAFER, METHOD FOR PRODUCING SEMICONDUCTOR WAFER, AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE - Provided is a semiconductor device including a first source and a first drain of a P-channel-type MISFET formed on a Ge wafer, which are made of a compound having a Ge atom and a nickel atom, a compound having a Ge atom and a cobalt atom, or a compound having a Ge atom, a nickel atom, and a cobalt atom, and a second source and a second drain of an N-channel-type MISFET formed on the Group III-V compound semiconductor, which are made of a compound having a Group III atom, a Group V atom, and a nickel atom, a compound having a Group III atom, a Group V atom, and a cobalt atom, or a compound having a Group III atom, a Group V atom, a nickel atom, and a cobalt atom. | 04-03-2014 |
20140091433 | METHOD OF PRODUCING SEMICONDUCTOR WAFER, AND SEMICONDUCTOR WAFER - There is provided a method of producing a semiconductor wafer, including: forming a compound semiconductor layer on a base wafer by epitaxial growth; cleansing a surface of the compound semiconductor layer by means of a cleansing agent containing a selenium compound; and forming an insulating layer on the surface of the compound semiconductor layer. Examples of the selenium compound include a selenium oxide. Examples of the selenium oxide include H | 04-03-2014 |
20140203408 | METHOD OF PRODUCING COMPOSITE WAFER AND COMPOSITE WAFER - There is provided a method that includes forming a sacrificial layer and the semiconductor crystal layer on a semiconductor crystal layer formation wafer in the stated order, bonding together the semiconductor crystal layer formation wafer and a transfer-destination wafer such that a first surface of the semiconductor crystal layer and a second surface of the transfer-destination wafer face each other, and splitting the transfer-destination wafer from the semiconductor crystal layer formation wafer with the semiconductor crystal layer remaining on the transfer-destination wafer side, by etching away the sacrificial layer by immersing the semiconductor crystal layer formation wafer and the transfer-destination wafer wholly or partially in an etchant. Here, the transfer-destination wafer includes an inflexible wafer and an organic material layer, and a surface of the organic material layer is the second surface. | 07-24-2014 |
20150047708 | ORGANIC-INORGANIC HYBRID PHOTOELECTRIC CONVERSION DEVICE - An organic-inorganic hybrid photoelectric conversion device comprising:
| 02-19-2015 |
Patent application number | Description | Published |
20150137317 | SEMICONDUCTOR WAFER, METHOD OF PRODUCING A SEMICONDUCTOR WAFER AND METHOD OF PRODUCING A COMPOSITE WAFER - A semiconductor wafer is provided. The semiconductor wafer comprises a sacrificial layer and a semiconductor crystal layer above a semiconductor crystal layer forming wafer, the semiconductor crystal layer forming wafer, the sacrificial layer and the semiconductor crystal layer being arranged in the order of the semiconductor crystal layer forming wafer, the sacrificial layer and the semiconductor crystal layer, wherein the semiconductor wafer comprises a diffusion inhibiting layer that inhibits diffusion of a first atom of one type selected from a plurality of types of atoms constituting the semiconductor crystal layer forming wafer or the sacrificial layer, at any cross-sectional position between (a) the interface of the semiconductor crystal layer forming wafer that faces the sacrificial layer and (b) a middle of the semiconductor crystal layer. | 05-21-2015 |
20150137318 | SEMICONDUCTOR WAFER, METHOD OF PRODUCING A SEMICONDUCTOR WAFER AND METHOD OF PRODUCING A COMPOSITE WAFER - A semiconductor wafer is provided. The semiconductor wafer comprises a sacrificial layer, a first semiconductor crystal layer, and a second semiconductor crystal layer above a semiconductor crystal layer forming wafer, wherein the semiconductor crystal layer forming wafer, the sacrificial layer, the first semiconductor crystal layer and the second semiconductor crystal layer are arranged in the order of the semiconductor crystal layer forming wafer, the sacrificial layer, the first semiconductor crystal layer and the second semiconductor crystal layer, a first atom of one type selected from a plurality of types of atoms constituting the semiconductor crystal layer forming wafer or the sacrificial layer is contained in the first semiconductor crystal layer and the second semiconductor crystal layer as an impurity, and the concentration of the first atom in the second semiconductor crystal layer is lower than the concentration of the first atom in the first semiconductor crystal layer. | 05-21-2015 |