| Patent application number | Description | Published |
|---|
| 20150035008 | FINFET DEVICES INCLUDING HIGH MOBILITY CHANNEL MATERIALS WITH MATERIALS OF GRADED COMPOSITION IN RECESSED SOURCE/DRAIN REGIONS AND METHODS OF FORMING THE SAME - A finFET device can include a high mobility semiconductor material in a fin structure that can provide a channel region for the finFET device. A source/drain recess can be adjacent to the fin structure and a graded composition epi-grown semiconductor alloy material, that includes a component of the high mobility semiconductor material, can be located in the source/drain recess. | 02-05-2015 |
| 20150035074 | FINFET DEVICES INCLUDING RECESSED SOURCE/DRAIN REGIONS HAVING OPTIMIZED DEPTHS AND METHODS OF FORMING THE SAME - A finFET device can include a source/drain contact recess having an optimal depth beyond which an incremental decrease in a spreading resistance value for a horizontal portion of a source/drain contact in the recess provided by increased depth may be less than an incremental increase in total resistance due to the increase in the vertical portion of the source/drain contact at the increased depth. | 02-05-2015 |
| 20150093868 | INTEGRATED CIRCUIT DEVICES INCLUDING FINFETS AND METHODS OF FORMING THE SAME - Integrated circuit devices including fin field-effect transistors (finFETs) and methods of forming the same are provided. The methods may include forming a fin-shaped channel region including germanium on a substrate and forming a source/drain region adjacent the channel region on the substrate. The methods may further include forming a barrier layer contacting sidewalls of the channel region and the source/drain region, and the barrier layer may include Si | 04-02-2015 |
| 20150093884 | METHODS OF FORMING SEMICONDUCTOR PATTERNS INCLUDING REDUCED DISLOCATION DEFECTS AND DEVICES FORMED USING SUCH METHODS - Methods of forming semiconductor patterns including reduced dislocation defects and devices formed using such methods are provided. The methods may include forming an oxide layer on a substrate and forming a recess in the oxide layer and the substrate. The methods may further include forming an epitaxially grown semiconductor pattern in the recess that contacts a sidewall of the substrate at an interface between the oxide layer and the substrate and defines an upper surface of a void in the recess in the substrate. | 04-02-2015 |
| 20150118829 | METHODS OF FORMING A SEMICONDUCTOR LAYER INCLUDING GERMANIUM WITH LOW DEFECTIVITY - Methods of forming a semiconductor layer including germanium with low defectivity are provided. The methods may include sequentially forming a silicate glass layer, a diffusion barrier layer including nitride and an interfacial layer including oxide on a substrate. The methods may also include forming a first semiconductor layer on the interfacial layer and converting a portion of the first semiconductor layer into a second semiconductor layer having a germanium concentration therein that is higher than a germanium concentration of the first semiconductor layer. | 04-30-2015 |
| 20150123075 | INTEGRATED CIRCUIT DEVICES INCLUDING STRAINED CHANNEL REGIONS AND METHODS OF FORMING THE SAME - Integrated circuit devices including strained channel regions and methods of forming the same are provided. The integrated circuit devices may include enhancement-mode field effect transistors. The enhancement-mode field effect transistors may include a quantum well channel region having a well thickness T | 05-07-2015 |
| 20150123215 | CRYSTALLINE MULTIPLE-NANOSHEET III-V CHANNEL FETS - A field effect transistor includes a body layer comprising a crystalline semiconductor channel region therein, and a gate stack on the channel region. The gate stack includes a crystalline semiconductor gate layer, and a crystalline semiconductor gate dielectric layer between the gate layer and the channel region. Related devices and fabrication methods are also discussed. | 05-07-2015 |
| 20150145003 | FINFET SEMICONDUCTOR DEVICES INCLUDING RECESSED SOURCE-DRAIN REGIONS ON A BOTTOM SEMICONDUCTOR LAYER AND METHODS OF FABRICATING THE SAME - FinFET semiconductor devices and methods of forming the same are provided. The finFET semiconductor devices may include an insulator layer, a bottom semiconductor layer on the insulator layer, a channel fin on the bottom semiconductor layer, a source region on the bottom semiconductor layer and adjacent a first side of the channel fin, and a drain region on the bottom semiconductor layer and adjacent a second side of the channel fin opposite the first side. | 05-28-2015 |
