Patent application number | Description | Published |
20090151770 | METHOD AND MATERIAL FOR COUPLING SOLAR CONCENTRATORS AND PHOTOVOLTAIC DEVICES - A method and system for manufacturing an integrated concentrator photovoltaic device is disclosed. In an embodiment, the invention includes a one step process using a sheet of coupling material provided in a pre-arranged pattern to couple an array of photovoltaic members to an array of respective optical concentrating members. In another embodiment, the invention includes an integrated concentrator photovoltaic device made by coupling a photovoltaic member and an optical concentrating member together through an encapsulant or coupling layer formed from a sheet member of coupling materials possessing a pre-arranged pattern | 06-18-2009 |
20090152745 | METHOD AND SYSTEM FOR MANUFACTURING INTEGRATED MOLDED CONCENTRATOR PHOTOVOLTAIC DEVICE - A method for manufacturing an integrated solar cell and concentrator. The method includes providing a first photovoltaic region and a second photovoltaic region disposed within a first mold member. A second mold member is coupled to the first mold member to form a cavity region. The cavity region forms a first concentrator region overlying a vicinity of the first photovoltaic region and a second concentrator region overlying a vicinity of the second photovoltaic region. The method includes transferring a molding compound in a fluidic state into the cavity region to fill the cavity region with the molding compound and initiating a curing process of the molding compound to form a first concentrator element and a second concentrator element overlying the respective photovoltaic regions. | 06-18-2009 |
20090266403 | SOLDER REPLACEMENT BY CONDUCTIVE TAPE MATERIAL - A method of forming a solar device. The method includes providing one or more photovoltaic cells having a front surface region and a back surface region. The method includes providing a first conductor element having a first side operably coupled to a first region of the front surface region of the one or more photovoltaic cells and a second side. In a specific embodiment, the conductor element includes a first anisotropic conducting tape material or a first conducting tape material, the first conducting element having a first thickness, a first length, and a first width. The method performs a bonding process to cause the first conductor element to conduct electric current in a first selected direction. | 10-29-2009 |
20100282316 | Solar Cell Concentrator Structure Including A Plurality of Glass Concentrator Elements With A Notch Design - A solar concentrator structure including a plurality of glass concentrator elements with a notch design. According to an embodiment, the present invention provides a solar cell concentrator structure. The structure includes an outside surface. The structure also includes an inside surface, the inside surface being substantially flat. The structure includes a first concentrator element integrally formed on the outside surface, the first concentrator element having a first curved surface, the curved surface being characterized by a radius of at least 1 mm, the curved surface having a first flat region of at least 0.25 mm, the flat region being at least 4 mm from the inside surface. The structure includes a second concentrator element integrally formed with the first concentrator element and the outside surface, the second concentrator element including a second curved surface and a second flat region. | 11-11-2010 |
20100294338 | Large Area Concentrator Lens Structure and Method - A solar module includes a substrate member, a plurality of photovoltaic strips arranged in an array configuration overlying the substrate member, and a concentrator structure comprising extruded glass material operably coupled to the plurality of photovoltaic strips. A plurality of elongated convex regions are configured within the concentrator structure. The plurality of elongated convex regions are respectively coupled to the plurality of photovoltaic strips. Each of the plurality of elongated convex regions includes a length and a convex surface region characterized by a radius of curvature, each of the elongated convex regions being configured to have a magnification ranging from about 1.5 to about 5. A coating material rendering the glass self-cleaning overlies the plurality of elongated convex regions. | 11-25-2010 |
20110186107 | SYSTEM AND MODULE FOR SOLAR MODULE WITH INTEGRATED GLASS CONCENTRATOR - A solar module includes a photovoltaic region having an elongated shape. At least one bus bar pad overlies portions of the photovoltaic region. The solar module includes an electrically conductive region configured along a periphery region of the photovoltaic region to expose an interior surface region of the photovoltaic strip. A finger structure configured to conduct electrical current generated in the photovoltaic regions overlies the electrically conductive region. | 08-04-2011 |
20110240096 | LARGE AREA CONCENTRATOR LENS STRUCTURE AND METHOD CONFIGURED FOR STRESS RELIEF - A solar module. The solar module includes a substrate member. a plurality of photovoltaic strips arranged in an array configuration overlying the substrate member. In a specific embodiment, the solar module includes a concentrator structure comprising extruded glass material operably coupled to the plurality of photovoltaic strips. A plurality of elongated annular regions are configured within the concentrator structure. The plurality of elongated annular regions are respectively coupled to the plurality of photovoltaic strips, which are configured to one or more bus bars to maintain a desired stress range. | 10-06-2011 |
20120067398 | SYSTEM AND METHOD FOR LAMINATING PHOTOVOLTAIC STRUCTURES - A method for forming a laminated photovoltaic structure includes providing a sheet of transparent material having light concentrating features, disposing adhesive material adjacent to the sheet of transparent material, disposing photovoltaic strips adjacent to the adhesive material, wherein the photovoltaic strips are positioned relative to the sheet of transparent material in response to exitant light characteristics of the light concentrating features, wherein photovoltaic strips are coupled via associated bus bars, wherein gap regions are located between bus bars of neighboring photovoltaic strips, disposing a rigid layer of material adjacent to the photovoltaic strips to form a composite photovoltaic structure; and thereafter laminating the composite photovoltaic structure to fill the gap regions with adhesive material and to form the laminated photovoltaic structure, wherein adhesive material adheres to the bus bars. | 03-22-2012 |
20120167946 | HIGH IMPACT AND LOAD BEARING SOLAR GLASS FOR A CONCENTRATED LARGE AREA SOLAR MODULE AND METHOD - A solar module device. The device has a substrate having a surface region. The device has one or more photovoltaic regions overlying the surface region of the substrate. In a preferred embodiment, each of the photovoltaic strips is derived from dicing a solar cell in to each of the strips. Each of the strips is a functional solar cell. The device also has an impact resistant glass member having a plurality of elongated concentrating elements spatially arranged in parallel configuration and operably coupled respectively to the plurality of elongated concentrating elements. Preferably, the impact resistant glass has a strength of at least 3× greater than a soda lime glass, e.g., conventional soda lime glass for conventional solar cells, e.g., a low iron soda lime glass. In a preferred embodiment, the impact resistant glass member comprises a planar region and a concentrator region comprising the plurality of elongated concentrating element spatially arranged in parallel configuration. | 07-05-2012 |
20120295388 | LARGE AREA CONCENTRATOR LENS STRUCTURE AND METHOD - A solar module includes a substrate member, a plurality of photovoltaic strips arranged in an array configuration overlying the substrate member, and a concentrator structure comprising extruded glass material operably coupled to the plurality of photovoltaic strips. A plurality of elongated convex regions are configured within the concentrator structure. The plurality of elongated convex regions are respectively coupled to the plurality of photovoltaic strips. Each of the plurality of elongated convex regions includes a length and a convex surface region characterized by a radius of curvature, each of the elongated convex regions being configured to have a magnification ranging from about 1.5 to about 5. A coating material rendering the glass self-cleaning overlies the plurality of elongated convex regions. | 11-22-2012 |
20130192661 | LARGE AREA CONCENTRATOR LENS STRUCTURE AND METHOD - A solar module includes a substrate member, a plurality of photovoltaic strips arranged in an array configuration overlying the substrate member, and a concentrator structure comprising extruded glass material operably coupled to the plurality of photovoltaic strips. A plurality of elongated convex regions are configured within the concentrator structure. The plurality of elongated convex regions are respectively coupled to the plurality of photovoltaic strips. Each of the plurality of elongated convex regions includes a length and a convex surface region characterized by a radius of curvature, each of the elongated convex regions being configured to have a magnification ranging from about 1.5 to about 5. A coating material rendering the glass self-cleaning overlies the plurality of elongated convex regions. | 08-01-2013 |
Patent application number | Description | Published |
20120185752 | DRAM ADDRESS PROTECTION - In one embodiment, a system includes a memory, and a memory controller coupled to the memory via an address bus, a data bus, and an error code bus. The memory stores data at an address and stores an error code at the address. The error code is generated based on a function of the corresponding data and address. | 07-19-2012 |
20130097608 | Processor With Efficient Work Queuing - Work submitted to a co-processor enters through one of multiple input queues, used to provide various quality of service levels. In-memory linked-lists store work to be performed by a network services processor in response to lack of processing resources in the network services processor. The work is moved back from the in-memory inked-lists to the network services processor in response to availability of processing resources in the network services processor. | 04-18-2013 |
20130103909 | SYSTEM AND METHOD TO PROVIDE NON-COHERENT ACCESS TO A COHERENT MEMORY SYSTEM - In one embodiment, a system comprises a memory and a memory controller that provides a cache access path to the memory and a bypass-cache access path to the memory, receives requests to read graph data from the memory on the bypass-cache access path and receives requests to read non-graph data from the memory on the cache access path. A method comprises receiving a request at a memory controller to read graph data from a memory on a bypass-cache access path, receiving a request at the memory controller to read non-graph data from the memory through a cache access path, and arbitrating, in the memory controller, among the requests using arbitration. | 04-25-2013 |
20140372709 | System and Method to Provide Non-Coherent Access to a Coherent Memory System - In one embodiment, a system comprises a memory and a memory controller that provides a cache access path to the memory and a bypass-cache access path to the memory, receives requests to read graph data from the memory on the bypass-cache access path and receives requests to read non-graph data from the memory on the cache access path. A method comprises receiving a request at a memory controller to read graph data from a memory on a bypass-cache access path, receiving a request at the memory controller to read non-graph data from the memory through a cache access path, and arbitrating, in the memory controller, among the requests using arbitration. | 12-18-2014 |
Patent application number | Description | Published |
20090055569 | Bridge device with page-access based processor interface - An integrated circuit bridge device can include a first interface circuit coupled to a buffer circuit and configurable in response to configuration information to receive command information, address information, and data values on a same multi-bit input/output (I/O) bus. A second interface circuit can be coupled to the buffer circuit and configured to communicate according to a first communication protocol different from that executable by the first interface circuit. In addition, a controller circuit formed in the same substrate as the first and second interface circuits can be configured to enable data transfers between the third interface circuit and the first interface circuits via the buffer circuit. | 02-26-2009 |
20100228908 | MULTI-PORT MEMORY DEVICES AND METHODS - An integrated circuit device may include a first integrated circuit (IC) portion having a single memory port to access at least one memory array, the single port including a first set of address, control and data paths; and a second IC portion comprising at least a first memory port and a second memory port for providing access to the memory locations of the first IC portion through the single port of the first IC portion. | 09-09-2010 |
20100228926 | MULTI-PORT MEMORY DEVICES AND METHODS - An integrated circuit device may include a first integrated circuit (IC) portion having a single memory port to access at least one memory array, the single port including a first set of address, control and data paths; and a second IC portion comprising at least a first memory port and a second memory port for providing access to the memory locations of the first IC portion through the single port of the first IC portion. | 09-09-2010 |
20100293325 | MEMORY DEVICES AND SYSTEMS INCLUDING MULTI-SPEED ACCESS OF MEMORY MODULES - A system, comprising: a plurality of modules, each module comprising a plurality of integrated circuits devices coupled to a module bus and a channel interface that communicates with a memory controller, at least a first module having a portion of its total module address space composed of first type memory cells having a first maximum access speed, and at least a second module having a portion of its total module address space composed of second type memory cells having a second maximum access speed slower than the first access speed. | 11-18-2010 |
20100312952 | Multiprocessor System Having an Input/Output (I/O) Bridge Circuit for Transferring Data Between Volatile and Non-Volatile Memory - A disclosed circuit includes circuitry for coupling to a volatile memory, circuitry for coupling to a nonvolatile NAND flash memory, and circuitry that: (i) receives a volatile memory request from a processor and satisfies the volatile memory request by accessing the volatile memory, and (ii) receives a nonvolatile NOR flash memory read request from the processor and satisfies the NOR read request by accessing both the NAND flash memory and the volatile memory. The circuit may also include circuitry that receives a volatile memory request from another processor and satisfies the volatile memory request from the other processor by accessing the volatile memory, and circuitry that receives a NAND flash memory read request from the other processor and satisfies the NAND read request by accessing the NAND flash memory. Multiprocessor systems including the circuit are described, as is a method for satisfying a NOR flash memory read request. | 12-09-2010 |
20120008378 | MEMORY DEVICES AND METHODS HAVING MULTIPLE ADDRESS ACCESSES IN SAME CYCLE - A memory device can include a plurality of banks, each bank including memory locations accessible by different access circuits; at least a first address port configured to receive addresses on falling and rising edges of a timing clock, each address corresponding to locations in different banks; and at least two read/write data ports configured to receive write data for storage in one of the banks, and output read data from one of the banks. | 01-12-2012 |
20120243301 | MEMORY DEVICES AND METHODS FOR HIGH RANDOM TRANSACTION RATE - A memory device can include a plurality of double data rate data (DDR) ports, each configured to receive write data and output read data on a same set of data lines independently and concurrently in synchronism with at least a first clock signal; an address port configured to receive address values on consecutive, different transitions of a second clock, each address value corresponding to an access on a different one of the data ports; and a memory array section comprising a plurality of banks, each bank providing pipelined access to storage locations therein. | 09-27-2012 |
20120290782 | Block Mapping Circuit and Method for Memory Device - A method of mapping logical block select signals to physical blocks can include receiving at least one signal for each of n+1 logical blocks, where n is an integer greater than one, that each map to one of m+1 physical blocks, where n11-15-2012 | |
20130223165 | MEMORY DEVICES AND METHODS FOR HIGH RANDOM TRANSACTION RATE - A memory device can include a random access memory array configured to store data values; a plurality of bi-directional ports, configured to transfer data values into and out of the memory device on rising and falling transitions of at least one access clock signal; and at least one address bus configured to receive at least a portion of address values to random access locations on rising and falling transitions a timing clock signal having the same frequency as the access clock signal. | 08-29-2013 |
20140281200 | MEMORY DEVICES AND SYSTEMS INCLUDING MULTI-SPEED ACCESS OF MEMORY MODULES - A system, comprising: a plurality of modules, each module comprising a plurality of integrated circuits devices coupled to a module bus and a channel interface that communicates with a memory controller, at least a first module having a portion of its total module address space composed of first type memory cells having a first maximum access speed, and at least a second module having a portion of its total module address space composed of second type memory cells having a second maximum access speed slower than the first access speed. | 09-18-2014 |
20140293717 | MEMORY DEVICES AND METHODS FOR HIGH RANDOM TRANSACTION RATE - A memory device can include a random access memory array configured to store data values; a plurality of bi-directional ports, configured to transfer data values into and out of the memory device on rising and falling transitions of at least one access clock signal; and at least one address bus configured to receive at least a portion of address values to random access locations on rising and falling transitions a timing clock signal having the same frequency as the access clock signal. | 10-02-2014 |
20150117091 | MULTI-CHANNEL, MULTI-BANK MEMORY WITH WIDE DATA INPUT/OUTPUT - An integrated circuit (IC) can include M memory banks, where M is greater than 2, and each memory bank is separately accessible according to a received address value; N channels, where N is greater than 2, and each channel includes its own a data connections, address connections, and control input connections for executing a read or write access to one of the memory banks in synchronism with a clock signal; and a controller subsystem configured to control accesses between the channels and the memory banks, including up to an access on every channel on consecutive cycles of the clock signal. | 04-30-2015 |
20150117092 | MULTI-CHANNEL PHYSICAL INTERFACES AND METHODS FOR STATIC RANDOM ACCESS MEMORY DEVICES - An integrated circuit (IC) device can include a static random access memory (SRAM) section comprising a plurality of memory banks; and an interface comprising physical connections for more than eight memory channels, the connections for each memory channel including an address section including connections for SRAM control inputs and a complete address to access the memory banks, and a data section including data inputs and outputs (data IOs) to transfer data for one memory bank. | 04-30-2015 |
Patent application number | Description | Published |
20110282839 | METHODS AND SYSTEMS FOR BACKING UP A SEARCH INDEX IN A MULTI-TENANT DATABASE ENVIRONMENT - An index to be backed up in a multitenant environment is identified. The multitenant environment includes data for multiple client entities, each identified by a tenant identifier (ID) having one of one or more users associated with the tenant ID. Users of each of multiple client identities can only access data identified by a tenant ID associated with the respective client entity. The multitenant environment is a hosted database provided by an entity separate from the client entities, and provides on-demand database service to the client entities. A staged copy of the index to be backed up is created. The staged copy of the index is segmented. The segments are uploaded to a pre-selected location. | 11-17-2011 |
20130054583 | PERSONALIZING SCOPING AND ORDERING OF OBJECT TYPES FOR SEARCH - A method of establishing personalized limits on a search responsive to a key word query in an enterprise search system is described that includes receiving an object types access history for a particular user. Applying this method, the object types access history includes records of object types selected from search results returning multiple object types and records of object types selected via interfaces other than search results. The method continues with determining and storing in computer readable memory a personalized scope of object types. The personalized scope of object types sets a limit on object types initially returned by an enterprise search system for the particular user in response to key word queries by the particular user that do not specify object types to search. | 02-28-2013 |
20130132861 | SOCIAL MEDIA DASHBOARDS - Disclosed are systems, apparatus, methods and computer-readable media for providing a social media dashboard. In some implementations, web browser data including a social media dashboard and a webpage are provided. In some instances, the social media dashboard is a user interface displayed in association with a webpage on a device. In some other instances, the social media dashboard includes one or more user selectable mechanisms configured to cause an action to interact with an information feed associated with a user profile in an online social network. In some instances, the presentation of the social media dashboard is updated, independent of the presentation of the web page, to include information indicating a record update. | 05-23-2013 |
20130254312 | COMPUTER IMPLEMENTED METHODS AND APPARATUS FOR FINDING PEOPLE IN A PHYSICAL ENVIRONMENT - Disclosed are methods, apparatus, systems, and computer readable storage media for finding people in a physical environment. A server receives data indicating a location and identifies events corresponding to the location. Event data is transmitted to a computing device. Attendees at a selected event are identified and transmitted to the computing device. The server can receive a message addressed to an attendee and store data regarding the attendee. In some implementations, attendees may be identified from content posted on a social network. Additionally, certain attendees or events may be emphasized. | 09-26-2013 |
20140250082 | METHODS AND SYSTEMS FOR BACKING UP A SEARCH INDEX - An index to be backed up in a computing environment is identified. A staged copy of the index to be backed up is created. The staged copy of the index is segmented. The segments are uploaded to a pre-selected location. | 09-04-2014 |
20140310272 | PERSONALIZING SCOPING AND ORDERING OF OBJECT TYPES FOR SEARCH - A method of establishing personalized limits on a search responsive to a key word query in an enterprise search system is described that includes receiving an object types access history for a particular user. Applying this method, the object types access history includes records of object types selected from search results returning multiple object types and records of object types selected via interfaces other than search results. The method continues with determining and storing in computer readable memory a personalized scope of object types. The personalized scope of object types sets a limit on object types initially returned by an enterprise search system for the particular user in response to key word queries by the particular user that do not specify object types to search. | 10-16-2014 |
Patent application number | Description | Published |
20090070638 | METHOD AND SYSTEM FOR EXCEPTION DETECTING AND ALERTING - Methods and system for exception detecting and alerting are described. An exception indicating an occurrence of an error in an application and a path to the exception in an application space may be received. The received exception may be compared to a stored exception in a prior version of an exception data structure to determine whether the received exception is a new exception. The exception data structure may include a plurality of stored exceptions. The results of the comparison may be provided. | 03-12-2009 |
20090070733 | METHOD AND SYSTEM FOR PROBLEM NOTIFICATION AND PROCESSING - A notification of a problem associated with an application may be received. A difference may be determined between a problem version of the application and an operational version of the application to identify a change associated with the problem. A person associated with the change may be determined. A task of resolving the problem may be assigned to the person associated with the change. A person may be notified of the problem and of the assigning of the task based on the identified change. A modification may be performed to resolve the problem associated with the change based on the determining of the difference. | 03-12-2009 |
20110055640 | METHOD AND SYSTEM FOR EXCEPTION DETECTING AND ALERTING - Methods and system for exception detecting and alerting are described. An exception indicating an occurrence of an error in an application and a path to the exception in an application space may be received. The received exception may be compared to a stored exception in a prior version of an exception data structure to determine whether the received exception is a new exception. The exception data structure may include a plurality of stored exceptions. The results of the comparison may be provided. | 03-03-2011 |
20130219375 | METHOD AND SYSTEM FOR PROBLEM NOTIFICATION AND PROCESSING - A notification of a problem associated with an application may be received. A difference may be determined between a problem version of the application and an operational version of the application to identify a change associated with the problem. A person associated with the change may be determined. A task of resolving the problem may be assigned to the person associated with the change. A person may be notified of the problem and of the assigning of the task based on the identified change. A modification may be performed to resolve the problem associated with the change based on the determining of the difference. | 08-22-2013 |
20150154063 | METHOD AND SYSTEM FOR EXCEPTION DETECTING AND ALERTING - Methods and system for exception detecting and alerting are described. An exception indicating an occurrence of an error in an application and a path to the exception in an application space may be received. The received exception may be compared to a stored exception in a prior version of an exception data structure to determine whether the received exception is a new exception. The exception data structure may include a plurality of stored exceptions. The results of the comparison may be provided. | 06-04-2015 |
Patent application number | Description | Published |
20120056653 | DIGITAL PHASE-LOCKED LOOP - Apparatus, systems and methods are provided for digital phase-locked loops. A digital phase-locked loop comprises an oscillator module configured to generate an output signal and a phase detection module coupled to the oscillator module. The phase detection module is configured to signal the oscillator module to adjust a frequency of the output signal by a first amount when a phase difference between a reference signal and the output signal is less than a threshold amount, and signal the oscillator module to adjust the frequency by a greater amount when the phase difference is greater than the threshold amount. | 03-08-2012 |
20120086482 | VOLTAGE-CONTROLLED OSCILLATOR MODULE HAVING ADJUSTABLE OSCILLATOR GAIN AND RELATED OPERATING METHODS - Apparatus and methods are provided for oscillators having adjustable gain. An exemplary oscillator module comprises a first node for a first voltage, a control node for a control signal, and oscillator circuitry coupled to the first node and the control node. The oscillator circuitry generates an output signal with a first oscillation frequency based on the first voltage, and in response to the control signal being asserted, the oscillator circuitry generates the output signal with a second oscillation frequency based on the first voltage. The second oscillation frequency is greater than the first oscillation frequency. | 04-12-2012 |
20140177693 | INFLUENCE CLOCK DATA RECOVERY SETTLING POINT BY APPLYING DECISION FEEDBACK EQUALIZATION TO A CROSSING SAMPLE - An apparatus including a receiver coupled to receive an input signal from a communication link and operable to employ decision feedback equalization to the input signal of the communication link and generate an edge sample signal. The apparatus also includes a timing recovery module coupled to the receiver and operable to receive the edge sample signal and use the edge sample signal to generate a data sampling phase signal, wherein the edge sample signal influences a settling point of the data sampling phase signal. | 06-26-2014 |
20140341268 | SAMPLER CIRCUIT FOR A DECISION FEEDBACK EQUALIZER AND METHOD OF USE THREOF - A sampler circuit for a decision feedback equalizer and a method of use thereof. One embodiment of the sampler circuit includes: (1) a first sampler portion including a series-coupled first master regeneration latch and first slave latch, (2) a second sampler portion including a series-coupled second master regeneration latch and second slave latch, and (3) a first feedback circuit coupled to a first node between the first master regeneration latch and the first slave latch and operable to provide a feedback signal to the second master regeneration latch to cause a bias charge to be built up therefor. | 11-20-2014 |
Patent application number | Description | Published |
20160103559 | GRAPHICAL USER INTERFACE FOR STATIC AND ADAPTIVE THRESHOLDS - Techniques are disclosed for providing a graphical user interface (GUI) for displaying and configuring adaptive or static thresholds for Key Performance Indicators (KPIs). The GUI may include one or more presentation schedules that may display threshold information associated with time policies. Each presentation schedule may include multiple time slots and span a portion of one or more time cycles. Some of the time slots may be associated with a specific time policy and may have a unifying appearance that distinguishes the time slots from timeslots associated with other time policies. The presentation schedules may arrange the time slots in a time grid arrangement (e.g., calendar grid view) or a graph arrangement with depictions (e.g., points, lines) that may illustrate KPI values and threshold markers that may illustrate the threshold values. | 04-14-2016 |
20160103862 | IDENTIFYING EVENTS USING INFORMATIONAL FIELDS - A computer system determines if events in a machine data store satisfy event selection criteria. The events may pertain to a service entity represented by a stored entity definition. The entity definition may include information to identify the events from the machine data. Other informational fields in the entity definition may be effectively attributed to the identified events and take part in satisfying the event selection criteria. | 04-14-2016 |
20160104076 | ADAPTIVE KEY PERFORMANCE INDICATOR THRESHOLDS - Techniques are disclosed for providing adaptive thresholding technology for Key Performance Indicators (KPIs). Adaptive thresholding technology may automatically assign new values or adjust existing values for one or more thresholds of one or more time policies. Assigning threshold values using adaptive thresholding may involve identifying training data (e.g., historical data, simulated data, or example data) for the time frames and analyzing the training data to identify variations within the data (e.g., patterns, distributions, trends). A threshold value may be determined based on the variations and may be assigned to one or more of the thresholds without additional user intervention. | 04-14-2016 |