Patent application number | Description | Published |
20110169139 | CHIP PACKAGE AND FABRICATION METHOD THEREOF - A chip package and a fabrication method thereof are provided. The chip package includes a semiconductor substrate, having a first surface and an opposite second surface. A through hole is formed on the first surface, extending from the first surface to the second surface. A conductive trace layer is formed on the first surface and in the through hole. A buffer plug is formed in the through hole and a protection layer is formed over the first surface and in the through hole. | 07-14-2011 |
20110169159 | CHIP PACKAGE AND FABRICATION METHOD THEREOF - A chip package and a fabrication method thereof are provided. The chip package includes a semiconductor substrate, having a first surface and an opposing second surface. A spacer is disposed under the second surface of the semiconductor substrate and a cover plate is disposed under the spacer. A recessed portion is formed adjacent to a sidewall of the semiconductor substrate, extending from the first surface of the semiconductor substrate to at least the spacer. Then, a protection layer is disposed over the first surface of the semiconductor substrate and in the recessed portion. | 07-14-2011 |
20120056226 | CHIP PACKAGE - An embodiment of the invention provides a chip package which includes: a substrate having a first surface and a second surface; an optoelectronic device disposed at the first surface; a protection layer disposed on the second surface of the substrate, wherein the protection layer has an opening; a conducting bump disposed on the second surface of the substrate and filled in the opening; a conducting layer disposed between the protection layer and the substrate, wherein the conducting layer electrically connects the optoelectronic device to the conducting bump; and a light shielding layer disposed on the protection layer, wherein the light shielding layer does not contact with the conducting bump. | 03-08-2012 |
20120181672 | CHIP PACKAGE AND METHOD FOR FORMING THE SAME - An embodiment of the invention provides a chip package which includes a substrate having a first surface and a second surface; a conducting pad structure located on the first surface; a dielectric layer located on the first surface of the substrate and the conducting pad structure, wherein the dielectric layer has an opening exposing a portion of the conducting pad structure; and a cap layer located on the dielectric layer and filled into the opening. | 07-19-2012 |
20120193786 | CHIP PACKAGE AND METHOD FOR FORMING THE SAME - An embodiment of the invention provides a chip package which includes: a substrate; a device region disposed in or on the substrate; a signal pad disposed in or on the substrate and electrically connected to the device region; a ground pad disposed in or on the substrate; a signal bump disposed on a surface of the substrate, wherein the signal bump is electrically connected to the signal pad through a signal conducting layer; a ground conducting layer disposed on the surface of the substrate and electrically connected to the ground pad; and a protection layer disposed on the surface of the substrate, wherein the protection layer completely covers the entire side terminals of the signal conducting layer and partially covers the ground conducting layer such that a side terminal of the ground conducting layer is exposed on a side of the substrate. | 08-02-2012 |
20120205799 | CHIP PACKAGE AND FABRICATION METHOD THEREOF - A chip package is disclosed. The package includes a semiconductor chip having a first surface and a second surface opposite thereto, at least one conductive pad adjacent to the first surface, and an opening extending toward the first surface from the second surface to expose the conductive pad. The caliber adjacent to the first surface is greater than that of the opening adjacent to the second surface. An insulating layer and a redistribution layer (RDL) are successively disposed on the second surface and extend to a sidewall and a bottom of the opening, in which the RDL is electrically connected to the conductive pad through the opening. A passivation layer covers the RDL and partially fills the opening to form a void between the passivation layer and the conductive pad in the opening. A fabrication method of the chip package is also disclosed. | 08-16-2012 |
20120292744 | CHIP PACKAGE, METHOD FOR FORMING THE SAME, AND PACKAGE WAFER - An embodiment of the invention provides a chip package which includes: a substrate, wherein the substrate is diced from a wafer; a device region formed in the substrate; a conducting layer disposed on the substrate and electrically connected to the device region; an insulating layer disposed between the substrate and the conducting layer; and a material layer formed on the insulating layer, wherein the material layer has a recognition mark, and the recognition mark shows position information of the substrate in the wafer before the substrate is diced from the wafer. | 11-22-2012 |
20140231966 | CHIP PACKAGE AND METHOD FOR FORMING THE SAME - An embodiment of the invention provides a chip package which includes a substrate having a first surface and a second surface; a conducting pad structure located on the first surface; a dielectric layer located on the first surface of the substrate and the conducting pad structure, wherein the dielectric layer has an opening exposing a portion of the conducting pad structure; and a cap layer located on the dielectric layer and filled into the opening. | 08-21-2014 |
20140312478 | CHIP PACKAGE AND MANUFACTURING METHOD THEREOF - A chip package is provided. The chip package comprises a semiconductor chip, an isolation layer, a redistributing metal layer, and a bonding pad. The semiconductor chip has a first conducting pad disposed on a lower surface, and a first hole corresponding to the first conducting pad. The first hole and the isolation layer extend from an upper surface to the lower surface to expose the first conducting pad. The redistributing metal layer is disposed on the isolation layer and has a redistributing metal line corresponding to the first conducting pad, the redistributing metal line is connected to the first conducting pad through the opening. The bonding pad is disposed on the isolation layer and one side of the semiconductor chip, wherein the redistributing metal line extends to the bonding pad to electrically connect the first conducting pad to the bonding pad. A method thereof is also provided. | 10-23-2014 |
20140312482 | WAFER LEVEL ARRAY OF CHIPS AND METHOD THEREOF - A wafer level array of chips is provided. The wafer level array of chips comprises a semiconductor wafer, and a least one extending-line protection. The semiconductor wafer has at least two chips, which are arranged adjacent to each other, and a carrier layer. Each chip has an upper surface and a lower surface, and comprises at least one device. The device is disposed upon the upper surface, covered by the carrier layer. The extending-line protection is disposed under the carrier layer and between those two chips. The thickness of the extending-line protection is less than that of the chip. Wherein the extending-line protection has at least one extending-line therein. In addition, a chip package fabricated by the wafer level array of chips, and a method thereof are also provided. | 10-23-2014 |
20150035143 | CHIP PACKAGE AND FABRICATION METHOD THEREOF - A chip package is disclosed. The package includes a semiconductor chip having a first surface and a second surface opposite thereto, at least one conductive pad adjacent to the first surface, and an opening extending toward the first surface from the second surface to expose the conductive pad. The caliber adjacent to the first surface is greater than that of the opening adjacent to the second surface. An insulating layer and a redistribution layer (RDL) are successively disposed on the second surface and extend to a sidewall and a bottom of the opening, in which the RDL is electrically connected to the conductive pad through the opening. A passivation layer covers the RDL and partially fills the opening to form a void between the passivation layer and the conductive pad in the opening. A fabrication method of the chip package is also disclosed. | 02-05-2015 |
20150041995 | CHIP PACKAGE AND FABRICATION METHOD THEREOF - A fabrication method of a chip package includes the following steps. A wafer structure having a wafer and a protection layer is provided. The first opening of the wafer is aligned with and communicated with the second opening of the protection layer. A first insulating layer having a first thickness is formed on a conductive pad exposed from the second opening, and a second insulating layer having a second thickness is formed on a first sidewall of the protection layer surrounding the second opening and a second sidewall of the wafer surrounding the first opening. The first and second insulating layers are etched, such that the first insulating layer is completely removed, and the second thickness of the second insulating layer is reduced. | 02-12-2015 |
20150054002 | SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF - A manufacturing method of a semiconductor structure includes the following steps. A patterned photoresist layer is formed on a wafer of the wafer structure. The wafer is etched, such that channels are formed in the wafer, and a protection layer of the wafer structure is exposed through the channels. The protection layer is etched, such that openings aligned with the channels are formed in the protection layer. Landing pads in the protection layer are respectively exposed through the openings and the channels, and the caliber of each of the openings is gradually increased toward the corresponding channel. Side surfaces of the wafer surrounding the channels are etched, such that the channels are expanded to respectively form hollow regions. The caliber of the hollow region is gradually decreased toward the opening, and the caliber of the opening is smaller than that of the hollow region. | 02-26-2015 |
20150061102 | ELECTRONIC DEVICE PACKAGE AND FABRICATION METHOD THEREOF - An electronic device package and fabrication method thereof is provided. First, a semiconductor substrate is provided and the upper surface of it is etched to from recesses. A first isolation layer is formed on the upper surface and the sidewalls of the recesses. A conductive part is formed to fulfill the recesses and a conductive pad is formed on the first isolation layer to connect the conductive part. An electronic device is combined with the semiconductor substrate on the supper surface, wherein the electronic device has a connecting pad electrically connected to the conductive pad. The semiconductor substrate is thinned form its lower surface to expose the conductive part. A second isolation layer is formed below the lower surface and has an opening to expose the conductive part. A redistribution metal line is formed below the second isolation layer and in the opening to electrically connect to the conductive part. | 03-05-2015 |
20150097286 | CHIP PACKAGE AND METHOD FOR FABRICATING THE SAME - A chip package includes a packaging substrate, a semiconductor chip, and a plurality of conductive structures. The semiconductor chip has a central region and an edge region that surrounds the central region. The conductive structures are between the packaging substrate and the semiconductor chip. The conductive structures have different heights, and the heights of the conductive structures are gradually increased from the central region of the semiconductor chip to the edge region of the semiconductor chip, such that a distance between the edge region of the semiconductor chip and the packaging substrate is greater than a distance between the central region of the semiconductor chip and the packaging substrate. | 04-09-2015 |
Patent application number | Description | Published |
20100144354 | HOST APPARATUS, MOBILE STATION, SERVING BASE STATION, TARGET BASE STATION, AND COMMUNICATION METHOD THEREOF FOR USE IN A WIRELESS NETWORK - A host apparatus, a mobile station, a serving base station, a target base station, and a communication method thereof for use in a wireless network are provided. The wireless network comprises at least one mobile station, the host apparatus, a serving base station, and a target base station. The at least one mobile station and the host apparatus belongs to a same handover group, and receive a handover request signal from the serving base station. The host apparatus transmits a handover confirmation signal to the serving base station so that the at least one mobile station and the host device of the handover group handover to the target base station. Thereby, the at least one mobile station can be handed over to the target base station without need to transmit the handover confirmation signal, so as to save the bandwidth of the wireless network. | 06-10-2010 |
20110128944 | FEMTO ACCESS POINT AND COMMUNICATION METHOD THEREOF - A femto access point (FAP) for use in a network system and a communication method for the femto access point are provided. A mobile station is wirelessly connected to the FAP. The FAP comprises a storage unit, a sniffer unit, and a process unit. The sniffer unit sniffs a packet of the mobile station. The process unit retrieves an identity (ID) code of the mobile station from the packet and stores the ID code into the storage unit. The process unit further establishes an uplink local area network (LAN) service flow and a downlink LAN service flow of the mobile station. The uplink LAN service flow and the downlink LAN service flow established by the FAP and the mobile station are used to transfer packets within the LAN. | 06-02-2011 |
20110128945 | ANCHOR GATEWAY, COMMUNICATION METHOD AND TANGIBLE MACHINE-READABLE MEDIUM THEREOF - An anchor gateway, a communication method and a tangible machine-readable medium are provided. The anchor gateway is for use in a WiMAX network comprising an authentication gateway and a serving base station (BS). After a mobile station (MS) enters the WiMAX network, the anchor gateway will request the authentication gateway and the serving BS according to an identification of the MS to respectively provide authentication key context and medium access control context. Thereby, the network latency, which is made by the MS in handover, will be reduced effectively. | 06-02-2011 |
20120115460 | BASE STATION, FEMTOCELL AND HANDOVER MONITORING METHOD THEREOF - A base station, a femtocell, and a handover monitoring method thereof are provided. A wireless network system comprises a server, a mobile device, the base station, and the femtocell. The base station transmits a monitoring signal to the femtocell after it obtains a piece of information corresponding to the mobile device from the server. The femtocell keeps detecting whether a signal is transmitted by the mobile device after it receives the monitoring signal. The femtocell transmits a response signal corresponding to the monitoring signal to the base station after it detects the signal transmitted by the mobile device. The base station transmits a handover signal to the mobile device after it receives the response signal so that the mobile device handovers from the base station to the femtocell. A handover monitoring from the base station to the femtocell for the mobile device is provided by the hand monitoring method. | 05-10-2012 |
Patent application number | Description | Published |
20100285332 | Aluminum-scandium alloy film applied to vehicle lamps and manufacturing method thereof - An aluminum-scandium (Al—Sc) alloy film applied to vehicle lamps and a manufacturing method thereof are revealed. The Al—Sc alloy film contains a trace of scandium so that both temperature for grain refinement and temperature for recrystallization of the film are increased. This results in a fine and smooth surface of the Al—Sc alloy film and the Al—Sc alloy film has better optical reflectivity. Moreover, the Al—Sc alloy film has high recrystallization temperature and high adhesion strength. After high temperature annealing treatment, the Al—Sc alloy film still has higher corrosion resistance. | 11-11-2010 |
20100300886 | CONTINUOUS MICRO ANODE GUIDED ELECTROPLATING DEVICE AND METHOD THEREOF - A continuous micro anode guided electroplating device and a method thereof are revealed. By real-time image monitoring and capillary action of the micro/nanoscale tube, a three-dimensional microstructure is deposited on a workpiece at the cathode. The deposit is growing smoothly under the real-time image monitoring. Moreover, the workpiece is not immersed in an electrolyte so that contaminations of the workpiece caused by electrolyte are reduced. | 12-02-2010 |
20110253524 | Aluminum-scandium alloy film applied to vehicle lamps and manufacturing method thereof - An aluminum-scandium (Al—Sc) alloy film applied to vehicle lamps and a manufacturing method thereof are revealed. The Al—Sc alloy film contains a trace of scandium so that both temperature for grain refinement and temperature for recrystallization of the film are increased. This results in a fine and smooth surface of the Al—Sc alloy film and the Al—Sc alloy film has better optical reflectivity. Moreover, the Al—Sc alloy film has high recrystallization temperature and high adhesion strength. After high temperature annealing treatment, the Al—Sc alloy film still has higher corrosion resistance. | 10-20-2011 |
20120279862 | CONTINUOUS MICRO ANODE GUIDED ELECTROPLATING DEVICE AND METHOD THEREOF - A continuous micro anode guided electroplating device and a method thereof are revealed. By real-time image monitoring and capillary action of the micro/nanoscale tube, a three-dimensional microstructure is deposited on a workpiece at the cathode. The deposit is growing smoothly under the real-time image monitoring. Moreover, the workpiece is not immersed in an electrolyte so that contaminations of the workpiece caused by electrolyte are reduced. | 11-08-2012 |
20150037694 | PREPARATION METHOD OF ELECTROLYTES FOR SOLID OXIDE FUEL CELLS - The preparation method of electrolytes provided by the present invention includes a first solid oxide powder and a second solid oxide powder, both of which are prepared by using a sol-gel process and a calcination process. Each of the first and second solid oxide powders is a Perovskite-type oxide. After the first and second solid oxide powders are readily mixed, they are compressed into a pellet and then sintered to prepare the afore-mentioned electrolytes for SOFC. It is found in the present invention that by mixing and compressing different solid oxide powders, the solid oxide powder having smaller particle size can fill into the gaps of the other solid oxide powder. After the pellet is sintered, the density of the product is significantly improved. | 02-05-2015 |
Patent application number | Description | Published |
20110205342 | ELECTRICALLY-DRIVEN LIQUID CRYSTAL LENS AND STEREOSCOPIC DISPLAY USING THE SAME - An electrically-driven liquid crystal lens is disclosed. The electrically-driven liquid crystal lens being partitioned into a lens region and a non-lens region includes: a first and a second substrates disposed opposite to each other; a protrusion formed on the first substrate corresponding to the lens region, a first electrode formed on the first substrate and the protrusion for guiding electrical fields to increase the focus of the lens, and a second electrode formed on the non-lens region of the second substrate; a liquid crystal layer provided between the first electrode and the second electrode. A stereoscopic display using the electrically-driven liquid crystal lens is also disclosed. | 08-25-2011 |
20110242011 | TOUCH INPUT DEVICE - A touch input device includes a substrate and a plurality of touch-sensing strips. The substrate has a flat surface. The touch-sensing strips are all disposed side by side on the flat surface. Each touch-sensing strip includes a plurality of sensing electrodes electrically connected to one another in series. Each sensing electrode has a top surface, and the areas of the top surfaces in at least two sensing electrodes of each touch-sensing strip are not equal to each other. | 10-06-2011 |
20130120250 | GESTURE RECOGNITION SYSTEM AND METHOD - The present invention provides a gesture recognition system and method which utilizes an open gesture and a close gesture made by a user's hand in simulating a releasing operation and a pressing operation of a mouse. In the present invention, the coordinate of the user's hand is unlikely to shift or change when simulating a mouse click. The present invention can solve the problem of the hand coordinate that is shift when simulating the mouse click in convention skills. | 05-16-2013 |
20130229397 | Display Apparatus for Capturing Images and Operation Method Thereof - The present invention provides a display apparatus for capturing images. The display apparatus includes a first substrate, a pixel array disposed on the first substrate, a thin film transistor array disposed in the pixel array and a photodetector array disposed in the pixel array. The pixel array includes a plurality of sub-pixels. The thin film transistor array controls image data transferred to the pixel array. When a light illuminates a sub-pixel of the pixel array, a photodetector corresponding to the sub-pixel of the photodetector array generates a leakage current in response to a gray-level of the light. | 09-05-2013 |
Patent application number | Description | Published |
20120297523 | Auxiliary Structure for Facilitating Removal of a Body Covering - An auxiliary structure for facilitating removal of a body covering comprises a plurality of plates being movably connected, each plate having an inner surface to serve as a wearing portion for a body part (such as a hand) and having an outer surface, capable of attaching to an inner surface of a body covering (such as a glove), to serve as an engaging portion, so that the auxiliary structure can be fitted into the body covering and inserted by the body part, whereby one portion of the body covering would not be contacted with the body part, and the body covering can be easily removed from the body part by simultaneously holding the body covering and the auxiliary structure and applying a removing force to them. | 11-29-2012 |
20130008929 | Auxiliary Structure for Ease of Removing Coverings - An auxiliary structure for ease of removing coverings is provided with a wearing portion that can be inserted with a body part of human (such as a hand), and an engaging portion that can be engaged with an inner surface of a covering (such as a glove); whereby, in operation, one portion of the covering will not contact with the body part of human, the covering can be easily removed from the body part of human by holding the covering and the auxiliary structure simultaneously and applying a removing force. | 01-10-2013 |
20130012960 | SURGICAL SUTURE CUTTING DEVICE - The surgical suture cutting device contains a body having two bulging sections extended from a front end of the body, forming a notch in between. A knife is wrapped inside the body whose blade is exposed in the notch. With the blade and the bulging sections, the surgical suture cutting device can be operated with a single hand to perform both tissue pressing and suture cutting. In addition, since the blade is protected in the notch, the patient will not be mistakenly wounded. The bulging sections also provide comfortable tissue pressing. Therefore, the surgical suture cutting device greatly enhances the efficiency of the subcutaneous stitching-up operation. A simple knife wrapped in the body also allows simple and inexpensive production. | 01-10-2013 |