Patent application number | Description | Published |
20130062783 | CHIP PACKAGING STRUCTURE AND MANUFACTURING METHOD FOR THE SAME - A chip packaging structure and a manufacturing method for the same are provided. The chip packaging structure includes a first chip, a second chip and a transfer component. The first chip has a plurality of first bonding pads formed on the top surface of the first chip. The second chip has a plurality of second bonding pads formed on the top surface of the second chip. The first chip and the second chip are arranged abreast and electrically connected to each other. The transfer component is disposed on the top surface of the first chip and electrically connected with the first chip. Via these arrangements, the chip packaging structure can have smaller dimensions. | 03-14-2013 |
20130065363 | METHOD FOR MANUFACTURING A CHIP PACKAGING STRUCTURE - A method for manufacturing a chip packaging structure is disclosed. The manufacturing method includes steps of: providing a protection layer; forming a conductive trace layer on the protection layer; forming an adhesion layer on the conductive trace layer; placing a chip on the adhesion layer; and electrically connecting the chip to the conductive trace layer. Via these arrangements, the chip packaging structure made by the manufacturing method can have a smaller thickness. | 03-14-2013 |
20130120947 | ELECTRICAL DEVICE WITH CONNECTION INTERFACE, CIRCUIT BOARD THEREOF, AND METHOD FOR MANUFACTURING THE SAME - The present invention discloses an electrical device with a connection interface, a circuit board thereof, and a method for manufacturing the same. The electrical device with a connection interface includes: a circuit board on which a first circuit layer and a second circuit layer are formed and the second circuit layer has plural terminal pads, wherein a cavity is formed in the terminal pads and extends to the first circuit layer, and a metal layer is disposed in the cavity and connected to the first circuit layer and the terminal pads and defines an opening; a semiconductor chip electrically connected to the first circuit layer; and a conductive element interlaid in the opening. The electrical device with a connection interface does not need to be formed by assembling a terminal module because the conductive element is directly mounted on the circuit board. | 05-16-2013 |
20150228596 | SEMICONDUCTOR PACKAGING STRUCTURE AND MANUFACTURING METHOD FOR THE SAME - A semiconductor packaging structure and a manufacturing method for the same are disclosed. The semiconductor packaging structure includes a chip, a dielectric layer and a plurality of redistribution circuit layers. The chip has a plurality of connection pads. The dielectric layer is disposed on the chip and defined with a plurality of containers therein. The connection pads are exposed from the containers, respectively. The redistribution circuit layers are disposed within the containers and electrically connected with the connection pads, respectively. Via these arrangements, the bonding surfaces between the redistribution circuit layers and the dielectric layer can be increased. | 08-13-2015 |