Lim, MY
Ai Ying Lim, Nibong Tebal MY
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20100291883 | METHOD AND APPARATUS FOR ACTIVATING AN EMERGENCY BUTTON IN A PORTABLE RADIO - The application discloses a method and apparatus for activating an emergency button on a portable radio. The emergency button is located on a portion of the portable radio that can be hit against a substantially hard surface by a user to transmit an emergency alert signal. Activation of the alert can further include pressing a push-to-talk (PTT) switch in conjunction with hitting the portion of the portable radio having the emergency button. | 11-18-2010 |
Boon Huat Lim, Muar MY
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20130285249 | SEMICONDUCTOR DEVICE AND METHOD OF PACKAGING A SEMICONDUCTOR DEVICE WITH A CLIP - A method and apparatus of packaging a semiconductor device with a clip is disclosed. The clip defines a first contact region and a second contact region on a same face of the at least one clip. The chip defines a first face, and a second face opposite to the first face, the first contact region being attached to the first face of the chip and the second contact region being located within a same plane with the second face of the clip. | 10-31-2013 |
Boon Huat Lim, Johor MY
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20110121461 | SEMICONDUCTOR DEVICE AND METHOD OF PACKAGING A SEMICONDUCTOR DEVICE WITH A CLIP - A method and apparatus of packaging a semiconductor device with a clip is disclosed. The clip defines a first contact region and a second contact region on a same face of the at least one clip. The chip defines a first face, and a second face opposite to the first face, the first contact region being attached to the first face of the chip and the second contact region being located within a same plane with the second face of the clip. | 05-26-2011 |
Boon Kian Lim, Melacca MY
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20100227436 | METHOD OF FABRICATING A SEMICONDUCTOR PACKAGE WITH MOLD LOCK OPENING - A method of fabricating a semiconductor package. In one embodiment the method includes forming a mold cavity about a portion of a first major surface of a leadframe, including about a mold lock opening extending through the leadframe between the first major surface and a second major surface. A spacer is inserted to fill at least a portion of the mold lock opening. The mold cavity is filled with an encapsulating material including filling a portion of the mold lock opening not occupied by the spacer. | 09-09-2010 |
Boon Ping Lim, Selangor MY
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20120198060 | NETWORK DELAY ESTIMATION APPARATUS AND A NETWORK DELAY ESTIMATION METHOD - A network delay estimation apparatus capable of creating a metric tree with high accuracy and in a short time. Network delay estimation apparatus ( | 08-02-2012 |
20130215789 | COMMUNICATION TERMINAL AND CLUSTER MONITORING METHOD - It is an object to provide a communication terminal capable of determining a cluster formation so as to promptly perform addition of a participant terminal, while maintaining the quality of a stream relay path. Cluster monitoring terminal ( | 08-22-2013 |
Boon Ping Lim, Kuala Lumpur MY
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20110064079 | COMMUNICATION CHANNEL BUILDING DEVICE AND N-TREE BUILDING METHOD - Disclosed is a communication channel building device which can guarantee a fair bandwidth allocation and exhibit a preferable perception AV quality in an ALM application. A transfer table building controller ( | 03-17-2011 |
Boon Ping Lim, Puchong MY
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20110002333 | TERMINAL AND N-TREE CONSTRUCTING METHOD - A terminal apparatus is provided that minimizes traffic congestion by reducing end-to-end delay and maximizes the bandwidth available in shared N-tree ALM nodes. In this terminal apparatus, an optimal stream path information table ( | 01-06-2011 |
Chan Jin Lim, Pontian MY
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20100064838 | RESERVOIR TANK FOR HYDRAULIC BRAKE LEVER ASSEMBLY - Described herein is a hydraulic brake lever assembly that includes a clamp member that includes a handle bar opening, a housing extending outwardly from the clamp member, and a lever pivotally connected to the clamp member. The housing includes a cylinder defined therein that includes a master piston. The clamp member and the housing cooperate to define a reservoir having a first portion and a second portion. The first portion is substantially located in the housing and extends substantially parallel to the cylinder and the second portion is substantially located in the clamp member between the handle bar opening and the lever. | 03-18-2010 |
Chee Chian Lim, Alor Gajah Melaka MY
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20090001609 | Semiconductor Device and Method of Assembly - An encapsulated leadless semiconductor package comprises a first semiconductor die and a second semiconductor die which are electrically connected by a bond wire. The lower surface of the first semiconductor die and the lower surface of the second semiconductor die are essentially coplanar with the lower surface of the encapsulation material. | 01-01-2009 |
20090008756 | Multi-Chip Electronic Package with Reduced Stress - An electronic component includes lead fingers and a die paddle. A tape pad is mounted below the lead fingers and the die paddle. A first semiconductor chip is bonded onto the tape pad by a layer of first adhesive and a second semiconductor chip is bonded onto the die paddle by a layer of second adhesive. Electrical contacts are disposed between the contact areas of the semiconductors chips and the lead fingers. An encapsulating compound covers part of the lead fingers, the tape pad, the semiconductor chips and the electrical contacts. | 01-08-2009 |
20090250807 | Electronic Component and Method for its Production - An electronic component includes a number of leads and at least one cooling element. The bottom surface of the cooling element is exposed and the material of the cooling element is different from the material of the leads. At least one semiconductor chip is provided on the cooling element. An encapsulation compound covers at least part of the leads, at least part of the semiconductor chip(s), and at least part of the cooling element(s). | 10-08-2009 |
20090321961 | Method of Packaging a Die - A method of attaching a die to a substrate is disclosed. A major surface of the die has an array of electrical contacts, and is covered with a tape segment having an array of apertures in register with the contacts. Solder balls are inserted into the apertures. The die is positioned against a substrate with the solder balls in register with the die pads on the surface of the substrate, and a heat treatment process is performed to bond the conductive elements to the corresponding bond pads. | 12-31-2009 |
20110261542 | DIE PACKAGE - In an embodiment, a die package may be provided. The die package may include at least one first height adjusting structure, the at least one first height adjusting structure may include a first adjusting height relative to a common plane; at least one second height adjusting structure may be positioned adjacent to the at least one first height adjusting structure, the at least one second height adjusting structure may include a second adjusting height relative to the common plane; wherein the second adjusting height may be different from the first adjusting height relative to the common plane; a first die may be positioned on the at least one first height adjusting structure; and a mold housing substantially surrounding the at least one first height adjusting structure, the at least one second height adjusting structure and the first die. | 10-27-2011 |
20140015134 | Method of Packaging a Die - A method of attaching a die to a substrate is disclosed. A major surface of the die has an array of electrical contacts, and is covered with a tape segment having an array of apertures in register with the contacts. Solder balls are inserted into the apertures. The die is positioned against a substrate with the solder balls in register with the die pads on the surface of the substrate, and a heat treatment process is performed to bond the conductive elements to the corresponding bond pads. | 01-16-2014 |
Chee Peng Lim, Ipoh MY
Patent application number | Description | Published |
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20100291883 | METHOD AND APPARATUS FOR ACTIVATING AN EMERGENCY BUTTON IN A PORTABLE RADIO - The application discloses a method and apparatus for activating an emergency button on a portable radio. The emergency button is located on a portion of the portable radio that can be hit against a substantially hard surface by a user to transmit an emergency alert signal. Activation of the alert can further include pressing a push-to-talk (PTT) switch in conjunction with hitting the portion of the portable radio having the emergency button. | 11-18-2010 |
Chi Choy Lim, Sungai Ara MY
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20140151360 | HEATER ASSEMBLY FOR DISK PROCESSING SYSTEM - A heater assembly for a disk processing system including a heater element configured to heat a substrate carried by a holder, and a heater cover having an aperture to expose the heater element to the substrate. The cover may be metal to thermally couple the heater to a cooling plate. The cover may have an outer surface having a thermal barrier surrounding the aperture to thermally insulate the holder. | 06-05-2014 |
Chooi Pei Lim, Bayan Lepas MY
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20120169362 | MULTI-LAYER DISTRIBUTED NETWORK - Apparatuses and processes for distributing signals in an integrated circuit are disclosed. An embodiment to use a custom layer together with a base layer on an integrated circuit for testing the integrated circuit includes having a structured network on the base layer. The custom layer connects the network to logic elements on the integrated circuit. The network may be evenly distributed across the base layer of the integrated circuit. Even distribution of the network may reduce skew of the test signals. Buffers are also placed along the structured network. The buffers may be placed to ensure a deterministic test signals distribution. Unused buffers in the base layer may be tied off to reduce current leakage. | 07-05-2012 |
20120228760 | SYSTEMS INCLUDING AN I/O STACK AND METHODS FOR FABRICATING SUCH SYSTEMS - Systems including an input/output (I/O) stack and methods for fabricating such systems are described. In one implementation, the methods include stacking an I/O die including I/O elements and excluding a logic element. Also in one implementation, the methods further include stacking an integrated circuit die with respect to the I/O die. The integrated circuit includes logic elements and excludes an I/O element. The separation of the I/O die from the integrated circuit die provides various benefits, such as independent development of each of the dies and more space for the I/O elements on an I/O substrate of the I/O die compared to that in a conventional die. The increase in space allows new process generation of the integrated circuit die in which an increasing number of logic elements are fitted within the same surface area of a substrate of the integrated circuit die. | 09-13-2012 |
Dennis Keat Jeen Lim, Gelugor MY
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20140354423 | METHOD AND APPARATUS FOR LOCATING A PERSON DURING A MAN-DOWN SITUATION - A method and apparatus for more-quickly locating an individual during a man-down situation is provided herein. During operation a light source on an officer's vehicle will be directed towards the downed officer when a man-down situation has been identified. Since a light source will be pointed at the downed individual, respondents responding to the man-down situation may more-quickly locate any downed individual. | 12-04-2014 |
Eng Hock Lim, Selangor Darul Ehsan MY
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20110122036 | LIGHT TRANSMISSIBLE RESONATORS FOR CIRCUIT AND ANTENNA APPLICATIONS - Provided is a circuit for an electronic device having a non-planar transparent resonator. The transparent resonator is mounted on said circuit so as to at least partially occupy a footprint of another component of the circuit. The transparent resonator forms part of a light pathway on said circuit for transmitting light to or from said another component. Also provided is a transparent dielectric resonator antenna (DRA) for optical applications. Since the DRA is transparent, it can let light pass through itself and, thus, the light can be utilized by an optical part of a system or device. The transparent DRA can be placed on top of a solar cell. Since the DRA does not block the light, the light can reach the solar cell panel and power can be generated for the system or device. The system or device so obtained is very compact because no extra footprint is needed within the system or device for the DRA. It finds application in compact wireless applications that need a self-sustaining power device. | 05-26-2011 |
20130249757 | LIGHT TRANSMISSABLE RESONATORS FOR CIRCUIT AND ANTENNA APPLICATIONS - Provided is a circuit for an electronic device having a non-planar transparent resonator. The transparent resonator is mounted on said circuit so as to at least partially occupy a footprint of another component of the circuit. The transparent resonator forms part of a light pathway on said circuit for transmitting light to or from said another component. Also provided is a transparent dielectric resonator antenna (DRA) for optical applications. Since the DRA is transparent, it can let light pass through itself and, thus, the light can be utilized by an optical part of a system or device. The transparent DRA can be placed on top of a solar cell. Since the DRA does not block the light, the light can reach the solar cell panel and power can be generated for the system or device. The system or device so obtained is very compact because no extra footprint is needed within the system or device for the DRA. It finds application in compact wireless applications that need a self-sustaining power device. | 09-26-2013 |
Eng Hock Lim, Kapar MY
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20110260936 | SOLAR ENERGY COLLECTION ANTENNAS - The subject disclosure relates to solar energy collection and use in communications systems and to enhancements thereof. In an aspect, dual function antennas are disclosed that can simultaneously function as an antenna and as a solar energy collection system. In further aspects, disclosed embodiments can focus incident solar radiation to increase output voltage of conventional solar cells. Measured and simulated results demonstrate various aspects of the subject disclosure. | 10-27-2011 |
20110260937 | SOLAR ENERGY COLLECTION ANTENNAS - The subject disclosure relates to solar energy collection and use in communications systems and to enhancements thereof. In an aspect, dual function antennas are disclosed that can simultaneously function as an antenna and as a solar energy collection system. In further aspects, disclosed embodiments can focus incident solar radiation to increase output voltage of conventional solar cells. Measured and simulated results demonstrate various aspects of the subject disclosure. | 10-27-2011 |
20130234898 | AESTHETIC DIELECTRIC ANTENNA AND METHOD OF DISCRETELY EMITTING RADIATION PATTERN USING SAME - An aesthetic dielectric antenna (e.g., a dielectric resonator antenna) includes an aesthetically shaped decoration having at least one dielectric with a dielectric constant of more than one. A waveguide, feedline, probe or other means of excitation is electronically coupled to the dielectric to emit a radiation pattern for carrying analog or digital information. | 09-12-2013 |
20140176375 | SOLAR ENERGY COLLECTION ANTENNAS - The subject disclosure relates to solar energy collection and use in communications systems and to enhancements thereof. In an aspect, dual function antennas are disclosed that can simultaneously function as an antenna and as a solar energy collection system. In further aspects, disclosed embodiments can focus incident solar radiation to increase output voltage of conventional solar cells. Measured and simulated results demonstrate various aspects of the subject disclosure. | 06-26-2014 |
Fang L. Lim, Selangor MY
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20080310317 | Information Acquisition - A method of acquiring network information from a network is disclosed. The network comprises an end terminal and a target terminal and installed on the end terminal is (a) a plurality of applications; and (b) mediation means arranged in operation to mediate between the plurality of applications and the target terminal. The method comprises: (i) receiving at the mediation means a query from one of the plurality of applications, the query requesting network information from a target terminal; (ii) operating the mediation means to: check if there is an existing connection to the target terminal; in the absence of an existing connection, establish a new connection between the mediation means and the target terminal; and acquire the requested network information over the new connection. | 12-18-2008 |
Fong Lim, Ayer Keroh MY
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20090230519 | Semiconductor Device - This application relates to a semiconductor device comprising: a carrier comprising a chip island and at least one first external contact element; only one semiconductor chip, wherein the semiconductor chip comprises a first electrode on a first surface and a second electrode on a second surface opposite to the first surface and wherein the first electrode is attached to the chip island; and a metal structure comprising a plate region attached to the second electrode and a connection region attached to the at least one first external contact element, wherein the plate region extends laterally beyond the edges of at least two sides of the second surface of the semiconductor chip. | 09-17-2009 |
20090315172 | Semiconductor chip assembly - A semiconductor chip assembly includes a semiconductor chip and a pyrolytic graphite element that is an electrode that is electrically connected to and provides electrical conduction of current from the chip during operation of the chip. | 12-24-2009 |
Fui Yee Lim, Bandar Sri Damasara MY
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20140231980 | SEMICONDUCTOR GRID ARRAY PACKAGE - A semiconductor grid array package has a first housing member with a cavity that has a cavity floor and cavity walls. A semiconductor die is affixed to the cavity floor. A second housing member is molded to the first housing member and covers an interface surface of the die. Electrically conductive runners are mounted to an external surface of the second housing member. The runners have a wire contacting area and an external connector contacting area. Bond wires are selectively bonded to the external connection pads of the semiconductor die and selectively connected to the wire contacting area of the runners. External electrical connectors are mounted to a designated external connector contacting area. | 08-21-2014 |
Hai-Wah Lim, Bayan Lepas MY
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20140237815 | STIFFENER FRAME FIXTURE - Methods and apparatus for coupling a stiffener frame to a circuit board are disclosed. In one aspect, an apparatus for engaging a stiffener frame and a circuit board positioned in a fixture is provided. The stiffener frame includes an edge. The apparatus includes an alignment plate that has a shoulder to engage the edge of the stiffener frame. The alignment plate includes a first opening with a peripheral wall to restrain movement of a circuit board relative to the stiffener frame. | 08-28-2014 |
Henry Lee Teck Lim, Pulau Pinang MY
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20090006708 | PROPORTIONAL CONTROL OF PCI EXPRESS PLATFORMS - A system may comprise M data lanes where M is an integer greater than 1, a plurality of PCIe devices, and a PCIe lane controller. Each device may be coupled to corresponding ones of a plurality of PCIe endpoints. The PCIe lane controller may automatically distribute N data lanes to a first of the plurality of PCIe endpoints, and may distribute M minus N data lanes to a remaining plurality of endpoints, where N is an integer. | 01-01-2009 |
Huoyhuoy Lim, Petani Kedah MY
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20140367928 | HANDHELD MACHINE TOOL - A handheld machine tool having an output shaft on which a tool holding fixture is developed, which has a multi-faced inner receptacle and a multi-faced outer receptacle, the multi-faced inner receptacle to connect to a tool insert, which can be locked using a locking device assigned to the tool holding fixture; the locking device having a locking sleeve which is displaceable for unlocking the tool insert against a spring force applied by an associated spring element in an axial direction facing away from the handheld machine tool, from a locking to an unlocking position, the locking sleeve has an operating element and a holding element connected to each other via a threaded connection, the holding element driven by the associated spring element in the direction of the locking position of the locking sleeve and the operating element enables displacement of the locking sleeve from the locking to the unlocking position. | 12-18-2014 |
Jew Yeok Lim, Selangor MY
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20080312342 | Process for the Production of Diacylglycerol - The present invention provides a process for producing a diacylglycerol, which comprises, reacting triacylglycerol with water and an enzyme preparation to obtain a mixture comprising of diacylglycerol, monoacylglycerol and free fatty acid; removing water content in the mixture by way of dehydration; and separating monoacylglycerol, free fatty acid and residual triacylglycerol by at least one separation method to obtain a high-purity diacylglycerol. An oil or fat composition comprising of diacylglycerol obtained from the said process and phytosteryl esters and/or ferulic acid esters in an amount of from 0.5% to 25% by weight of diacylglycerol is also provided. | 12-18-2008 |
Kean Meng Lim, Sungai Petani MY
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20130187820 | MULTI-BAND, WIDE-BAND ANTENNAS - Disclosed herein are various exemplary embodiments of multi-band, wide- band antennas. In exemplary embodiments, the antenna generally includes an upper portion and a lower portion. The upper portion includes two or more upper radiating elements and one or more slots disposed between the two or more upper radiating elements. The lower portion includes three or more lower radiating elements and one or more slots disposed between the three or more lower radiating elements. A gap is between the upper and lower portions such that the upper radiating elements are separated and spaced apart from the lower radiating elements. The antenna may be configured such that coupling of the gap and the upper and lower radiating elements enable multi-band, wide-band operation of the antenna within at least a first frequency range and a second frequency range, with the upper radiating elements operable as a radiating portion of the antenna, the lower radiating elements operable as a ground portion, and the gap operable for impedance matching. | 07-25-2013 |
20140111397 | MULTIBAND ANTENNA ASSEMBLIES INCLUDING HELICAL AND LINEAR RADIATING ELEMENTS - Disclosed are exemplary embodiments of multiband antenna assemblies, which generally include helical and linear radiating elements. In an exemplary embodiment, a multiband antenna assembly may generally include at least one helical radiator having a longitudinal axis. At least one linear radiator is aligned with and/or disposed at least partially along the longitudinal axis of the at least one helical radiator. The antenna assembly is resonant in at least three frequency bands. | 04-24-2014 |
Ken Beng Lim, Bayan Lepas MY
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20110221048 | Package Having Spaced Apart Heat Sink - An integrated circuit (IC) package that includes a lead frame, and a die affixed to a first surface of a pad of the lead frame. The die is wire bonded to the lead frame. The package includes a heat sink spaced apart from a second surface of the pad, where the second surface opposes the first surface. Molding compound encapsulates the lead frame and the die. The molding compound is disposed between the heat sink and the second surface of the pad and is enabled access between the heat sink and the second surface through protruding features disposed on the heat sink, the second surface, and/or some combination of the two. | 09-15-2011 |
Ken Fei Lim, Taman Rasah Jaya MY
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20120313231 | METHOD AND APPARATUS FOR DICING DIE ATTACH FILM ON A SEMICONDUCTOR WAFER - In one aspect of the present invention, a method of sawing a semiconductor wafer will be described. A semiconductor wafer is positioned in a wafer sawing apparatus that includes a sawing blade and a movable support structure that physically supports the semiconductor wafer. The semiconductor wafer is coupled with the support structure with various layers, including a die attach film, an adhesive and a base film. The die attach film is cut with the sawing blade. During the cutting operation, a contact portion of the sawing blade engages one of the layers and moves at least partly in one direction. While the contact portion of the sawing blade engages the layer, the support structure moves in the opposite direction. Various aspects of the present invention relate to arrangements and a wafer sawing apparatus that involve the aforementioned sawing method. | 12-13-2012 |
Kevin Len-Li Lim, Pulau Pinang MY
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20150035754 | SENSOR, CLOCK FREQUENCY ADJUSTING SYSTEM AND METHOD THEREOF - A clock frequency adjusting system is disclosed. The clock frequency adjusting system includes a sensing clock generating unit, a frequency-dividing unit and a controller. The frequency-dividing unit makes frequency of the sensing clock signal be divided by a frequency-dividing modulus and then outputs a clock calibration signal. The controller includes a period counter and a frequency adjusting unit. The period counter samples the clock calibration signal through the external clock signal so as to acquire a second count value. The frequency adjusting unit calculates a frequency difference data between the clock calibration signal and the predetermined clock signal according to the first count value and the second count value, and determines a number of adjustment according to the frequency difference data and a step adjusting frequency so as to output a clock adjusting signal to the sensing clock unit to adjust frequency of the sensing clock signal. | 02-05-2015 |
Kie Woon Lim, Simpang Ampat MY
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20110320742 | METHOD, APPARATUS AND SYSTEM FOR GENERATING ACCESS INFORMATION FROM AN LRU TRACKING LIST - Techniques for generating access information indicating a least recently used (LRU) memory region in a set of memory regions. In an embodiment, data is stored in an entry of an LRU tracking list (LTL) based on a touch message indicating when a memory group has been touched—e.g. read from, written to and/or associated with a memory region. The data stored in an LTL entry may include an identifier of a memory group and/or validity data specifying whether that LTL entry stores a set of default data. In another embodiment, access information may be generated based on the memory group identifier and the validity data. | 12-29-2011 |
20130054856 | Providing Adaptive Bandwidth Allocation For A Fixed Priority Arbiter - In one embodiment, the present invention includes a method for receiving requests from requestors in an arbiter, detecting that none of the requestors have a qualified request for at least one cycle of an arbitration round, and preventing a grant count reload of grant counters associated with the when at least one of the requestors has available grants for the arbitration round. Other embodiments are described and claimed. | 02-28-2013 |
Kim Lye Lim, Jelutong MY
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20090078859 | Photodetector with Embedded Infrared Filter - A photodetector and method for making the same are disclosed. The photodetector includes a photodetector die mounted on a substrate, an infrared filter, and an encapsulating layer. The infrared filter is positioned over the photodetector, the infrared filter blocking light in an infrared region of the optical spectrum while allowing light in a visible region of the optical spectrum to reach the photodetector die. The encapsulating layer surrounds the photodetector and the substrate, the infrared filter being embedded in the encapsulating layer, which is transparent to light in the visible region. | 03-26-2009 |
Kok Thay Lim, Kuala Lumpur MY
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20120232519 | Glucagon pump controller - According to a first aspect of the present invention there is provided a controller for controlling a glucagon pump. The controller comprises an input | 09-13-2012 |
Kuang Leng Lim, Klang MY
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20100229282 | Powder-Free Anti-Blocking Coated Glove - Provided herein are powder-free elastomeric articles exhibiting therapeutic properties, and anti-blocking properties. Also provided herein are methods for the manufacture of such articles that are substantially free from interfering materials, as well as packaging means for maintaining therapeutic efficacy. | 09-16-2010 |
20100233223 | Powder-Free Antimicrobial Coated Glove - Provided herein are powder-free elastomeric articles exhibiting good antimicrobial and anti-blocking properties. Also provided herein are methods for the manufacture of such articles substantially free from antimicrobial interfering materials, as well as packaging means for maintaining antimicrobial efficacy. | 09-16-2010 |
Lawrence Siau Tian Lim, Sungai Pinang MY
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20120246799 | ELASTOMERIC RUBBER AND RUBBER PRODUCTS WITHOUT THE USE OF VULCANIZING ACCELERATORS AND SULFUR - A composition for producing an elastomeric thin film comprising a carboxylated acrylonitrile polybutadiene latex which is vulcanized without the use of conventional sulphur and accelerators thereby reducing the possibility of contacting immediate Type I hypersensitivity and delay Type IV hypersensitivity caused by the presence of natural rubber latex proteins and accelerators respectively. The dipping process for making gloves by using a latex composition provided by: premixing carboxylated acrylonitrile polybutadiene latex with methacrylic acid, or alternatively using a self-crosslinked latex, adding zinc oxide, adjusted to 9 to 10 of the pH level, and diluted with water to obtain 18% to 30% by weight of total solid content; dipping the glove former into the composition to form a layer of thin film of the latex composition on the former; drying the thin latex film on the former and crosslinking the latex film on the former. | 10-04-2012 |
Lawrence Siau Tian Lim, Klang MY
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20130191964 | ELASTOMER RUBBER GLOVES FOR CLEAN ROOM USE WHICH DOES NOT USE VULCANIZATION ACCELERATOR AND SULFER - A gloves formed from elastomer comprising 25-30 weight % of acrylonitrile, 62-71 weight % of butadiene and 4-8 weight % of unsaturated carboxylic acid (total 100 weight %), wherein crosslink is formed by a bond through at least a part of substituent which is possessed by said unsaturated carboxylic acid, and residual substituent of at least one part of substituent possessed by said unsaturated carboxylic acid is crosslinked by bivalent metal, said elastomer does not contain sulfur which is a crosslinking agent and sulfur composition which is a vulcanization accelerator, Mooney viscosity (ML | 08-01-2013 |
20130198933 | ELASTOMER RUBBER WHICH DOES NOT USE SULFUR AND VULCANIZATION ACCELERATOR AND ELASTOMER RUBBER PRODUCT - An elastomer composition comprising, an emulsion which comprises 25-30 weight % of acrylonitrile, 62-71 weight % of butadiene and 4-8 weight % of unsaturated carboxylic acid (total 100 weight %), wherein crosslink is formed by a bond through at least a part of substituent which is possessed by said unsaturated carboxylic acid, and residual substituent of at least one part of substituent which is possessed by said unsaturated carboxylic acid is left in state of free, further Mooney viscosity (ML | 08-08-2013 |
Lay Yeap Lim, Gelugor MY
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20090189261 | Ultra-Thin Semiconductor Package - Semiconductor packages with a reduced-height die pad and associated methods for making and using these semiconductor packages are described. The semiconductor packages include a lead frame with die pad of reduced height so the die pad has a height that is less than that of the lead frame. The semiconductor packages may comprise an isolated and/or a fused lead finger with a portion of an upper surface of the isolated lead finger that is removed to form a concavity to which one or more bond wires may be bonded. The upper surface of the isolated lead finger may be removed so the isolated lead finger has a height that is less than the height of the lead frame. And a perimeter of a bottom surface of the fused lead finger may be removed. Other embodiments are described. | 07-30-2009 |
20090236711 | METHOD OF MAKING AND DESIGNING LEAD FRAMES FOR SEMICONDUCTOR PACKAGES - A lead frame with patterned conductive runs on the top surface to accept a wire bonded or flip-chip or COL configuration is disclosed. The top pattern is completed and the bottom is etched away creating cavities. The cavities are filled with a pre-mold material that lend structural support of the lead frame. The top is then etch through the lead frame to the pre-mold, except with the top conductive runs exist. In this manner the conductive runs are completed and isolated from each other so that the placement of the runs is flexible. The chips are mounted and the encapsulated and the lead frames are singulated. The pattern on the top and the bottom may be defined by first plated the patterns desired. | 09-24-2009 |
Lay Yeap Lim, Batu Berendam MY
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20140192500 | Method of Electrophoretic Depositing (EPD) a Film on an Exposed Conductive Surface and an Electric Component Thereof - A system, a packaged component and a method for making a packaged component are disclosed. In an embodiment a system comprises a component carrier, a component disposed on the component carrier and an insulating layer disposed on an electrically conductive surface of at least one of the component carrier or the component, wherein the insulating layer comprises a polymer and an inorganic material comprising a dielectric strength of equal or greater than 15 ac-kv/mm and a thermal conductivity of equal or greater than 15 W/m*K. | 07-10-2014 |
20150064849 | Lead Frame Strips with Electrical Isolation of Die Paddles - A lead frame strip includes connected unit lead frames each having a die paddle, a tie bar directly connecting the die paddle to a periphery of the unit lead frame, leads directly connected to the periphery of the unit lead frame and projecting toward the die paddle, and an opening in the periphery adjacent the tie bar. The openings in the periphery of the unit lead frames are spanned with an electrically insulating material that connects the tie bar of each unit lead frame to the periphery of the unit lead frame. The direct connections between the tie bars and the periphery of the unit lead frames are severed prior to subsequent processing, so that the tie bars remain connected to the periphery of the unit lead frames by the electrically insulating material and the die paddles are electrically disconnected from the periphery of the unit lead frames. | 03-05-2015 |
Lee Ling Lim, Sungai Ara MY
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20150065186 | METHOD FOR OPERATING A RADIO COMMUNICATION DEVICE IN A MULTI-WATCH MODE - A method for operating a radio communication device in a multi-watch mode is provided. The radio communication device receives communications on a primary channel and at least one non-primary channel. Further, a talk-back channel is enabled to respond to communications received on the primary channel. The radio communication device determines whether there is any transmission activity in response to a communication received on the non-primary channel. The radio communication device further determines whether the communication received on the non-primary channel comprises critical information when there is no transmission activity for a pre-defined time period since the communication was received on the non-primary channel. When the radio communication device determines that the communication received on the primary channel comprises critical information, the radio communication device switches to the talk-back channel to respond to communications received on the non-primary channel. | 03-05-2015 |
Lee Teck Henry Lim, Bayan Lepas MY
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20140218350 | POWER MANAGEMENT OF DISPLAY CONTROLLER - In general, in one aspect, a display controller has non-essential portions powered off for a portion of vertical blanking interval (VBI) periods to conserve power. The portion takes into account overhead for housekeeping functions and memory latency for receiving a first packet of pixels for a frame to be decoded during a next active period. Gating circuitry may gate power to the non-essential portions starting at beginning of the VBI periods. A latency predictor may predict the portion of the VBI periods by predicting the memory latency for a next VBI period and subtracting the predicted memory latency from the VBI period. The memory latency for the next VBI period may be predicted by adding an average difference between successive actual memory latencies for a plurality of VBI periods to an actual memory latency for previous VBI period. A constant delay may also be subtracted from the VBI period. | 08-07-2014 |
Lip Hong Lim, Rawang MY
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20100157958 | METHOD, DEVICE AND SYSTEM FOR TEMPORARILY SELECTING A TIME SLOT - Temporarily selecting a TDMA timeslot by a radio communication device to thereby allow the radio communication device to communicate, through at least one repeater station, with a talkgroup of other radio communication devices is disclosed. The radio communication device has an assigned default timeslot for communicating with the talkgroup. The radio communication device determines if the default timeslot is available for the radio communication device to communicate with the talkgroup and searches for an available timeslot, when the default timeslot is unavailable. The radio communication device temporarily selects the available timeslot as a temporary selected group timeslot for the talkgroup. | 06-24-2010 |
May Nee Lim, Perak MY
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20110079908 | Stress buffer to protect device features - Disclosed is a stress buffer structure intended to be disposed adjacent a face of a semiconductor substrate. The stress buffer structure includes at least one polymer layer formed on the face of the semiconductor substrate and a plurality of metal plates disposed over the polymer layer, wherein the metal plates is physically and electrically isolated from the bond pads of the semiconductor substrate. The disclosed stress buffer structure provides protection to semiconductor components that are sensitive to stress. Also disclosed are semiconductor packages having the disclosed stress buffer structure and the methods of making the semiconductor packages. | 04-07-2011 |
Mei Lian Lim, Kanagawa-Ken MY
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20130063204 | Output Signal Circuit For Use In A Receiver - According to one embodiment, an output signal circuit for use in a receiver is provided. The output signal circuit is provided with first and second transistors of an insulated gate field effect type, and a backgate bias generator. A source of the first transistor is capable of receiving an input signal. A source of the second transistor is capable of generating an output signal. A backgate bias generator produces a backgate bias voltage which is applied to backgate of the first and second transistors commonly. | 03-14-2013 |
Ming Yi Lim, Ayer Itam MY
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20130283084 | METHOD AND APPARATUS FOR CLOCK FREQUENCY RATIO INDEPENDENT ERROR LOGGING - A method and system for error logging that is independent of the clock frequency ratio in an I/O subsystem. In one embodiment of the invention, the I/O subsystem has an error logging mechanism with a fixed queue depth of two and is independent of the clock frequencies in the I/O subsystem. The I/O subsystem has two queue entries for storing or logging the uncorrectable errors. In one embodiment of the invention, the I/O subsystem has two queue entries for storing or logging the 128-bit TLP Header and the First Error Pointer (FEP) of the uncorrectable errors detected in the I/O subsystem. | 10-24-2013 |
20140195830 | SYSTEM AND METHOD FOR POWER MANAGEMENT - Particular embodiments described herein can offer a method for managing power for at least one processor that includes evaluating a plurality of ports associated with an electronic device; determining that a particular pin associated with at least one of the ports is not receiving a signal; disabling a squelch function associated with the electronic device; and gating power associated with a physical layer (PHY) of the electronic device. | 07-10-2014 |
Pei Jin Lim, Gelugor MY
Patent application number | Description | Published |
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20140218350 | POWER MANAGEMENT OF DISPLAY CONTROLLER - In general, in one aspect, a display controller has non-essential portions powered off for a portion of vertical blanking interval (VBI) periods to conserve power. The portion takes into account overhead for housekeeping functions and memory latency for receiving a first packet of pixels for a frame to be decoded during a next active period. Gating circuitry may gate power to the non-essential portions starting at beginning of the VBI periods. A latency predictor may predict the portion of the VBI periods by predicting the memory latency for a next VBI period and subtracting the predicted memory latency from the VBI period. The memory latency for the next VBI period may be predicted by adding an average difference between successive actual memory latencies for a plurality of VBI periods to an actual memory latency for previous VBI period. A constant delay may also be subtracted from the VBI period. | 08-07-2014 |
Peng-Soon Lim, Kluang MY
Patent application number | Description | Published |
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20110089484 | METHOD AND SYSTEM FOR METAL GATE FORMATION WITH WIDER METAL GATE FILL MARGIN - A method includes providing a semiconductor substrate having a gate trench and depositing a metal layer, using a physical vapor deposition (PVD) process, over the substrate to partially fill the trench. The metal layer includes a bottom portion and a sidewall portion that is thinner than the bottom portion. The method also includes forming a coating layer on the metal layer, etching back the coating layer such that a portion of the coating layer protects a portion of the metal layer within the trench, and removing the unprotected portion of the metal layer. A different aspect involves a semiconductor device that includes a gate that includes a trench having a top surface, and a metal layer formed over the trench, wherein the metal layer includes a sidewall portion and a bottom portion, and wherein the sidewall portion is thinner than the bottom portion. | 04-21-2011 |
20110143510 | METHOD OF CONTROLLING GATE THICKNESS IN FORMING FINFET DEVICES - A method of forming a FinFET device is provided. In one embodiment, a fin is formed on a substrate. A gate structure is formed over the fin, the gate structure having a dielectric layer and a conformal first polysilicon layer formed above the dielectric layer. An etch stop layer is formed above the first polysilicon layer and thereafter a second polysilicon layer is formed above the etch stop layer. The second polysilicon layer and the etch stop layer are removed. A metal layer is formed above the first polysilicon layer. The first polysilicon layer is reacted with the metal layer to silicide the first polysilicon layer. Any un-reacted metal layer is thereafter removed and source and drain regions are formed on opposite sides of the fin. | 06-16-2011 |
20110147858 | METAL GATE STRUCTURE OF A FIELD EFFECT TRANSISTOR - The invention relates to integrated circuit fabrication, and more particularly to a Field Effect Transistor with a low resistance metal gate electrode. An exemplary structure for a gate electrode for a Field Effect Transistor comprises a lower portion formed of a first metal material having a recess and a first resistance; and an upper portion formed of a second metal material having a protrusion and a second resistance, wherein the protrusion extends into the recess, wherein the second resistance is lower than the first resistance. | 06-23-2011 |
Peng-Soon Lim, Johor MY
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20100084719 | TRANSISTOR PERFORMANCE WITH METAL GATE - The present disclosure provides a method for making a semiconductor device having metal gate stacks. The method includes forming a high k dielectric material layer on a semiconductor substrate; forming a metal gate layer on the high k dielectric material layer; forming a top gate layer on the metal gate layer; patterning the top gate layer, the metal gate layer and the high k dielectric material layer to form a gate stack; performing an etching process to selectively recess the metal gate layer; and forming a gate spacer on sidewalls of the gate stack. | 04-08-2010 |
20120001266 | GATE STRUCTURES AND METHOD OF FABRICATING SAME - A method includes: forming first and second projections; forming a first structure engaging the first projection, and including: a non-metallic conductive layer, and a first opening over the conductive layer; forming a second structure engaging the second projection, and including: a second opening; and conformally depositing a pure metal in the first and second openings. A different aspect involves an apparatus including: a first device that includes a first projection and a first gate structure, the first projection extending from a substrate, and the first gate structure engaging the first projection, and including an opening, and a conformal, pure metal disposed in the opening; and a second device that includes a second projection and a second gate structure, the second projection extending from the substrate, and the second gate structure engaging the second projection, and including a silicide including a metal that is the same metal disposed in the opening. | 01-05-2012 |
20120319192 | Gate Structures - An apparatus includes a first device. The first device includes a first projection and a first gate structure, the first projection extending upwardly from a substrate and having a first channel region therein, and the first gate structure engaging the first projection adjacent the first channel region. The first structure includes an opening over the first channel region, and a conformal, pure metal with a low resistivity disposed in the opening. The apparatus also includes a second device that includes a second projection and a second gate structure, the second projection extending upwardly from the substrate and having a second channel region therein, and the second gate structure engaging the second projection adjacent the second channel region. The second structure includes a silicide disposed over the second channel region, wherein the silicide includes a metal that is the same metal disposed in the opening. | 12-20-2012 |
20130026637 | METAL GATE ELECTRODE OF A FIELD EFFECT TRANSISTOR - An integrated circuit fabrication is disclosed, and more particularly a field effect transistor with a low resistance metal gate electrode is disclosed. An exemplary structure for a metal gate electrode of a field effect transistor comprises a lower portion formed of a first metal material, wherein the lower portion has a recess, a bottom portion and sidewall portions, wherein each of the sidewall portions has a first width; and an upper portion formed of a second metal material, wherein the upper portion has a protrusion and a bulk portion, wherein the bulk portion has a second width, wherein the protrusion extends into the recess, wherein a ratio of the second width to the first width is from about 5 to 10. | 01-31-2013 |
20130240979 | GATE STRUCTURES - A semiconductor device is provided. The device includes a semiconductor substrate, first and second projections extending upwardly from the substrate, the projections having respective first and second channel regions therein, and a first gate structure engaging the first projection adjacent the first channel region. The first gate structure includes a first dielectric material over the first channel region, a first opening over the first dielectric material and the first channel region, and a pure first metal with an n-type work function value conformally deposited in the first opening. The device also includes a second gate structure engaging the second projection adjacent the second channel region. The second gate structure includes a second dielectric material over the second channel region, a second opening over the second dielectric material and the second channel region, and a pure second metal with a p-type work function value conformally deposited in the second opening. | 09-19-2013 |
20140295659 | METHOD OF MAKING A GATE STRUCTURE - A method of making a gate structure includes forming a trench in a dielectric layer. The method further includes forming a gate dielectric layer in the trench. The gate dielectric layer defines an opening in the dielectric layer. The method includes forming a gate electrode in the opening. Forming the gate electrode includes filling a width of a bottom portion of the opening with a first metal material. The first metal material has a recess. Forming the gate electrode includes filling an entire width of a top portion of the opening with a homogeneous second metal material. The homogeneous second metal material has a protrusion extending into the recess, and a maximum width of the homogeneous second metal material is equal to a maximum width of the first metal material. A top surface of the gate dielectric layer is co-planar with a top surface of the homogeneous second metal material. | 10-02-2014 |
Pooi Nguon Lim, Pulau Pinang MY
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20140326789 | Machine-Readable Passport With A Polycarbonate (PC) Datapage And Method For Making The same - The present invention provides a multi-layered personalized page comprising a PET incsti/PU hinge layer; a PC inlay with chip antenna layer with an electric component with personal data of a holder of a passport; two PC core layers with artwork; and two PC overlay layers. The present invention also provides a passport tint contains the multi-layered personalized | 11-06-2014 |
San Li Lim, Taiping (perka) MY
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20120279500 | Tracheal Tube with Temperature Sensor - A tracheal tube for the endotracheal or tracheostomatic respiration of patients by using a breathing tube, which is at least partially insertable into the trachea, comprises a trachea sealing cuff, which is arranged at the part insertable into the trachea around the breathing tube, and comprising a temperature sensor. The cuff comprises an outer balloon and an inner balloon between which the temperature sensor is arranged. | 11-08-2012 |
Seng Shin Lim, Kulim MY
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20090295647 | ELECTRONIC DEVICE AND ELECTRONIC ASSEMBLY - An electronic assembly and electronic device used for radio frequency communications. The electronic device has a housing and an antenna feed point at least partially enclosed in the housing. There is at least one circuit board enclosed in the housing; an antenna counterpoise is coupled to the feed point. The counterpoise is enclosed in the housing and the counterpoise includes a foldable metallic patch that is folded around the circuit board such that the circuit board is sandwiched between opposite facing portions of the foldable metallic patch | 12-03-2009 |
Seong Choon Lim, Bayan Lepas MY
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20110254032 | Electronic Assembly - An electronic assembly includes a first substrate and a second substrate, a hole through the first substrate, the second substrate having a trace with an indentation, an electronic device mounted over the indentation in the trace, and the first substrate is attached to the second substrate such that the electronic device is positioned within the hole through the first substrate. | 10-20-2011 |
20130099269 | ELECTRONIC ASSEMBLY - An electronic assembly includes a first substrate and a second substrate, a hole through the first substrate, the second substrate having a trace with an indentation, an electronic device mounted over the indentation in the trace, and the first substrate is attached to the second substrate such that the electronic device is positioned within the hole through the first substrate. | 04-25-2013 |
Siang Hui Lim, Subang Jaya MY
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20110212955 | ROSAMINE DERIVATIVES AS AGENTS FOR THE TREATMENT OF CANCER - The present invention relates to a new class of rosamine derivatives, in one embodiment, the compounds have the structure (I) or any pharmaceutically acceptable salt or solvate thereof, wherein: R | 09-01-2011 |
Sih Fei Lim, Bukit Mertajam MY
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20120319276 | FLIP CHIP ASSEMBLY PROCESS FOR ULTRA THIN SUBSTRATE AND PACKAGE ON PACKAGE ASSEMBLY - In some embodiments, selective electroless plating for electronic substrates is presented. In this regard, a method is introduced including receiving a coreless substrate strip, attaching solder balls to a backside of the coreless substrate strip, and forming a backside stiffening mold amongst the solder balls. Other embodiments are also disclosed and claimed. | 12-20-2012 |
Soon Chieh Lim, Gelugor MY
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20090109765 | Single via structured IC device - A configurable logic array may include a multiplicity of logic components, which may contain customizable look-up tables, and layers of fixed metal segments all of which may be customizable using a single custom via layer. The integrated circuit containing the configurable logic array may also include a multiplicity of customizable register files, customizable RAM blocks; a ROM block with customizable contents; or test logic With customizable test options and configurations to separately test logic and the PLLs. | 04-30-2009 |
Soon Hock Lim, Petaling Jaya MY
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20090264070 | Data Communications Between Short-Range Enabled Wireless Devices Over Networks and Proximity Marketing to Such Devices - A method for allowing short-ranged communication devices to communicate with each other using the Internet. Cell servers are provided in a first and second zones linked to the Internet and adapted for transmitting voice and other digital data over the Internet such as using VoIP. The method includes registering users of short-range enabled devices, such as Bluetooth cell phones, with a communication system and storing a device identifier along with a user ID and password. A contact list is stored for each registered user. The method includes a registered user entering a cell serviced by a server, the server discovering the user's device, logging the user into the system based on the device identifier and an entered user ID and password, receiving a communication request to chat with one of the listed contacts, and establishing a communication session using time previously awarded to the user for receiving marketing content. | 10-22-2009 |
20110270680 | DATA COMMUNICATIONS BETWEEN SHORT-RANGE ENABLED WIRELESS DEVICES OVER NETWORKS AND PROXIMITY MARKETING TO SUCH DEVICES - A method for allowing short-ranged communication devices to communicate with each other using the Internet. Cell servers are provided in first and second zones linked to the Internet and adapted for transmitting voice and other digital data over the Internet such as using VoIP. The method includes registering users of short-range enabled devices, such as Bluetooth cell phones, with a communication system and storing a device identifier along with a user ID and password. A contact list is stored for each registered user. The method includes a registered user entering a cell serviced by a server, the server discovering the user's device, logging the user into the system based on the device identifier and an entered user ID and password, receiving a communication request to chat with one of the listed contacts, and establishing a communication session using time previously awarded to the user for receiving marketing content. | 11-03-2011 |
Soon Huat Lim, Gerogetown MY
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20100272501 | Insertable index application kit and method of using the same - An insertable index application kit consists of at least one set of divider sheets, each having insertable index tabs attached to the outer edge of the divider sheets or a set of individual insertable tabs, at least one index insert sheet perforated into at least one index insert strip which include one set of index inserts defined by perforated lines and a pre-inserted strip. The pre-inserted strip is pre-inserted into the insertable tabs; holding and binding the divider sheets or the multiple individual insertable tabs together in a set. A user may (1) separate an index insert strip from the index insert sheet, (2) attach the index insert strip to one end of the pre-inserted strip, (3) pull the pre-inserted strip away from divider sheets or individual insertable tabs such that the new index insert strip with perforated index inserts for each individual tab is fitted and aligned in the insertable tab's pocket, and (4) tear along the perforated lines such that the index inserts remain in each individual insertable tab's pocket. | 10-28-2010 |
Sujea Lim, Bintangor MY
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20130275985 | METHOD, APPARATUS, AND SYSTEM TO HANDLE TRANSACTIONS RECEIVED AFTER A CONFIGURATION CHANGE REQUEST - Methods, apparatuses, and systems for handling transactions received after a configuration request, the method, for example, comprising: receiving a configuration change request by a transaction-handling logic block; performing a configuration change by the transaction-handling logic block in response to the configuration change request, wherein the logic block is to handle transactions received prior to receipt of the configuration change request differently than transactions received after receipt of the configuration change request; receiving, by the transaction-handling logic block, a first transaction before receiving the configuration change request; receiving, by the transaction-handling logic block, a second transaction after receiving the configuration change request and before the configuration change is complete; differentiating the first transaction from the second transaction based on the order in which the first and second transactions were received relative to receipt of the configuration change request; and handling the first and second transactions. | 10-17-2013 |
20140195830 | SYSTEM AND METHOD FOR POWER MANAGEMENT - Particular embodiments described herein can offer a method for managing power for at least one processor that includes evaluating a plurality of ports associated with an electronic device; determining that a particular pin associated with at least one of the ports is not receiving a signal; disabling a squelch function associated with the electronic device; and gating power associated with a physical layer (PHY) of the electronic device. | 07-10-2014 |
20140195835 | SYSTEM AND METHOD FOR PROVIDING POWER SAVINGS IN A PROCESSOR ENVIRONMENT - Particular embodiments described herein can offer a method that includes powering down a root port; initiating a first downstream cycle by a central processing unit (CPU) to the root port; identifying a power up activity for the CPU; and triggering an exit flow for a power state in conjunction with sending a second downstream cycle to the root port. In more particular embodiments, the triggering of the exit flow for the power state and the sending of the second downstream cycle to the root port occurs in a substantially parallel fashion. In addition, a prewake indicator can be sent to the root port to trigger the exit flow before the CPU is powered up and the second downstream cycle is sent. | 07-10-2014 |
Su Wei Lim, Klang MY
Patent application number | Description | Published |
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20120166691 | In band dynamic switching between two bus standards - In some embodiments, an electronic system includes a processor, a memory in communication with the processor, a bus in communication with the processor, an Express Card controller coupled to the bus, the Express Card controller providing an interface to an external device, a USB3 controller coupled to the bus and in communication with the Express Card controller, and a PCIE controller coupled to the bus and in communication with the Express Card controller. The Express Card controller may be configured to determine whether the external device is a USB3 device or a PCIE device and to switch between the USB3 controller and the PCIE controller based on the state of a USB3 select pin strap. Other embodiments are disclosed and claimed. | 06-28-2012 |
20130003540 | POWER MANGEMENT TECHNIQUES FOR AN INPUT/OUTPUT (I/O) SUBSYSTEM - A method and system to improve the power management for an I/O subsystem. In one embodiment of the invention, the power management of an upstream port of the I/O subsystem is improved by increasing the upstream link utilization when the upstream port is an active power state and by increasing or prolonging the power saving period of the upstream port when the upstream port is in a low power state. | 01-03-2013 |
20130007332 | CONTROLLABLE TRANSACTION SYNCHRONIZATION FOR PERIPHERAL DEVICES - Embodiments of the invention describe a host system capable of associating a PCIe device and another separate device to the same device identifier (e.g., device number). A cycle routing module or logic will identify an I/O transaction involving the device identifier, and route the transaction to one or both of the devices (or, in some instances, identify the I/O transaction as a configuration transaction, and simply update the cycle routing module/logic only). In one embodiment of the invention, a root port of the host system is configured to operate as the above described cycle router. | 01-03-2013 |
20130212311 | INTER-COMPONENT COMMUNICATION INCLUDING SLAVE COMPONENT INITIATED TRANSACTION - Component apparatuses with inter-component communication capabilities, and system having such component apparatuses are disclosed. A component may include a number of control pins including a clock pin, a number of data pins, and a logic unit. The logic unit may be configured to receive a clock signal from another component through the clock pin, to provide an alert signal to the other component through a selected one of the control and data pins to initiate a transaction with the other component, to receive in response to the alert signal from the other component through the data pins a status request to determine nature of the transaction, and to provide in response to the status request to the other component through the data pins a status to indicate the nature of the transaction. Other embodiments may be disclosed or claimed. | 08-15-2013 |
20130275985 | METHOD, APPARATUS, AND SYSTEM TO HANDLE TRANSACTIONS RECEIVED AFTER A CONFIGURATION CHANGE REQUEST - Methods, apparatuses, and systems for handling transactions received after a configuration request, the method, for example, comprising: receiving a configuration change request by a transaction-handling logic block; performing a configuration change by the transaction-handling logic block in response to the configuration change request, wherein the logic block is to handle transactions received prior to receipt of the configuration change request differently than transactions received after receipt of the configuration change request; receiving, by the transaction-handling logic block, a first transaction before receiving the configuration change request; receiving, by the transaction-handling logic block, a second transaction after receiving the configuration change request and before the configuration change is complete; differentiating the first transaction from the second transaction based on the order in which the first and second transactions were received relative to receipt of the configuration change request; and handling the first and second transactions. | 10-17-2013 |
20130283084 | METHOD AND APPARATUS FOR CLOCK FREQUENCY RATIO INDEPENDENT ERROR LOGGING - A method and system for error logging that is independent of the clock frequency ratio in an I/O subsystem. In one embodiment of the invention, the I/O subsystem has an error logging mechanism with a fixed queue depth of two and is independent of the clock frequencies in the I/O subsystem. The I/O subsystem has two queue entries for storing or logging the uncorrectable errors. In one embodiment of the invention, the I/O subsystem has two queue entries for storing or logging the 128-bit TLP Header and the First Error Pointer (FEP) of the uncorrectable errors detected in the I/O subsystem. | 10-24-2013 |
20140003451 | Architected Protocol For Changing Link Operating Mode | 01-02-2014 |
20140108698 | Architected Protocol For Changing Link Operating Mode - In one embodiment, a device having a link training state machine including a reconfiguration logic to perform a dynamic link reconfiguration of a physical link coupled between the device and a second device during a run-time in which the physical link does not enter a link down state, including transmission of a plurality of bandwidth change requests to the second device, each of the plurality of bandwidth change requests to request a bandwidth change from a first bandwidth to a second bandwidth. Other embodiments are described and claimed. | 04-17-2014 |
20140181356 | BAND DYNAMIC SWITCHING BETWEEN TWO BUS STANDARDS - In some embodiments, an electronic system includes a processor, a memory in communication with the processor, a bus in communication with the processor, an Express Card controller coupled to the bus, the Express Card controller providing an interface to an external device, a USB3 controller coupled to the bus and in communication with the Express Card controller, and a PCIE controller coupled to the bus and in communication with the Express Card controller. The Express Card controller may be configured to determine whether the external device is a USB3 device or a PCIE device and to switch between the USB3 controller and the PCIE controller based on the state of a USB3 select pin strap. Other embodiments are disclosed and claimed. | 06-26-2014 |
20140195830 | SYSTEM AND METHOD FOR POWER MANAGEMENT - Particular embodiments described herein can offer a method for managing power for at least one processor that includes evaluating a plurality of ports associated with an electronic device; determining that a particular pin associated with at least one of the ports is not receiving a signal; disabling a squelch function associated with the electronic device; and gating power associated with a physical layer (PHY) of the electronic device. | 07-10-2014 |
20140195835 | SYSTEM AND METHOD FOR PROVIDING POWER SAVINGS IN A PROCESSOR ENVIRONMENT - Particular embodiments described herein can offer a method that includes powering down a root port; initiating a first downstream cycle by a central processing unit (CPU) to the root port; identifying a power up activity for the CPU; and triggering an exit flow for a power state in conjunction with sending a second downstream cycle to the root port. In more particular embodiments, the triggering of the exit flow for the power state and the sending of the second downstream cycle to the root port occurs in a substantially parallel fashion. In addition, a prewake indicator can be sent to the root port to trigger the exit flow before the CPU is powered up and the second downstream cycle is sent. | 07-10-2014 |
20140269471 | Systems, Apparatuses, and Methods for Synchronizing Port Entry into a Low Power State - Systems, apparatuses, and method for synchronizing port entry into a lowest power state are described. All logic of a port placed into an intermediate state prior to entry into the lowest power state. | 09-18-2014 |
20140281753 | Systems, Apparatuses, and Methods for Handling Timeouts - Systems, apparatuses, and method for handling timeouts in a link state training sequence are described. All modules of a port undergoing link state training placed into an intermediate state prior to entry into the lowest power state. | 09-18-2014 |
Su Wei Lim, Klang 10 MY
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20130283013 | METHOD AND APPARATUS FOR AGENT INTERFACING WITH PIPELINE BACKBONE TO LOCALLY HANDLE TRANSACTIONS WHILE OBEYING ORDERING RULE - In accordance with embodiments disclosed herein, there are provided methods, systems, and apparatuses for enabling an agent interfacing with a pipelined backbone to locally handle transactions while obeying an ordering rule including, for example, receiving a transaction which requests access to a backbone; decoding routing destination information from the transaction received, in which the decoded routing destination information designates the transaction to be processed either locally or processed via the backbone; storing the decoded routing destination information and the transaction into a First-In-First-Out (FIFO) buffer; retrieving the decoded routing destination information and the transaction from the FIFO buffer; and processing the transaction locally or via the backbone based on the decoded routing destination information retrieved from the FIFO buffer with the transaction. | 10-24-2013 |
20140207986 | APPARATUS FOR MULTIPLE BUS MASTER ENGINES TO SHARE THE SAME REQUEST CHANNEL TO A PIPELINED BACKBONE - In accordance with embodiments disclosed herein are mechanisms for enabling multiple bus master engines to share the same request channel to a pipelined backbone including: receiving a plurality of unarbitrated grant requests at an agent bus interface from a plurality of masters, each requesting access to a backbone connected via a common request channel; determining which of the unarbitrated grant requests is to issue first as a final grant request; storing a master identifier code for the final grant request into a FIFO buffer, the master identifier code associating the final grant request with the issuing master among the plurality of masters; waiting for a backbone grant; and presenting the master identifier code for the final grant request to an agent bus interface, wherein the agent bus interface communicates a command and data for processing via a backbone responsive to the backbone grant to fulfill the final grant request. | 07-24-2014 |
Tee Yen Lim, Pahang MY
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20110100981 | DEMAGNETIZATION SYSTEM AND METHOD - There is disclosed a method and system for demagnetizing an object. The method includes the step of applying a substantially uniform electromagnetic field to a magnetized object under condition to substantially demagnetize said object. | 05-05-2011 |
Teik Wah Lim, Bayan Lepas MY
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20120274375 | FREQUENCY CONTROL CLOCK TUNING CIRCUITRY - Circuits and a method for tuning an integrated circuit (IC) are disclosed. The IC includes multiple programmable fuses coupled to a control block. The programmable fuses used may be one-time programmable (OTP) fuses. The control block reads settings or data stored in the programmable fuses. A tuning circuit coupled to the control block receives the delay transmitted by the control block. The tuning circuit allows tuning of the IC without changes to the fabrication mask. The tuning circuit may include delay chains to provide additional delay to the IC when needed and the delay in the tuning circuit is configured based on the delay value stored in the programmable fuses and transmitted by the control block. | 11-01-2012 |
Teng Howe Lim, Kuala Lumpur MY
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20100324632 | Method and portable system for non-invasive, In-vivo blood irradiation light therapy - The present invention is a non-invasive apparatus, system, and method for performing irradiation light therapy upon blood circulating within the nostrils of a living mammalian subject. The merit and medical value of the invention resides in its ability to achieve a reversal of red blood cell aggregation in-vivo without invading the tissues or organs of the living subject—a clinical result which leads to lower blood viscosity and improved blood circulation. In this manner, the invention provides the living mammalian subject with an enhanced immunity from diseases, a reduced vulnerability to hypertension, and a reduced risk of a cardiovascular incident. Furthermore, by altering the wavelengths transmitted by the light generating unit(s) and controlling the light energy dosage, the method and system can also fine-tuned further as intervention for various diseases. | 12-23-2010 |
Teng Hun Lim, Gelugor MY
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20090256724 | SYSTEM AND METHOD FOR PERFORMING AN OPTICAL TRACKING OPERATION USING RELATIVE REFERENCING - A system and method for performing an optical tracking operation computes a translated movement value of a displacement values using a relationship between a reference displacement value derived using a reference surface and a corresponding displacement value using a target surface. The displacement value is produced using image correlation by optically sensing the target surface. The translated movement value is used for the optical tracking operation. | 10-15-2009 |
20100172545 | ABSOLUTE TRACKING IN A SUB-PIXEL RANGE - An optical navigation device for absolute tracking in a sub-pixel range. The optical navigation device includes an image sensor and a tracking engine. The image sensor includes a pixel array to generate a plurality of tracking images. The tracking images correspond to incident light at the pixel array. The tracking engine determines a sub-pixel displacement value of a tracking surface based on a comparison of at least two of the tracking images. The tracking engine includes a sub-pixel approximation engine and a linear approximation engine. The sub-pixel approximation engine generates an intermediate sub-pixel displacement value based on a sub-pixel approximation according to a non-linear sub-pixel distribution. The linear approximation engine generates a final sub-pixel displacement value from the intermediate sub-pixel displacement value. | 07-08-2010 |
20100266158 | SYSTEM AND METHOD FOR OPTICALLY TRACKING A MOBILE DEVICE - A system and method for optically tracking a mobile device uses a first displacement value along a first direction and a second displacement value along a second direction, which are produced using frames of image data of a navigation surface, to compute first and second tracking values that indicate the current position of the mobile device. The first tracking value is computed using the second displacement value and the sine of a tracking angle value, while the second tracking value is computed using the second displacement value and the cosine of the tracking angle value. The tracking angle value is an angle value derived using at least one previous second displacement value. | 10-21-2010 |
Thiam Ern Lim, Bayan Lepas MY
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20150039919 | DIRECTED WAKEUP INTO A SECURED SYSTEM ENVIRONMENT - Embodiments of processors, methods, and systems for directed wakeup into a secured system environment are disclosed. In one embodiment, a processor includes a decode unit, a control unit, and a messaging unit. The decode unit is to receive a secured system environment wakeup instruction. The control unit is to cause wake-inhibit indicator to be set for each of a plurality of responding logical processor to be kept in a sleep state. The messaging unit is to send a wakeup message to the plurality of responding logical processors, wherein the wakeup message is to be ignored by each of the plurality of responding logical processors for which the wake-inhibit indicator is set. | 02-05-2015 |
Tienkuan Lim, Petaling Ba MY
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20130267639 | THERMOPLASTIC POLYURETHANES COMPOSITION AND PREPARATION PROCESSES THEREOF - This invention is directed to a thermoplastic polyurethanes composition comprising polyether-based thermoplastic polyurethane and 1,2-cyclohexane dicarboxylic acid ester and preparation processes thereof. The thermoplastic polyurethane composition has a good mold release behavior in injection molding without undesirably significant shrinkage and surface blooming of final product. | 10-10-2013 |
Tiew Kim Lim, Selangor MY
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20100285178 | PRODUCTION OF FOOD PRODUCTS WITH ENHANCED IN MOUTH AND MENTAL REFRESHMENT - The present invention relates to food products, in particular frozen desserts providing and enhanced refreshing sensation upon consumption and to a method for the manufacture thereof. Furthermore, the present invention relates to refreshing consumable compositions which can be used in the manufacture of said frozen desserts. The food products comprise at least one salivating agent and at least one cooling agent in a weight ratio of 1:0.06 to 1:0.2 | 11-11-2010 |
Tze-Sen Lim, Bayan Lepas MY
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20110057205 | LED WITH PHOSPHOR TILE AND OVERMOLDED PHOSPHOR IN LENS - Overmolded lenses and certain fabrication techniques are described for LED structures. In one embodiment, thin YAG phosphor plates are formed and affixed over blue LEDs mounted on a submount wafer. A clear lens is then molded over each LED structure during a single molding process. The LEDs are then separated from the wafer. The molded lens may include red phosphor to generate a warmer white light. In another embodiment, the phosphor plates are first temporarily mounted on a backplate, and a lens containing a red phosphor is molded over the phosphor plates. The plates with overmolded lenses are removed from the backplate and affixed to the top of an energizing LED. A clear lens is then molded over each LED structure. The shape of the molded phosphor-loaded lenses may be designed to improve the color vs. angle uniformity. Multiple dies may be encapsulated by a single lens. In another embodiment, a prefabricated collimating lens is glued to the flat top of an overmolded lens. | 03-10-2011 |
Wei Bee Lim, Georgetown MY
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20090045798 | Synchronization of Spectrum Analyzer Frequency Sweep and External Switch - A measuring receiver comprises a spectrum analyzer having a local oscillator for sweeping the measurement frequency of the spectrum analyzer through multiple frequency bands. A preselector has multiple filter paths with frequency bands corresponding to frequency bands of the spectrum analyzer. The filter paths for passing signals through the preselector and outputting filtered signals to the spectrum analyzer. Switches of the preselector switch between filter paths to switch in a filter path having a frequency band corresponding to a frequency band being swept by the spectrum analyzer. A controller delays the sweeping of the measurement frequency during intervals when the switches are switching between filter paths. | 02-19-2009 |
Yit Koon Lim, Kuala Lumpur MY
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20080285318 | Power Factor Correction Circuit - A power factor correction circuit having an input current for reducing the distortion and harmonics generated in a power line feeding power supply comprising: | 11-20-2008 |