Patent application number | Description | Published |
20130307115 | ANTI-FUSE STRUCTURE AND FABRICATION - A method and structure of a non-intrinsic anti-fuse structure. The anti-fuse structure has a first electrode, a second electrode, a first dielectric, and second dielectric. The first and second dielectrics have an interface which couples electrodes. The length along the interface which couples the electrodes is called the predetermined length. When the anti-fuse is programmed a conductive link forms along the interface to connect the first and second electrodes. The anti-fuse structure can be single-level or dual-level. The predetermined length can be less than spacing between adjacent electrodes when a dual-level structure is used. The anti-fuse structures have the advantage that they can be programmed at lower voltages than intrinsic structures and no extra steps are needed to integrate the anti-fuses with active structures. | 11-21-2013 |
20140118020 | STRUCTURES AND METHODS FOR DETERMINING TDDB RELIABILITY AT REDUCED SPACINGS USING THE STRUCTURES - A structure for TDDB measurement, a method determining TDDB at reduced spacings. The structure includes an upper dielectric layer on a top surface of a lower dielectric layer, a bottom surface of the upper dielectric layer and the top surface of the lower dielectric layer defining an interface; a first wire formed in the lower dielectric layer; a second wire formed in the upper dielectric layer; and wherein a distance between the first wire and the second wire measured in a direction parallel to the interface is below the lithographic resolution limit of the fabrication technology. | 05-01-2014 |
20140203436 | SELECTIVE LOCAL METAL CAP LAYER FORMATION FOR IMPROVED ELECTROMIGRATION BEHAVIOR - A method of forming a wiring structure for an integrated circuit device includes forming a first metal line within an interlevel dielectric (ILD) layer, and forming a second metal line in the ILD layer adjacent the first metal line; masking selected regions of the first and second metal lines; selectively plating metal cap regions over exposed regions of the first and second metal lines at periodic intervals such that a spacing between adjacent metal cap regions of an individual metal line corresponds to a critical length, L, at which a back stress gradient balances an electromigration force in the individual metal line, so as to suppress mass transport of electrons; and wherein the metal cap regions of the first metal line are formed at staggered locations with respect to the metal cap regions of the second metal line, along a common longitudinal axis. | 07-24-2014 |
20140210040 | ELECTRONIC FUSE LINE WITH MODIFIED CAP - An electronic fuse structure having an M | 07-31-2014 |
20140217612 | ELECTRONIC FUSE HAVING A DAMAGED REGION - An electronic fuse structure including an M | 08-07-2014 |
20140332923 | E-FUSE WITH HYBRID METALLIZATION - An e-fuse structure including a fuse link having a first region made of a first conductor and a second region made of a second conductor. The first conductor and the second conductor are in the same wiring level. The first conductor has a higher electrical resistance than the second conductor. The first conductor has a higher resistance to electromigration than the second conductor. The first region and the second region have a common width. The length of the first region is longer than the length of the second region. | 11-13-2014 |
20140332963 | INTERCONNECT WITH HYBRID METALLIZATION - An electronic interconnect structure having a hybridized metal structure near regions of high operating temperature on an integrated circuit, and methods of making the same. The hybridized metal structure features at least two different metals in a single metallization level. The first metal is in a region of high operating temperature and the second region is in a region of normal operating temperatures. In a preferred embodiment the first metal includes aluminum and is in a first level metallization over an active area of the device while the second metal includes copper. In some embodiments, the first and second metals are not in direct physical contact. In other embodiments the first and second metals physically contact each other. In a preferred embodiment, a top surface of the first metal is not co-planar with a top surface of the second metal, despite being in the same metallization level. | 11-13-2014 |
20150028484 | RANDOM LOCAL METAL CAP LAYER FORMATION FOR IMPROVED INTEGRATED CIRCUIT RELIABILITY - A method and structure for preventing integrated circuit failure due to electromigration and time dependent dielectric breakdown is disclosed. A randomly patterned metal cap layer is selectively formed on the metal interconnect lines (typically copper (Cu)) with an interspace distance between metal cap segments that is less than the critical length (for short-length effects). Since the diffusivity is lower for the Cu/metal cap interface than for the Cu/dielectric cap interface, the region with a metal cap serves as a diffusion barrier. | 01-29-2015 |