Patent application number | Description | Published |
20100149060 | ANTENNA MODULE AND DESIGN METHOD THEREOF - An antenna module is provided. The antenna module includes an antenna and an EBG element. The EBG element includes an EBG ground layer, a plurality of reflective units and a plurality of connection posts. The reflective units are arranged in a matrix, a gap is formed between the nearby reflective units, and the reflective units are corresponding to the antenna. Each connection post connects the reflective unit to the EBG ground layer. | 06-17-2010 |
20100194644 | APERTURE ANTENNA - An aperture antenna for transmitting a circularly polarized signal is provided. The aperture antenna includes an antenna substrate, a feed conductor and an antenna ground layer. The feed conductor is microstrip-fed or coplanar-wave-guide-fed. The antenna ground layer has an aperture, the aperture has a feed portion, a signal turning point, a first edge and a second edge, the first edge connects the feed portion to the signal turning point in a first direction, and the second edge connects the feed portion to the signal turning point in a second direction, the first direction is opposite to the second direction. When the aperture antenna transmits the circularly polarized signal, a traveling wave travels on the first edge, and at least one standing wave is formed on the second edge. | 08-05-2010 |
20120313833 | APERTURE ANTENNA - An aperture antenna for transmitting a circularly polarized signal is provided. The aperture antenna includes an antenna substrate, a feed conductor and an antenna ground layer. The feed conductor is microstrip-fed or coplanar-wave-guide-fed. The antenna ground layer has an aperture, the aperture has a feed portion, a signal turning point, a first edge and a second edge, the first edge connects the feed portion to the signal turning point in a first direction, and the second edge connects the feed portion to the signal turning point in a second direction, the first direction is opposite to the second direction. When the aperture antenna transmits the circularly polarized signal, a traveling wave travels on the first edge, and at least one standing wave is formed on the second edge. | 12-13-2012 |
Patent application number | Description | Published |
20090230417 | LIGHT EMITTING DIODE PACKAGE STRUCTURE AND METHOD FOR FABRICATING THE SAME - The present invention discloses a light emitting diode (LED) package structure, which includes a carrier, a first protrusion, a LED chip, and an adhesion layer. The first protrusion is disposed on the carrier and has a first opening to expose the carrier, wherein the first protrusion is formed by a thermal conductive material. The LED chip is disposed in the first opening on the carrier, and a ratio between a width of the first opening and a width of the LED chip is 1˜1.5. The adhesion layer is disposed between the LED chip and the carrier to bond the LED chip to the carrier. | 09-17-2009 |
20090267102 | LIGHT EMITTING DIODE PACKAGE STRUCTURE AND METHOD FOR FABRICATING THE SAME - A light emitting diode (LED) package structure includes a carrier, a first protrusion, a LED chip, and an adhesion layer. The first protrusion is disposed on the carrier and has a first opening to expose the carrier. The LED chip is disposed in the first opening on the carrier, and a ratio between a width of the first opening and a width of the LED chip is 1˜1.5. The adhesion layer is disposed between the LED chip and the carrier to bond the LED chip to the carrier. | 10-29-2009 |
20100213479 | LIGHT EMITTING DIODE PACKAGE STRUCTURE - A light-emitting diode (LED) package structure including a carrier substrate, at least one LED chip, an optical element and a highly thermal-conductive transparent liquid is provided. The LED chip is disposed on the carrier substrate and has an active layer. The optical element is disposed on the substrate and forms a sealed space with the carrier substrate, and the LED chip is disposed in the sealed space. The highly thermal-conductive transparent liquid fills up the sealed space. | 08-26-2010 |
20110092002 | METHOD FOR FABRICATING A LIGHT EMITTING DIODE PACKAGE STRUCTURE - The present invention discloses a method for fabricating a light emitting diode (LED) package structure. The method comprises the following steps: a carrier having a substrate and a first protrusion is provided, wherein the first protrusion is disposed on the substrate and has a recess. An adhesion layer and a LED chip are disposed on a bottom of the recess, wherein the adhesion layer is bonded between the carrier and the LED chip, and a ratio between a width of the recess and a width of the LED chip is larger than 1 and smaller than or equal to 1.5 such that a gap existing between a sidewall of the LED chip and an inner sidewall of the recess. | 04-21-2011 |
20120012868 | LIGHT EMITTING CHIP PACKAGE MODULE AND LIGHT EMITTING CHIP PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF - A light emitting chip package module includes a substrate, a light emitting chip package structure, and a magnetic device. The substrate has a surface. The light emitting chip package structure is disposed on the surface of the substrate. The light emitting chip package structure includes a carrier, a light emitting chip, and a sealant. The light emitting chip is disposed on and electrically connected to the carrier. The sealant is disposed on the carrier and covers the light emitting chip. The magnetic device is disposed next to the light emitting chip package structure to apply a magnetic field to the light emitting chip. | 01-19-2012 |
20120099303 | CCT MODULATING METHOD, LED LIGHT SOURCE MODULE, AND PACKAGE STRUCTURE THEREOF - A correlated color temperature (CCT) modulating method including following steps is provided. A white LED light source is modulated to emit a first white light. At least one LED light source is modulated to emit a second white light, wherein the second white light includes at least one broad-spectrum monochromatic light. The first white light and the second white light are mixed to produce a third white light. The color rendering index (CRI) of the third white light is greater than those of the first white light and the second white light, and the color coordinates of the first white light, the second white light, and the third white light are different from each other. Furthermore, an LED light source module and a package structure thereof are also provided. | 04-26-2012 |
20120168801 | LIGHT EMITTING DEVICE AND PACKAGE STRUCTURE THEREOF - A light-emitting device package structure includes a carrier, at least one light-emitting device and a magnetic element. The magnetic element aids in enhancing overall luminous output efficiency. | 07-05-2012 |
Patent application number | Description | Published |
20110038166 | HIGH EFFICIENCY HEAT DISSIPATING DEVICE FOR LAMPS - A high efficiency heat dissipating device for lamps is disclosed. The lamp comprises a light-emitting element, a heat conduction body and a lamp housing characterized in that the heat conduction body is mounted at the lamp housing and the light-emitting element is mounted at the heat conduction body, heat from the light-emitting element is transferred by contacting with the heat conduction body such that the housing provides a large area for the function of heat dissipation, and the interior and exterior of the housing are increased with a plurality of lamp hoods depending on the power of the light-emitting element, and the multi-layer lamp hoods are combined with lamps of different specification, the housing is adapted for solid illumination such that heat energy is dissipated via the surface area of the multi-layer lamp hoods and by means of convection current, a great amount of energy is dissipated and therefore the heat dissipation rate is increased. | 02-17-2011 |
20120201034 | Wide-Range Reflective Structure - A wide-range reflective structure comprises a reflective case, a heat-sink metal frame, a heat conductive plate, and one control member for directing light beams. The heat conductive plate defines a recess for holding the heat-sink metal frame. The reflective case has a first inner curved reflective surface, a second inner curved reflective surface, a third inner curved reflective surface, and a fourth inner curved reflective surface. The reflective case is attached to the heat conductive plate, enclosing the heat-sink metal frame. The control member has two concave reflective surfaces. The first inner curved reflective surface has an inclination angle greater than the second inner curved reflective surface. The third inner curved surface has an inclination angle approximately equal to the fourth inner curved surface. As such, the inner curved reflective surfaces can cooperate with the control member to direct light beams from LEDs to a target more extensively and uniformly. | 08-09-2012 |
20130105133 | HEAT DISSIPATION ASSEMBLY | 05-02-2013 |
20130294062 | LED TUBE LAMP - The present disclosure provides an LED tube lamp including a base, a circuit board and at least one light emitting diode arranged on the circuit board. The base includes a connecting surface for mounting the circuit board and two side walls extending from the connecting surface. The two side walls are deformable and rigidly engage the circuit board on the connecting surface. | 11-07-2013 |
Patent application number | Description | Published |
20080261402 | METHOD OF REMOVING INSULATING LAYER ON SUBSTRATE - A method of removing an insulating layer on a substrate is described, including a first CMP process and a second CMP process performed in sequence, wherein the polishing slurry used in the first CMP process and that used in the second CMP process have substantially the same pH value that exceeds 7.0. A cleaning step is conducted between the first and the second CMP processes to remove a specific substance which would otherwise cause undesired particles to form in the second CMP process. | 10-23-2008 |
20090325382 | BEVEL ETCHER AND THE RELATED METHOD OF FLATTENING A WAFER - The wafer bevel etching apparatus of the present invention includes a wafer-protecting mask to cover parts of a wafer. A central region and a wafer bevel region surrounding the central region are defined on the wafer. The wafer-protecting mask includes a center sheltering region and at least one wafer bevel sheltering region. The center sheltering region can completely shelter the central region of the wafer, and the wafer bevel sheltering region extends from the outside edge of the center sheltering region, shelters parts of the wafer bevel region, and exposes the other parts of the wafer bevel region. | 12-31-2009 |
20110189855 | METHOD FOR CLEANING SURFACE CONTAINING Cu - A method for cleaning a surface is disclosed. First, a substrate including Cu and a barrier layer is provided. Second, a first chemical mechanical polishing procedure is performed on the substrate. Then, a second chemical mechanical polishing procedure is performed on the barrier layer. The second chemical mechanical polishing procedure includes performing a main chemical mechanical polishing procedure to partially remove the barrier layer and performing a chemical buffing procedure on the substrate using a chemical solution which has a pH value of about 6 to about 8 to remove residues on the substrate after the main chemical mechanical polishing procedure. Later, a water rinsing procedure is performed on the substrate. Afterwards, a post clean procedure is performed on the substrate after the second chemical mechanical polishing procedure. | 08-04-2011 |
20140256151 | METHOD FOR REMOVING NITRIDE MATERIAL - A method for removing silicon nitride material includes following steps. A substrate having at least a gate structure formed thereon is provided, and at least a silicon nitride hard mask is formed on top of the gate structure. A first removal is performed to remove a portion of the silicon nitride hard mask with a first phosphoric acid (H | 09-11-2014 |
20150064861 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A method for manufacturing a semiconductor device is provided. A substrate having a first gate and a second gate respectively formed in a first region and a second region is provided. An underlayer is formed on the substrate to cover the first gate in the first region and the second gate in the second region. A patterned mask with a predetermined thickness is formed on the underlayer in the first region. The underlayer corresponding to the second gate in the second region is removed by the patterned mask to expose the second gate, wherein the underlayer corresponding to the first gate in the first region is partially consumed to expose part of the first gate. | 03-05-2015 |
Patent application number | Description | Published |
20090126789 | Dye-sensitized solar cell - The present invention relates to a dye-sensitized solar cell that exhibits improved photoabsorption efficiency and optoelectronic conversion efficiency in the long-wavelength region. The dye-sensitized solar cell of the present invention, in coordination with an outer loop, comprises: a first substrate; a second substrate; and a photoenergy conversion layer disposed between the first substrate and the second substrate. Herein, the photoenergy conversion layer comprises an electrolytic condensed matter and pluralities of dye-adsorbed units dispersed in the electrolytic condensed matter. In addition, a first photonic crystal layer is disposed on the surface of the first substrate. A beam of light from the external environment can pass through the first photonic crystal layer and the first substrate to arrive in the photoenergy conversion layer. The photoenergy conversion layer can convert the photoenergy of the light to electric energy and the outer loop electrically connects to the first substrate and the second substrate. | 05-21-2009 |
20100035413 | Active layer for solar cell and the manufacturing method making the same - A method for manufacturing an active layer of a solar cell is disclosed, the active layer manufactured including multiple micro cavities in sub-micrometer scale, which can increase the photoelectric conversion rate of a solar cell. The method comprises following steps: providing a substrate having multiple layers of nanospheres which are formed by the aggregated nanospheres; forming at least one silicon active layer to fill the inter-gap between the nanospheres and part of the surface of the substrate; and removing the nanospheres to form an active layer having plural micro cavities on the surface of the substrate. The present invention also provides a solar cell comprising: a substrate, an active layer, a transparent top-passivation, at least one front contact pad, and at least one back contact pad. The active layer locates on a surface of the substrate and has plural micro cavities whose diameter is less than one micrometer. | 02-11-2010 |
20100270263 | Method for preparing substrate with periodical structure - A method for preparing a substrate with periodical structure, comprising the following steps: (A) providing a substrate and plural nano-sized balls, wherein the nano-sized balls are arranged on the surface of the substrate; (B) depositing a cladding layer on partial surface of the substrate and the gaps between the nano-sized balls; (C) removing the nano-sized balls; (D) etching the substrate by using the cladding layer as a mask; and (E) removing the mask to form a periodical structure on the surface of the substrate. In the present invention, the nano-sized balls are used as a template for forming the mask. Hence, compared with the lithography, when the method of the present invention is used to prepare a substrate with a periodical structure, the duration of the process and the manufacturing cost can be decreased. | 10-28-2010 |
20100270650 | Silicon substrate with periodical structure - A silicon substrate with periodical structure is disclosed, which comprises: a silicon substrate, and at least one periodical structure formed on at least one surface of the silicon substrate and having plural micro-cavities; wherein, the micro-cavities are arranged in an array, the micro-cavities are each in an inverted awl-shape or an inverted truncated cone-shape, the length of the base line of the micro-cavities in the inverted awl-shape is 100˜2400 nm, the diameter of the micro-cavities in the inverted truncated cone-shape is 100˜2400 nm, and the depth of the micro-cavities is 100˜2400 nm. | 10-28-2010 |
20100270651 | Sapphire substrate with periodical structure - A sapphire substrate with periodical structure is disclosed, which comprises: a sapphire substrate, and at least one periodical structure formed on at least one surface of the sapphire substrate and having plural micro-cavities; wherein, the micro-cavities are arranged in an array, the micro-cavities are each in an inverted awl-shape, the length of the base line of the micro-cavities is 100˜2400 nm, and the depth of the micro-cavities is 25˜1000 nm. | 10-28-2010 |
Patent application number | Description | Published |
20100110115 | Frame Rate Control Method and Display Device Using the Same - A frame rate control (FRC) method is provided for driving a number of pixels according to a number of pixels data. The pixels include a number of first color sub-pixels. In this method, the dithering process is performed to the pixels data in two frames according to two basic matrixes respectively. In one of the two frames, the numbers of the first color sub-pixels, driven by the positive pixel voltages and the negative pixel voltages and to which the dithering process has been performed, are the same in substantiality. Further, in the other of the two frames, the numbers of the first color sub-pixels, driven by the positive pixel voltages and the negative pixel voltages and to which the dithering process has been performed, are also the same in substantiality. | 05-06-2010 |
20100310530 | Cell Therapy for Brain Tissue Damage - Disclosed are methods for conditioning stems cells and using the conditioned stems cells for treating brain tissue damage. | 12-09-2010 |
20110007052 | DRIVING CIRCUIT AND LCD SYSTEM INCLUDING THE SAME - A driving circuit for an LCD system is provided. The LCD system includes a common electrode, a display electrode, and a capacitor. An AC voltage output terminal of the driving circuit is coupled to the common electrode via the capacitor. The display electrode and a charging/discharging unit in the driving circuit are respectively coupled to the AC voltage output terminal through a switch. According to requirements to change the electrical polarity of the common electrode, a control unit in the driving circuit turns on/off the two switches respectively so as to charge or discharge the AC voltage output terminal. | 01-13-2011 |
20120169654 | TOUCH SENSING APPARATUS - A touch sensing apparatus includes a plurality of pins, a logic control module, and at least one driving/sensing module. The driving/sensing control module is coupled with the pins and the logic control module. The driving/sensing control module controls the pins to execute a driving function according to a driving control signal at high voltage level and output a high voltage to a conductive thin film sensor. The driving/sensing control module includes an isolating switch, a high voltage device, and a medium/low voltage device, wherein the isolating switch is coupled with the high voltage device and the medium/low voltage device. The driving/sensing control module activates the isolating switch according to a isolating control signal at high voltage level to isolate the medium/low voltage device from the high voltage device for avoiding the high voltage from entering into the medium/low device that results in the damage of the medium/low voltage device. | 07-05-2012 |
20120169662 | TOUCH SENSING APPARATUS - A touch sensing apparatus is disclosed. The touch sensing apparatus includes a logic control module, at least one storage control module, and at least one decoding control module. The logic control module is used to generate a plurality of control signals having different control timings. The plurality of control signals includes a storage control signal and a decoding control signal. Each storage control module includes a plurality of storage capacitors, and respectively stores each of sensed voltages in different storage capacitors at different times according to a storage control timing of the storage control signal. The sensed voltages are analog data sensed from scan lines of an ITO sensor. The decoding control module performs analog adding process to the sensed voltages stored in the storage capacitors according to a decoding control timing of the decoding control signal to output decoded analog data with high signal-to-noise ratio (SNR). | 07-05-2012 |
20120206389 | TOUCH SENSING APPARATUS - A touch sensing apparatus includes a plurality of pins, a logic control module, and at least one amplifier module. The logic control module generates a plurality of control signals having different control timings, wherein the control signals include an amplifying control signal and a compensating control signal. Each amplifying module includes an amplifying unit and an automatic compensating unit. The amplifying unit includes a positive input end and a negative input end, wherein the amplifying unit determines, according to the amplifying control signal, a difference between a first sensing voltage and a second sensing voltage respectively received by the positive input end and the negative input end and amplifies the difference to output an analog data. The automatic compensating unit records, according to the compensating control signal, a digital compensation value corresponding to one of the pins and outputs the digital compensation value according to the compensating control signal. | 08-16-2012 |
20120206404 | TOUCH SENSING APPARATUS - A touch sensing apparatus includes a logic control module and at least one input control module. The logic control module generates a plurality of control signals having different control timings, wherein the control signals include an input control signal. The input control module is coupled with the logic control module, wherein each input control module includes a positive input switch and a negative input switch. The input control module controls, according to the input control signal, the positive input switch and the negative input switch to be deactivated or activated to control an input mode of a first sensing voltage and a second sensing voltage, which are analog data respectively sensed through a first sensing line and a second sensing line of a conductive thin film sensor, wherein the first sensing line and the second sensing line are sensing lines of adjacent channels. | 08-16-2012 |
20120229483 | PANEL DRIVING DEVICE AND DISPLAY DEVICE HAVING THE SAME - A panel driving device for driving a display panel including N data lines is disclosed. The panel driving device includes a memory array and a source driver. The memory array includes M memory blocks, a controller and an output unit. Each memory block includes N memory units. The controller is configured to divide serial image data into M groups of sub-image data and write each group of sub-image data into the corresponding memory block sequentially, wherein each group of sub-image data has N sub-image data. The output unit is configured to output the data in the M memory blocks sequentially in a time division manner in response to a selection signal. The source driver includes N driving units having the same configuration. After the driving unit receives the time-divided data output from the output unit, signal processing is performed to generate an image signal to be output to the corresponding data line. | 09-13-2012 |
20150084679 | PANEL DRIVING CIRCUIT AND RING OSCILLATOR CLOCK AUTOMATIC SYNCHRONIZATION METHOD THEREOF - A ring oscillator clock automatic synchronization method of a panel driving circuit includes steps of: when a vertical blanking interval happens, a master driver generates a pulse signal to slave drivers respectively. A pulse width of the pulse signal equals to N times of a master ring oscillator clock, wherein N is larger than 0. When a slave driver receives the pulse signal, the slave driver uses its slave ring oscillator clock to count the pulse width of the pulse signal to obtain that the pulse width of the pulse signal equals to M times of the slave ring oscillator clock, wherein M is larger than 0. The slave driver compares M with N and automatically adjusts the slave ring oscillator clock according to the comparison result to make it achieve synchronization with the master ring oscillator clock. | 03-26-2015 |
Patent application number | Description | Published |
20080228953 | Signal playback system with a dynamic wiring aid and method thereof - A signal playback system includes a plurality of connection interfaces installed for connecting at least one external device, an input interface for selecting one of the plurality of connection interfaces to be connected to the external device, a display device for displaying connecting information of the plurality of connection interfaces, and a logic unit for controlling the display device to display the corresponding connecting information according to the connection interface selected by the input interface. | 09-18-2008 |
20100203296 | TRANSFERRING STRUCTURE FOR FLEXIBLE ELECTRONIC DEVICE AND METHOD FOR FABRICATING FLEXIBLE ELECTRONIC DEVICE - The invention provides a transferring apparatus for a flexible electronic device and method for fabricating a flexible electronic device. The transferring apparatus for the flexible electronic device includes a carrier substrate. A release layer is disposed on the carrier substrate. An adhesion layer is disposed on a portion of the carrier substrate, surrounding the release layer and adjacent to a sidewall of the release layer. A flexible electronic device is disposed on the release layer and the adhesion layer, wherein the flexible electronic device includes a flexible substrate. | 08-12-2010 |
20140065399 | FLEXIBLE GRAPHITE SHEET AND METHOD FOR FABRICATING THE SAME AND COMPOSITE STRUCTURE FOR THE SAME - The present disclosure provides a flexible graphite sheet and a method for fabricating the same and a composite structure for the same. The method for fabricating a flexible graphite sheet comprises steps of coating an augmenting solution on a first film to form a composite structure, and heating the composite structure such that the first film and the augmenting solution form a flexible graphite sheet, wherein the thermal conducting cross-section of the flexible graphite sheet is larger than the thermal conducting cross-section of the first film, and the thermal conductivity of the flexible graphite sheet ranges from 1200 to 6000 W/m° C. | 03-06-2014 |
Patent application number | Description | Published |
20100309638 | ELECTRONIC ELEMENT PACKAGING MODULE - An electronic element packaging module including a lead frame, an insulating layer and at least one electronic element is provided. The lead frame is a patterned metal sheet and has a first surface, a second surface opposite thereto and a through trench passing from the first surface to the second surface. A substrate portion and a plurality of lead portions around the substrate portion of the lead frame are defined by the through trench. The second surface of the lead frame is exposed outside the electronic element packaging module. The insulating layer disposed in the through trench has a third surface and a forth surface substantially coplanar with the first and the second surfaces, respectively. The electronic element disposed on the first surface is coupled to the lead frame. | 12-09-2010 |
20120075808 | ELECTRONIC PACKAGE STRUCTURE - An electronic package structure is provided. The electronic package structure comprises a substrate, a first electronic element, and a second electronic element. The substrate includes a heat-dissipating plate and a circuit board disposed on the heat-dissipating plate. The first electronic element is disposed on the heat-dissipating plate and coupled to the circuit board. The second electronic element is disposed on the circuit board and coupled to the circuit board. | 03-29-2012 |
20120262074 | DRIVING CIRCUIT OF LIGHT EMITTING DIODES HAVING AT LEAST ONE BYPASS CIRCUIT, AND DRIVING METHOD THEREOF - A driving circuit of light emitting diodes includes a power supply circuit, at least one bypass circuit, and a temperature control circuit. The power supply circuit is used for providing a driving voltage to at least one series of light emitting diodes. Each bypass circuit of the at least one bypass circuit is used for being turned on when an ambient temperature is lower than a predetermined temperature. The temperature control circuit is coupled to the at least one bypass circuit for detecting the ambient temperature, and sending a control signal to the at least one bypass circuit when the ambient temperature is lower than the predetermined temperature. Therefore, the driving voltage can still drive the at least one series of light emitting diodes when the ambient temperature is lower than the predetermined temperature. | 10-18-2012 |
20120268896 | METAL CORE PRINTED CIRCUIT BOARD AND ELECTRONIC PACKAGE STRUCTURE - An electronic package structure is provided which comprises a metal core PCB, an energy storage device and at least one electronic component. The at least one electronic component is disposed between the metal core PCB and the energy storage device. The metal core PCB defines at least a through hole. A thermal passage is disposed in the through hole. An insulating layer is disposed in the through hole and located between the metal layer of the metal core PCB and the thermal passage to prevent the electric coupling between the thermal passage and the metal layer. The energy storage device comprises at least a connecting pin in thermal contact with the thermal passage. | 10-25-2012 |
20130093069 | PACKAGE STRUCTURE AND THE METHOD TO FABRICATE THEREOF - The invention discloses a package structure made of the combination of a metallic substrate and a lead frame. In one embodiment, a recess is formed in the metallic substrate and a first conductive element having at least one first I/O terminal is bonded in the recess. A lead frame is formed on the metallic substrate and comprises a plurality of electrical connections to connect with said at least one first I/O terminal of the first conductive element. In another embodiment, another conductive element is disposed in the vacancy of the lead frame. The invention also discloses a method for manufacturing a package structure made of the combination of a metallic substrate and a lead frame. | 04-18-2013 |
20130213704 | PACKAGE STRUCTURE AND THE METHOD TO FABRICATE THEREOF - The invention discloses a package structure made of the combination of a device carrier and a modifiable substrate. In one embodiment, a recess is formed in the device carrier and a conductive element is disposed on the substrate, wherein the substrate is disposed on the device carrier and the conductive element is located in the recess of the device carrier. The conductive pattern in the substrate is electrically connected to the device carrier and I/O terminals of the first conductive element. The invention also discloses a method for manufacturing a package structure made of the combination of a device carrier and a modifiable substrate. In one embodiment, a portion of the conductive pattern in the substrate can be modified. | 08-22-2013 |
20140042610 | PACKAGE STRUCTURE AND THE METHOD TO FABRICATE THEREOF - The invention discloses a package structure with at least one portion of a first conductive element disposed in a through-opening of a first substrate. A conductive structure is disposed on the first substrate and the first conductive element, wherein the conductive structure is electrically connected to the first substrate and said at least one first I/O terminal of the first conductive element. The conductive structure comprises at least one of a second conductive element, a second substrate or a conductive pattern. | 02-13-2014 |
Patent application number | Description | Published |
20110134318 | HEAD-MOUNTED VISUAL DISPLAY DEVICE FOR LOW-VISION AID AND ITS SYSTEM - A head-mounted visual display device for low-vision aid, which features 2 models, they are analog signal model and digital signal model. Said analog device contains at least an analog video extractor, a video decoder, an ITU-R.656 decoder, a de-interlacing unit, an image processor, two YCbCr to RGB converter, two color enhancement units, two video D/A converter, a head mounted display, a signal voltage controller and a wireless communication module. Said digital device consists of a digital video signal extractor/capturer, a RGB to YCbCr converter, an image processor, two YCbCr to RGB converter, two color enforcement units, a head-mounted display, a signal voltage controller and a wireless communication module. | 06-09-2011 |
20110134319 | HEAD-MOUNTED VISUAL DISPLAY DEVICE WITH STEREO VISION AND ITS SYSTEM - A head-mounted visual display device for low-vision aid, which features 2 models, they are analog signal model and digital signal model. Said analog device contains at least an analog video extractor, a video decoder, an ITU-R.656 decoder, a de-interlacing unit, an image processor, two YCbCr to RGB converter, two color enhancement units, two video D/A converter, a head mounted display, a signal voltage controller and a wireless communication module. Said digital device consists of a digital video signal extractor/capturer, a RGB to YCbCr converter, an image processor, two YCbCr to RGB converter, two color enforcement units, a head-mounted display, a signal voltage controller and a wireless communication module. | 06-09-2011 |
Patent application number | Description | Published |
20090016546 | Audio control apparatus - An audio control apparatus. The audio control apparatus comprises a processing module, an amplification module, and a control module. The processing module receives and processes an audio signal according to a control signal, and generates a processed signal. The amplification module coupled to the processing module, amplifies the processed signal to generate an output signal. The control module coupled to the processing module and the amplification module, receives the output signal to generate the control signal. | 01-15-2009 |
20090074210 | Audio signal processing apparatus - An audio signal processing apparatus is provided. The audio signal processing apparatus comprises a clock generator, a processing module, an amplifying module and an output module. The clock generator is used for generating a clock signal. The processing module is coupled to the clock generator for processing the clock signal and generating a processing signal. The amplifying module is coupled to the processing module for amplifying the processing signal and generating an amplifying signal. The output module is coupled to the amplifying module for outputting the amplifying signal. | 03-19-2009 |
20090154731 | AUDIO PLAYBACK APPARATUS - An audio playback apparatus is disclosed. The audio playback apparatus processes an audio signal and provides at least one output signal to at least one speaker or an earphone connected to a phone-jack. The audio playback apparatus comprises a clock generating module, a processing module, an amplifier module, and a detecting module. The processing module is connected to the clock generating module and processes the audio signal to generate a processed signal according to a clock signal generated by the clock generating module. The amplifier module amplifies the processed signal to generate an output signal. The detecting module detects whether the earphone is plugged in the phone-jack. If the earphone is plugged in the phone-jack, the amplifier module provides the output signal to the earphone. If not, the amplifier module provides the output signal to the speaker. | 06-18-2009 |
20100166192 | INTEGRATED CIRCUIT FOR REDUCING RADIO FREQUENCY INTERFERENCE DUE TO ANTENNA EFFECTS - The invention provides an integrated circuit for reducing radio frequency interference due to antenna effects. In one embodiment, the integrated circuit includes a pre-stage audio processor and a post-stage power amplifier. The pre-stage audio processor receives a left channel input signal and a right channel input signal, processes the left channel input signal to obtain a positive left channel signal and a negative left channel signal, and processes the right channel input signal to obtain a positive right channel signal and a negative right channel signal. The post-stage power amplifier amplifies the positive left channel signal and the negative left channel signal to obtain a left channel output signal, and amplifies the positive right channel signal and the negative right channel signal to obtain a right channel output signal. | 07-01-2010 |
20130156232 | AMPLIFYING CIRCUIT CAPABLE OF SUPPRESSING SPIKES OF AN AUDIO SIGNAL - An amplifying circuit capable of suppressing spikes of an audio signal includes an integration module, a comparison module, an output module, a feedback module, and a limiting module. The integration module is used for receiving an input signal and generating a first voltage signal corresponding to the input signal. The comparison module is coupled to the integration module for receiving the first voltage signal and a reference signal, and generating a comparison signal. The output module is coupled to the comparison module for generating an audio signal according to the comparison signal. The feedback module is coupled between the output module and the integration module for feeding back an output signal to the integration module. The limiting module is coupled between the feedback module and the integration module for limiting the comparison signal to be within a predetermined range. | 06-20-2013 |
20130335143 | CLASS-D POWER AMPLIFIER CAPABLE OF REDUCING ELECTROMAGNETIC INTERFERENCE AND TRIANGULAR WAVE GENERATOR THEREOF - A class-D power amplifier capable of reducing electromagnetic interference includes an integrator, a triangular wave generator, a comparator, a gate driver, a feedback circuit, and an output stage circuit. The integrator is used for receiving an input signal and potential of ground, and outputting a first voltage. The comparator is used for comparing the first voltage with a triangular wave generated by the triangular wave generator to output a pulse-width modulation signal. The gate driver is used for driving the output stage circuit to output an output voltage according to the pulse-width modulation signal. Therefore, the class-D power amplifier reduces the electromagnetic interference by the triangular wave. | 12-19-2013 |
Patent application number | Description | Published |
20110193691 | VIBRATION MODULE AND VIBRATION METHOD - A vibration module is suitable for an electronic device. The vibration module includes a vibration element, a plurality of pressing units, and a vibration regulating circuit. The pressing units are disposed on the electronic device and respectively have a coordinate relative to the vibration element. The vibration regulating circuit is disposed in the electronic device and coupled to the vibration element and the pressing units. The vibration regulating circuit calculates a distance between one of the pressing units and the vibration element and regulates an output vibration strength of the vibration element based on the distance. | 08-11-2011 |
20110194305 | DECORATION PANEL - A light guide module capable of illuminating and being applied in a device for decoration is provided. The light guide module includes a reflective layer, a light guide with a plurality of diffusing particles, and a light source. The light guide has a side surface, a reflective surface and a light-exiting surface, thereby allowing a light from the light source to enter and reflect and exit the light guide respectively. The reflective layer is disposed on the reflective surface of the light guide for reflecting the light to the light-exiting surface. The light guide forms a portion of an outer surface of the device. | 08-11-2011 |
20110304514 | ANTENNA-EMBEDDED ELECTRONIC DEVICE CASE - An antenna-embedded electronic device case includes an electrically-insulated case wall, a lower and an upper ground conductive layers, a lower and an upper electrically-insulated layer, and a continuous conductive layer. The lower ground conductive layer is in contact with the electrically-insulated case wall. The lower and upper electrically-insulated layers are sandwiched between the lower and upper ground conductive layers. The continuous conductive layer has a first portion sandwiched between the lower and upper electrically-insulated layers and a second portion protruding out to serve as an antenna radiator for transmitting or receiving electromagnetic signals. | 12-15-2011 |
20120282420 | DECORATIVE LAMINATION STRUCTURE, OUTER HOUSING STRUCTURE AND METHOD FOR MANUFACTURING OUTER HOUSING STRUCTURE - An outer housing structure includes a soft polymer layer, a decorative layer and a plastic injection substrate. The soft polymer layer includes a three-dimensional texture surface. The decorative layer is disposed on a surface of the soft polymer layer, which is opposite to the three-dimensional texture surface. The plastic injection substrate is disposed the decorative layer, wherein the decorative layer is disposed between the soft polymer layer and the plastic injection substrate, and the plastic injection substrate and the decorative layer are bonded by a plastic injection process. | 11-08-2012 |
20120325551 | FLAT COAXIAL CABLE AND FABRICATING METHOD THEREOF - A flat coaxial cable includes an insulating base layer, a conductor line layer, an insulating cover layer, an electromagnetic shield layer and an outer insulating layer. The conductive layer is disposed on the insulating base layer. The insulating cover layer and the insulating base layer encompass the conductor line layer, wherein the insulating cover layer and the insulating base layer form an inner insulating layer. The electromagnetic shield layer encompasses the inner insulating layer. The outer insulating layer encompasses the electromagnetic shield layer. | 12-27-2012 |
20140125551 | METHOD FOR ASSEMBLING HOUSING OF ELECTRONIC DEVICE AND HOUSING ASSEMBLY OF ELECTRONIC DEVICE - A method for assembling a housing of an electronic device including the following steps is provided. An antenna pattern layer and an adhesive layer is provided, wherein the antenna pattern layer has a first surface opposite a second surface, and the adhesive layer is disposed on the first surface of the antenna pattern layer. A plastic frame is formed on the second surface of the antenna pattern layer by injection molding. The antenna pattern layer and the plastic frame are attached on a substrate via the adhesive layer. In addition, a housing assembly of an electronic device is also provided. | 05-08-2014 |
20140333846 | DISPLAY APPARATUS, FABRICATING METHOD THEREOF AND OPTICAL ADHESIVE - A display apparatus includes a first panel, a display panel disposed at one side of the first panel, a film with a hallow region disposed between the first panel and the display panel, and an optical adhesive disposed in the hollow region of the film and between the first panel and the display panel. | 11-13-2014 |
Patent application number | Description | Published |
20090138650 | METHOD AND APPARATUS FOR MANAGING FIRMWARE OF AN OPTICAL STORAGE APPARATUS - A method of managing a firmware includes configuring the firmware to include at least a first firmware portion with a plurality of program codes, and a second firmware portion with a plurality of parameters separately; and storing the first firmware portion and the second firmware portion in a first storage area and a second storage area of a first storage module, respectively. | 05-28-2009 |
20090293115 | AUTHORIZATION SYSTEM OF NAVIGATION DEVICE AND ASSOCIATED AUTHORIZATION METHOD - An authorization system of a navigation device includes a first identification (ID) module and a second ID module. The first ID module is arranged to perform authorization for a first portion of the navigation device, and the second ID module is arranged to perform authorization for a second portion of the navigation device. The first and the second ID modules perform bidirectional authorization of the first and the second portions, and further determine behavior of the navigation device according to a result of the bidirectional authorization. An associated authorization method for controlling the navigation device is further provided. | 11-26-2009 |
20100085848 | METHOD FOR PERFORMING TRACK-SEEKING IN AN OPTICAL DISK DRIVE - The invention provides a method for performing track-seeking in an optical disk drive. In one embodiment, the optical disk drive is about to perform a series of operations comprising a plurality of prior operations and a track-seeking operation, and the track-seeking operation is divided into a pre-seek procedure and a true-seek procedure. First, a microprocessor of the optical disk drive performs the prior operations. Whether the microprocessor is unoccupied is then detected before performing the prior operations is completed. When the microprocessor is detected to be unoccupied, the microprocessor performs the pre-seek procedure. The true-seek procedure is then performed according to results of the pre-seek procedure to move the pick-up head to a destination address of an optical disk. | 04-08-2010 |
Patent application number | Description | Published |
20080320069 | VARIABLE LENGTH FFT APPARATUS AND METHOD THEREOF - The invention discloses a variable length FFT apparatus and a method thereof. The FFT apparatus includes a split-radix based FFT unit and a multiplexing unit. The split-radix based FFT unit has a plurality of processing elements cascaded in a series. The multiplexing unit is coupled to the split-radix based FFT unit, and is for selectively bypassing at least one of the processing elements according to the size of input data when the split-radix based FFT unit performs the FFT computation on the input data. The FFT apparatus of the present invention therefore has a simple structure and is flexible for any FFT size. | 12-25-2008 |
20090028254 | TIME DOMAIN SYMBOL TIMING SYNCHRONIZATION CIRCUIT AND METHOD THEREOF FOR COMMUNICATION SYSTEMS - A time domain symbol timing synchronization circuit is disclosed, which comprises: an autocorrelation function calculator for calculating cyclic prefix autocorrelation functions and an offset time estimator for searching peak positions of cyclic prefix autocorrelation functions to indicate symbol boundary of received communication symbols. The offset time estimator compares a current peak position and a previous peak position. If (a) the difference of the positions is larger than a threshold and (b) the current peak is smaller than a reference average peak, the current peak is determined as false; the offset time estimator weeds out and replaces the current peak position by the previous peak position; and the current peak is not introduced in the reference average peak calculation. | 01-29-2009 |
20090036071 | NULL DETECTOR AND METHOD THEREOF - A null detector and its corresponding method are provided. The null detector includes a power detector, a smoother, and an overlapper. The power detector outputs a power level signal according to the power level of a received signal. The smoother is coupled to the power detector for determining according to the power level signal whether the received signal is transmitting a null symbol, and then the smoother outputs a null detection signal at a first state value or a second state value indicating the result of the determination. The overlapper is coupled to the smoother for providing the duration and position of the null symbols transmitted by the received signal according to the null detection signal. | 02-05-2009 |
20090125794 | ACS UNIT OF A VITERBI DECODER AND METHOD FOR CALCULATING A BIT ERROR RATE BEFORE A VITERBI DECODER - An ACS unit of a Viterbi decoder and a method for calculating the bit error rate (BER) before Viterbi decoder are provided. The ACS unit includes a state calculator and a BER calculator. The state calculator calculates the state metric of a corresponding target state in the trellis diagram and selects one of two candidate source states as the selected source state of the target state. The state calculator also provides a selection signal indicating the selected source state. The BER calculator is coupled to the state calculator for providing the sum of the BER of the selected source state and the bit error count (BEC) of the transition from the selected source state to the target state as the BER of the target state. | 05-14-2009 |
Patent application number | Description | Published |
20100136579 | BIOMARKERS USEFUL IN LIVER FIBROSIS DIAGNOSIS - Identification of urokinase-type plasminogen, matrix metalloproteinase 9, and β-2-microglobulin as novel biomarkers associated with liver fibrosis and uses thereof in diagnosing liver fibrosis. | 06-03-2010 |
20100197033 | URINE AND SERUM BIOMARKERS ASSOCIATED WITH DIABETIC NEPHROPATHY - Use of urine and serum biomarkers in diagnosing diabetic nephropathy, staging diabetic nephropathy, monitoring diabetic nephropathy progress, and assessing efficacy of diabetic nephropathy treatments. These biomarkers include urine precursor alpha-2-HS-glycoprotein, urine alpha-1 antitrypsin, urine alpha-1 acid glycoprotein, urine osteopontin, serum osteopontin, their fragments, and combinations thereof. | 08-05-2010 |
20110079077 | Urine and Serum Biomarkers Associated with Diabetic Nephropathy - Use of urine and serum biomarkers in diagnosing diabetic nephropathy, staging diabetic nephropathy, monitoring diabetic nephropathy progress, and assessing efficacy of diabetic nephropathy treatments. These biomarkers include urine precursor alpha-2-HS-glycoprotein, urine alpha-1 antitrypsin, urine alpha-1 acid glycoprotein, urine osteopontin, serum osteopontin, their fragments, and combinations thereof. | 04-07-2011 |
20110086371 | URINE AND SERUM BIOMARKERS ASSOCIATED WITH DIABETIC NEPHROPATHY - Use of urine and serum biomarkers in diagnosing diabetic nephropathy, staging diabetic nephropathy, monitoring diabetic nephropathy progress, and assessing efficacy of diabetic nephropathy treatments. These biomarkers include urine precursor alpha-2-HS-glycoprotein, urine alpha-1 antitrypsin, urine alpha-1 acid glycoprotein, urine osteopontin, serum osteopontin, their fragments, and combinations thereof. | 04-14-2011 |
20120184453 | BIOMARKERS FOR RECURRENCE PREDICTION OF COLORECTAL CANCER - Methods for determining the likelihood of colorectal cancer (CRC) recurrence in a subject that involve measuring the expression level of two or more micro ribonucleic acids (miRNAs) in a biological sample comprising CRC tumor cells from said subject and using the normalized, measured expression levels to determine the likelihood of colorectal cancer recurrence for said subject. In the methods, the normalized expression levels of specific miRNAs are weighted by their contribution to CRC recurrence to calculate the likelihood of CRC recurrence. Kits for measuring the expression level of specific miRNAs that can be used in determining the likelihood of CRC recurrence are also provided. | 07-19-2012 |
20130252267 | URINE AND SERUM BIOMARKERS ASSOCIATED WITH DIABETIC NEPHROPATHY - Described are uses of urine and serum biomarkers in diagnosing diabetic nephropathy, staging diabetic nephropathy, monitoring diabetic nephropathy progress, and assessing efficacy of diabetic nephropathy treatments. These biomarkers include urine precursor alpha-2-HS-glycoprotein, urine alpha-1 antitrypsin, urine alpha-1 acid glycoprotein, urine osteopontin, serum osteopontin, their fragments, and combinations thereof. | 09-26-2013 |