Li, San Jose
Alan Li, San Jose, CA US
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20090049190 | MULTIPLE POINTS OF PRESENCE IN REAL TIME COMMUNICATIONS - Systems and methods are provided for multiple points of presence (MPOP) in the real time communication of data between or among users. More particularly, according to embodiments of the present invention, a messaging service network is provided that allows a user to connect to the messaging service network from multiple client devices and access features associated with the messaging service network from any one of the multiple client devices at any point in time. In this manner, a user can seamlessly transition among multiple client devices without interruption and access services provided by the messaging service network including, but not limited to, sending/receiving instant message (or “IM”) data to other user(s), publishing/subscribing presence to other user(s), making/receiving phone calls between user(s), etc. | 02-19-2009 |
20090259864 | SYSTEM AND METHOD FOR INPUT/OUTPUT CONTROL DURING POWER DOWN MODE - A system and method for maintaining values on output pads of an integrated circuit during entry, exit, and while a portion of the integrated circuit is in a power conservation or deep power down mode. The method for entering a power conservation mode includes determining a power conservation mode value which will be maintained at an output pad while a portion of an integrated circuit is in a power conservation mode. The power conservation mode value may then be selected for output and the power conservation mode value is held at the output pad. The portion of the integrated circuit to enter the power conservation mode is then electrically decoupled from the output pad. The portion of the integrated circuit may then be placed in the power conservation mode without output signal slighting while maintaining the output value. | 10-15-2009 |
Anthony J. Li, San Jose, CA US
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20120221624 | Client Diversity Policy Sharing with the Transport Layer - Diversity constraints with respect to connections or links in a client layer are conveyed to a server layer where those links or connections are served by paths in the server layer. A network device in the server layer stores data associated paths in the server layer with identifiers for connections in the client layer. The network device in the server layer receives from a network device in the client layer a request to set up a path in the server layer for a connection in the client layer. The network device in the server layer receives information describing the diversity requirements associated with connections in the client layer. The server layer network device computes a route in the server layer for the connection specified in the request based on the diversity requirements. | 08-30-2012 |
Barn-Wan Li, San Jose, CA US
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20090077460 | SYNCHRONIZING SLIDE SHOW EVENTS WITH AUDIO - Technologies are described herein for synchronizing slide show events with audio. Data defining one or more animation events, slide transitions, or visual effects and an audio file to be played during the defined events is received. The audio file is processed to identify the audio events contained therein. Once the audio events in the audio file have been identified, the defined animation events are synchronized to the identified audio events using an audio synchronization scheme that includes data defining how the audio events are to be synchronized to the animation events. A user interface may be provided that allows a user to select an audio synchronization scheme to be applied to a presentation. A user interface may also be provided that allows a user to visually associate an animation event with any audio event identified within an audio file. | 03-19-2009 |
20090079744 | ANIMATING OBJECTS USING A DECLARATIVE ANIMATION SCHEME - Technologies are described herein for animating objects through the use of animation schemes. An animation scheme is defined using a declarative language that includes instructions defining the animations and/or visual effects to be applied to one or more objects and how the animations or visual effects should be applied. The animation scheme may include rules which, when evaluated, define how the objects are to be animated. An animation scheme engine is also provided for evaluating an animation scheme along with other factors to apply the appropriate animation to each of the objects. The animation scheme engine retrieves an animation scheme and data regarding the objects. The animation scheme engine then evaluates the animation scheme along with the data regarding the objects to identify the animation to be applied to each object. The identified animations and visual effects are then applied to the objects. | 03-26-2009 |
20100077319 | Presentation Facilitation - Multiple schemes and techniques for facilitating presentations with an interactive application are described. For example, an interactive application provides a console view overlay for integrating multiple productivity applications into a graphical user interface (GUI) window. An interactive application can also share a selected display portion of the console view overlay with other interactive applications. As another example, presenters and other audience members can draw on the selected display portion being shared, and the drawn graphics are synchronously displayed by the other interactive applications. Interactive applications, as directed by their users, can join various member groups and specific presentations thereof. Moreover, a user may share content in accordance with membership grouping. | 03-25-2010 |
20100156911 | TRIGGERING ANIMATION ACTIONS AND MEDIA OBJECT ACTIONS - A request may be received to trigger an animation action in response to reaching a bookmark during playback of a media object. In response to the request, data is stored defining a new animation timeline configured to perform the animation action when playback of the media object reaches the bookmark. When the media object is played back, a determination is made as to whether the bookmark has been encountered. If the bookmark is encountered, the new animation timeline is started, thereby triggering the specified animation action. An animation action may also be added to an animation timeline that triggers a media object action at a location within a media object. When the animation action is encountered during playback of the animation timeline, the specified media object action is performed on the associated media object. | 06-24-2010 |
20100169753 | MEDIA PORTABILITY AND COMPATIBILITY FOR DIFFERENT DESTINATION PLATFORMS - Tools and techniques for media portability and compatibility for different destination platforms are provided. These tools may receive commands to launch a media portability capability, and may receive source media as input for transformation. These tools may also receive indications of profile settings for specifying how to transform the source media for enhanced portability on destination systems for playback. The source media may be transformed in response to the profile setting, with the transformed media inserted into a document. The tools may then distribute the document to the destination system for playback | 07-01-2010 |
20100275123 | Media Timeline Interaction - Media timeline interaction may be provided. An electronic presentation may comprise a media object. A user may select the media object within a presentation application and use an on-object user interface in conjunction with the application's user interface to modify the media object. The user may also display the modified media object within the presentation application. | 10-28-2010 |
20110314361 | GENERATING RECOMMENDATIONS FOR IMPROVING A PRESENTATION DOCUMENT - User actions, content, and other elements related to a presentation document are received. These elements are analyzed to generate recommendations for improving a presentation document. The presentation document may be modified in accordance with the recommendations. | 12-22-2011 |
Charng-Show Li, San Jose, CA US
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20120287829 | Adaptive pause time energy efficient ethernet PHY - An energy efficient Ethernet physical layer (PHY) device including an EEE control module configured to generate a control signal to transition the PHY device into a low power consumption mode based an operating condition, and a pause frame generator module responsive to the control signals to generate a pause frame. The pause frame generator module is configured to send the pause frame to a media access control (MAC) device to reduce an incoming flow of data packets from the MAC device to the PHY device for a pause time duration. In operation, the pause frame generator module generates the pause frame including a pause time indicating the length of time for the PHY device to be in the low power consumption mode. The value of the pause time for each pause frame is determined adaptively based on the amount of data traffic to be transmitted from the PHY device. | 11-15-2012 |
Chian Chiu Li, San Jose, CA US
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20090174885 | Sensor And Method Utilizing Multiple Optical Interferometers - Disclosed is a low-cost high-resolution compact accelerometer which utilizes multiple self-mixing optical interferometers. The device is also a micro-opto-electro-mechanical systems (MOEMS) sensor. The interferometers are used to detect acceleration as well as monitor the wavelength, temperature, and refractive index and perform differential measurements. In addition, photodetectors are employed to monitor the input optical power. | 07-09-2009 |
20090195789 | Biosensing Apparatus And Method Using Optical Interference - A label-free interferometric biosensor is disclosed which is based on the self-mixing optical interferometer. Inside the biosensor, an incoming beam is divided into two beam portions which pass through a channel and bio materials, respectively. Interference of the portions is realized by the self-mixing effect and used to detect existence of an analyte, such as DNA or protein molecules. The label-free biosensor is compact and can be made on a chip using the semiconductor technology. It is also convenient to use due to moderate alignment requirement. Furthermore, an array of the interferometers fabricated on a chip enables high-throughput and highly parallel measurements. | 08-06-2009 |
20110310394 | Compact Surface Plasmon Resonance Apparatus And Method - A miniaturized surface plasmon resonance (SPR) sensor is introduced for on-chip applications. The sensor's sensing surface is arranged in between a light source and detector. The structure facilitates building a SPR device on a chip. In one embodiment, a prism and light source are placed on top of a detector chip. In another embodiment, a self-mixing interferometer is incorporated to enable highly sensitive phase measurement. Other embodiments include SPR systems with integrated optical power monitors or on-chip microfluidic SPR systems. | 12-22-2011 |
20120139787 | Beam Steering And Manipulating Apparatus And Method - An apparatus and method for electromagnetic beam steering and manipulating employ narrow beams in close proximity. The beam width and distance between neighboring beams are around or smaller than the wavelength. A strong beam is steered by a much weaker beam. A strong beam is also focused by a relatively small group of much weaker beams. The resulting device is compact and has better power efficiency. | 06-07-2012 |
David Ching Li, San Jose, CA US
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20080313053 | PAYMENT SERVICE - A method and system to offer a payment service to a consumer user. The system receives a check-out request from the consumer user of an electronic storefront. The check-out request is for purchase one or more products from the electronic storefront. The system determines whether to offer a payment service to the consumer user by identifying whether the consumer user is authorized to use the payment service to make purchases from the electronic storefront. Finally, the system serves a web-based check-out interface to a client used by the consumer user. The check-out interface includes an offer to the consumer user to use the payment service. Specifically, the offer includes an option to enable the consumer user to make payment for the one or more products via the payment service. | 12-18-2008 |
20100057589 | PAYMENT SERVICE TO EFFICIENTLY ENABLE ELECTRONIC PAYMENT - A method to redirect a browser client is disclosed. The method comprises serving a first web page including a check-out option and receiving a check-out request from a consumer user of an electronic storefront web site. The check-out request is to purchase a product. In response to the check-out request the browser client is redirected to a web page hosted by a payment service web site. The payment service web site stores information that includes a return URL that corresponds to a web-based interface that is hosted by the electronic storefront web site. The redirection further includes a comparison of the return URL in the stored information to a return URL that corresponds to the web-based interface that is hosted by the electronic storefront web site. The comparison is to determine whether redirection to the web-based interface hosted by the electronic storefront web site should be performed. | 03-04-2010 |
20100325042 | PAYMENT SERVICE TO EFFICIENTLY ENABLE ELECTRONIC PAYMENT - A method to redirect a browser client is disclosed. The method comprises storing information at a payment service web site that includes a return URL (uniform resource locator) corresponding to a web-based interface hosted by a merchant web site. Next, the method comprise extracting the return URL embedded in the information and comparing, the return URL to a reference return URL corresponding to the web-based interface hosted by the merchant web site. Finally, the method comprises identifying the return URL matches the reference return URL and redirecting the browser client to the web-based interface hosted by the merchant web site responsive to the identifying the match. | 12-23-2010 |
20110246367 | Payment service to efficiently enable electronic payment - A method to forward a browser client is disclosed. The method comprises storing information at a payment service server. The information includes a return network address corresponding to a interface hosted by a merchant server. Next, the method performs the step of comparing the return network address that is included in the information to a reference return network address corresponding to the interface hosted by the merchant server and identifying whether the return network address matches the reference return network address. Finally, the method comprises forwarding the browser client to the interface hosted by the merchant server responsive to the identifying the match. | 10-06-2011 |
20120150688 | PAYMENT SERVICE TO EFFICIENTLY ENABLE ELECTRONIC PAYMENT - A method comprising communicating a web page, over a network, to a merchant server associated with a merchant. The web page includes a plurality of input mechanisms for receiving a plurality of reference return network addresses. The method further comprises receiving a first reference return network address, over a network, from the merchant, the first reference return network address being received at the payment service server, the first reference return network address identifying an interface that is hosted by a first merchant web site that is operated by the merchant and being utilized as a first landing page to which the consumer user is redirected to by the payment server to execute a transaction between the consumer user and the merchant. Finally, the method comprises storing the first reference return network address at the payment service server in user profile information that is associated with the merchant. | 06-14-2012 |
Delin Li, San Jose, CA US
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20090272422 | Solar Cell Design and Methods of Manufacture - A solar cell has a first surface and the second surface areas. The first surface is a semi-cylindrical area or modified semi-cylindrical area. The first surface is a flattened area. Sunlight strikes the semi-cylindrical area of the solar cell surface with a maximum incident angle from sunrise to sunset. A mirror may be attached on the top surface of the solar cell to further improve the efficiency. | 11-05-2009 |
20100059385 | METHODS FOR FABRICATING THIN FILM SOLAR CELLS - The present invention relates to CIGS solar cell fabrication. The invention discloses a method for fabricating CIGS thin film solar cells using a roll-to-roll system. The invention discloses method to fabricate semiconductor thin film Cu(InGa)(SeS) | 03-11-2010 |
20130230933 | METHODS FOR FABRICATING THIN FILM SOLAR CELLS - A method for fabricating a thin-film solar cell. The method includes rolling a flexible substrate prepared with a metalized surface out of a roll to move linearly with a speed. The method further includes forming a back-electrode film overlying the metalized surface moving with the speed. Additionally, the method includes forming a stack of films comprising at least copper, gallium, and indium overlying the back-electrode film and forming a Se-alloy layer overlying the stack of films. Furthermore, the method includes depositing a Se—Na bearing film overlying the Se-alloy layer from a vacuum evaporator having at least two sources. Moreover, the method includes performing a thickness measurement in real time for the back-electrode film, the stack of films, and the Se-alloy layer on the flexible substrate moving with the speed to control the Se-alloy layer in a thickness of 10-100 nm corresponding to the Se—Na film in a thickness of 1-3 microns. | 09-05-2013 |
20130240363 | METHODS FOR FABRICATING THIN FILM SOLAR CELLS - The present invention relates to CIGS solar cell fabrication. The invention discloses a method for fabricating CIGS thin film solar cells using a roll-to-roll apparatus. The invention discloses method to fabricate semiconductor thin film Cu(InGa)(SeS) | 09-19-2013 |
20140124362 | METHODS FOR FABRICATING THIN FILM SOLAR CELLS - The present invention relates to CIGS solar cell fabrication. The invention discloses a method for fabricating CIGS thin film solar cells using a roll-to-roll apparatus. The invention discloses method to fabricate semiconductor thin film Cu(InGa)(SeS) | 05-08-2014 |
20140141562 | REACTION APPARATUS AND METHOD FOR MANUFACTURING A CIGS ABSORBER OF A THIN FILM SOLAR CELL - The present invention provides an apparatus and a method for manufacturing a CIGS absorber of a thin film solar cell. The apparatus includes a supply chamber configured to provide a flexible substrate coated with precursors. The apparatus further includes a reaction chamber coupled to the supply chamber for at least subjecting the precursors on the flexible substrate to a reactive gas at a first state to form an absorber material. Additionally, the apparatus includes a gas-balancing chamber filled with the reactive gas at a second state. The gas-balancing chamber is communicated with the reaction chamber for automatically updating the first state of the reactive gas to the second state. Moreover, the apparatus includes a control system to maintain the second state of the reactive gas in the gas-balancing chamber at a preset condition and to adjust the transportation of the flexible substrate through the reaction chamber. | 05-22-2014 |
20140220732 | CONDUCTIVE PASTE FOR FRONT ELECTRODE OF SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THEREOF - The present invention provides a conductive paste characterized by a crystal-based corrosion binder being combined with a glass frit and mixed with a metallic powder and an organic carrier. Methods for preparing each components of the conductive paste are disclosed including several embodiments of prepare Pb—Te—O-based crystal corrosion binder characterized by melting temperatures in a range of 440° C. to 760° C. and substantially free of any glass softening transition upon increasing temperature. Method for preparing the conductive paste includes mixture of the components and a grinding process to ensure all particle sizes in a range of 0.1 to 5.0 microns. Method of applying the conductive paste for the formation of a front electrode of a semiconductor device is presented to illustrate the effectiveness of the crystal-based corrosion binder in transforming the conductive paste to a metallic electrode with good ohmic contact with semiconductor surface. | 08-07-2014 |
20140287583 | ELECTRICALLY CONDUCTIVE PASTE FOR FRONT ELECTRODE OF SOLAR CELL AND PREPARATION METHOD THEREOF - The present invention provides an electrically conductive paste for a front electrode of a solar cell and a preparation method thereof. The electrically conductive paste is composed of a corrosion binder, a metallic powder and an organic carrier. The corrosion binder is one or more glass-free Pb—Te based crystalline compounds having a fixed melting temperature in a range of 440° C. to 760° C. During a sintering process of the electrically conductive paste for forming an electrode, the corrosion binder is converted into a liquid for easily corroding and penetrating an antireflective insulating layer on a front side of the solar cell, so that a good ohmic contact is formed. At the same time, the electrically conductive metallic powder is wetted, and the combination of the metallic powder is promoted. As a result, a high-conductivity front electrode of a crystalline silicon solar cell is formed. | 09-25-2014 |
20140291147 | TARGET MATERIALS FOR FABRICATING SOLAR CELLS - A sputtering target device is provided for manufacturing solar cells. The target device includes a metal selected from a group consisting of copper, indium, and molybdenum and further includes antimony or antimony-containing compound mixed in a matrix of the metal. The target device comprises antimony of 0.1 to 20 wt % and the metal of at least 80 wt %. The target device is installed in a deposition system for forming a back electrode doped with antimony or for forming at least one precursor layer doped with antimony among a stack of multiple precursor layers for forming a semiconductor photovoltaic absorber material. | 10-02-2014 |
Guodong Li, San Jose, CA US
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20120192150 | Software Architecture for Validating C++ Programs Using Symbolic Execution - Particular embodiment compile a C++ program having one or more input variables to obtain bytecode of the C++ program; compile a C++ library to obtain bytecode of the C++ library; symbolically execute the bytecode of the C++ program and the bytecode of the C++ library, comprising assign a symbolic input to each input variable of the C++ program; determine one or more execution paths in the C++ program; and for each execution path, construct a symbolic expression that if satisfied, causes the C++ program to proceed down the execution path; and generate one or more test cases for the C++ program by solving the symbolic expressions. | 07-26-2012 |
20120192162 | Optimizing Handlers for Application-Specific Operations for Validating C++ Programs Using Symbolic Execution - Particular embodiments discover a relationship between a plurality of methods of a C++ object; define one or more rules to represent the relationship; verify the rules by symbolically executing the methods; and if the rules are verified, then use the rules when symbolically executing the methods so that bytecode of the methods is not executed. | 07-26-2012 |
20120192169 | Optimizing Libraries for Validating C++ Programs Using Symbolic Execution - Particular embodiments optimize a C++ function comprising one or more loops for symbolic execution, comprising for each loop, if there is a branching condition within the loop, then rewrite the loop to move the branching condition outside the loop. Particular embodiments may further optimize the C++ function through simplified symbolic expressions and adding constructs forcing delayed interpretation of symbolic expressions during the symbolic execution. | 07-26-2012 |
20120204154 | Symbolic Execution and Test Generation for GPU Programs - In particular embodiments, a method includes accessing bytecode generated by a compiler from a software program for execution by a particular processing unit; accessing configuration information describing one or more aspects of the particular processing unit; symbolically executing the bytecode with the configuration information; and, based on the symbolic execution, generating one or more results conveying a functional correctness of the software program with respect to the particular processing unit for communication to a user and generating one or more test cases for the software program for communication to a user. | 08-09-2012 |
20120311545 | Lossless Path Reduction for Efficient Symbolic Execution and Automatic Test Generation - In one embodiment, symbolically executing a software module having a number of execution paths; and losslessly reducing the number of execution paths during the symbolic execution of the software module. | 12-06-2012 |
20130318503 | SYMBOLIC EXECUTION AND AUTOMATIC TEST CASE GENERATION FOR JAVASCRIPT PROGRAMS - A method includes, by one or more computing devices, determining JavaScript statements to be evaluated, parsing the JavaScript statements, translating the JavaScript statements into Java bytecodes and JavaScript-specific instructions, executing the Java bytecodes in a Java execution engine, calling a JavaScript run-time engine from the Java execution engine, handling one or more semantic operations associated with the JavaScript-specific instructions through use of the JavaScript run-time engine, and providing return values to the Java execution engine. The statements are configured for execution on a computing device. The set of Java bytecodes and JavaScript-specific instructions is configured to conduct symbolic execution of one or more portions of the JavaScript statements. The symbolic execution is configured to evaluate the JavaScript statements. | 11-28-2013 |
20130326485 | RULE-BASED METHOD FOR PROVING UNSATISFIABLE CONDITIONS IN A MIXED NUMERIC AND STRING SOLVER - A method includes, by computing devices, analyzing numeric and string constraints associated with a software module that includes numeric and string variables and operations applying to specific variables for numeric or string results. The numeric constraints apply to specific numeric variables. The string constraints apply to specific string variables. The method further includes determining an over-approximated constraint from the numeric constraints or operations, representing the over-approximated constraint and string constraints with finite state machines, representing the numeric constraints with an equation, determining whether a solution does not exist for the combination of the variables that satisfies the over-approximated constraint, the numeric constraints, and the string constraints using operations, and terminating attempts to solve for the variables based on the determination whether the solution does not exist. The over-approximated constraint includes a superset of the numeric constraints or operations and applies to specific string variables. | 12-05-2013 |
20140047217 | SATISFIABILITY CHECKING - A satisfiability checking system may include a single instruction, multiple data (SIMD) machine configured to execute multiple threads in parallel. The multiple threads may be divided among multiple blocks. The SIMD machine may be further configured to perform satisfiability checking of a formula including multiple parts. The satisfiability checking may include assigning one or more of the parts to one or more threads of the multiple threads of a first block of the multiple blocks. The satisfiability checking may further include processing the assigned one or more parts in the first block such that first results are calculated based on a first proposition. The satisfiability checking may further include synchronizing the results among the one or more threads of the first block. | 02-13-2014 |
20140082594 | ABSTRACT SYMBOLIC EXECUTION FOR SCALING SYMBOLIC EXECUTION GENERATION AND AUTOMATIC TEST GENERATION - A method includes, by one or more computing devices, determining code-under-test configured for execution on a computing device to be evaluated, creating a plurality of test cases based on the symbolic execution and including a plurality of constraints, selectively conducting abstract interpretation on the constraints, selectively conducting Satisfiability Modulo Theory (“SMT”) solving on the constraints, and validating or invalidating the code-under-test based on at least the SMT solving and the abstract interpretation. The abstract interpretation includes using a plurality of abstract interpretation models based on the constraints of the test case and over-approximating the constraints of the test case. | 03-20-2014 |
20140143604 | MIXED NUMERIC AND STRING CONSTRAINT ANALYSIS - A method of determining whether a set of constraints is satisfiable may include identifying a set of constraints associated with a software module. The method may also include modeling a string associated with a string constraint of the set of constraints as a parameterized array. Further, the method may include determining the satisfiability of the set of constraints based on a representation of the string constraint as a quantified expression. The satisfiability of the set of constraints may also be based on elimination of a quantifier associated with the quantified expression such that the string constraint is represented as a numeric constraint. The representation of the string constraint as a quantified expression may be based on the parameterized array that is associated with the string. | 05-22-2014 |
20140143762 | SYMBOLIC EXECUTION OF DYNAMIC PROGRAMMING LANGUAGES - A method of symbolically executing a dynamic program may include receiving a portion of a dynamic program that includes multiple objects. The method may also include symbolically executing the dynamic program including constraint solving by managing runtime states of the symbolic execution within a native symbolic executor. Managing the runtime states of the symbolic execution may include constructing an object map of two or more of the objects that are interdependent and distinguishing code portions of one of the two or more objects in the object map from data portions of the one of the two or more objects. Managing the runtime states of the symbolic execution may also include performing one or more of state copying, state backtracking, state sharing, and state spawning based on characteristics of the dynamic program using the object map and the distinguished code portions and data portions. | 05-22-2014 |
Hanqing Li, San Jose, CA US
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20100235679 | DEFECTIVE MEMORY BLOCK REMAPPING METHOD AND SYSTEM, AND MEMORY DEVICE AND PROCESSOR-BASED SYSTEM USING SAME - A non-volatile memory device includes a block remapping system that offsets an input block address by the addresses of non-functional blocks to provide an output block address that is used to address the memory device. The system generates the output block addresses by, in effect, adding to the input block address the addresses of all non-functional blocks of memory that are between an initial address and the output block address. The system performs this function be comparing the input block address to the address of any defective block. If the address of the defective block is less than or equal to the input block address, the addresses of all defective blocks starting at the block address are added to the input block address. The system then iteratively performs this process using each output block address generated by the system in place of the input block address. | 09-16-2010 |
20110219260 | DEFECTIVE MEMORY BLOCK REMAPPING METHOD AND SYSTEM, AND MEMORY DEVICE AND PROCESSOR-BASED SYSTEM USING SAME - A non-volatile memory device includes a block remapping system that offsets an input block address by the addresses of non-functional blocks to provide an output block address that is used to address the memory device. The system generates the output block addresses by, in effect, adding to the input block address the addresses of all non-functional blocks of memory that are between an initial address and the output block address. The system performs this function be comparing the input block address to the address of any defective block. If the address of the defective block is less than or equal to the input block address, the addresses of all defective blocks starting at the block address are added to the input block address. The system then iteratively performs this process using each output block address generated by the system in place of the input block address. | 09-08-2011 |
Helen Hongwei Li, San Jose, CA US
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20120007199 | PROTECTING BOND PAD FOR SUBSEQUENT PROCESSING - A method for opening a bond pad on a semiconductor device is provided. The method comprises removing a first layer to expose a first portion of the bond pad and forming a protective layer over the exposed first portion of the bond pad. The method further comprises performing subsequent processing of the semiconductor device and removing the protective layer to expose a second portion of the bond pad. | 01-12-2012 |
20120241893 | DEVICES INCLUDING BOND PAD HAVING PROTECTIVE SIDEWALL SEAL - A device having a detector includes a sensor package. The sensor package includes a light sensor, at least one filter located over the light sensor and at least one bond pad. The light sensor is formed on a semiconductor device that provides sensor information related to light incident upon the light sensor. A perimeter of each bond pad is covered by a protective layer forming a sidewall seal. The sensor package also includes a package that encases the light sensor, filter(s) and bond pad(s). Additionally, at least one package pin is communicatively coupled to the bond pad(s). The device also includes a functional circuit that is coupled to the sensor package and receives the sensor information from the light sensor. The device can be an ambient light sensor, camera, backlit mirror, handheld electronic device, filter device, light-to-digital output sensor, gain selection device, proximity sensor, or light-to-voltage non-linear converter. | 09-27-2012 |
Huiwen Li, San Jose, CA US
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20100215045 | Method and Apparatus for Direct Frame Switching Using Frame Contained Destination Information - Frame contained destination information may be used by a switch to identify an appropriate output port for a given frame without performing a table access operation. This reduces the processing requirements of the switch to enable the switch to handle frames more efficiently. The frame contained destination information may be contained in the frame's local destination MAC addresses (DA) such that a portion of the DA directly indicates, for each switch that handles the frame, an output port for that switch. Different portions of the DA may be used by different switches, depending on where they are in the network hierarchy. Large switches may also use sub-fields within their allocated portion in the DA to identify internal switching components. A location resolution server may be provided to store and distribute IP and MAC addresses and respond to local ARP requests on the local domain. | 08-26-2010 |
20120155473 | METHOD AND APPARATUS FOR DIRECT FRAME SWITCHING USING FRAME CONTAINED DESTINATION INFORMATION - Frame contained destination information may be used by a switch to identify an appropriate output port for a given frame without performing a table access operation. This reduces the processing requirements of the switch to enable the switch to handle frames more efficiently. The frame contained destination information may be contained in the frame's local destination MAC addresses (DA) such that a portion of the DA directly indicates, for each switch that handles the frame, an output port for that switch. Different portions of the DA may be used by different switches, depending on where they are in the network hierarchy. Large switches may also use sub-fields within their allocated portion in the DA to identify internal switching components. A location resolution server may be provided to store and distribute IP and MAC addresses and respond to local ARP requests on the local domain. | 06-21-2012 |
20140204949 | METHOD AND APPARATUS FOR DIRECT FRAME SWITCHING USING FRAME CONTAINED DESTINATION INFORMATION - Frame contained destination information may be used by a switch to identify an appropriate output port for a given frame without performing a table access operation. This reduces the processing requirements of the switch to enable the switch to handle frames more efficiently. The frame contained destination information may be contained in the frame's local destination MAC addresses (DA) such that a portion of the DA directly indicates, for each switch that handles the frame, an output port for that switch. Different portions of the DA may be used by different switches, depending on where they are in the network hierarchy. Large switches may also use sub-fields within their allocated portion in the DA to identify internal switching components. A location resolution server may be provided to store and distribute IP and MAC addresses and respond to local ARP requests on the local domain. | 07-24-2014 |
20140270751 | Passive Optical Loopback - An optical communication device comprises an input/output configured to be coupled to an optical communications line, and a passive optical loopback module coupled to the input and configured to receive optical signals from the input/output, the loopback module being further configured to reflect incoming signals of a test wavelength to the input/output. | 09-18-2014 |
Hung-Chun Li, San Jose, CA US
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20120079437 | CIRCUIT DESIGN SYSTEMS FOR REPLACING FLIP-FLOPS WITH PULSED LATCHES - A circuit design system, methodology, and software are disclosed for generating circuit capable of consuming less dynamic power. In particular, the circuit design methodology entails modifying an initial circuit design including a clock network coupled to a plurality of edge-triggered flip-flops to generate a modified circuit design that uses pulsed latches driven by pulse generators in place of at least some of the flip-flops. Since pulsed latches use less dynamic power than edge-triggered flip-flops, the modified circuit may consume less dynamic power. The circuit design methodology may further entail adding delay cells for balancing the clock network to compensate for timing effects caused by the insertion of pulse generators. Additionally, the methodology may further include cloning of forbidden clock paths to make more flip-flops eligible for pulsed latch replacement. | 03-29-2012 |
Jim Li, San Jose, CA US
Patent application number | Description | Published |
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20100039537 | METHOD FOR REDUCING ROW NOISE WITH DARK PIXEL DATA - A method for reducing the row noise from complementary metal oxide semiconductor (CMOS) image sensor by using average values from sub-regions of the shielded pixels. The method operates on sensor with and without a Color Filter Array (CFA) before any interpolation is applied and estimates the local offset by subtracting out outliers and averaging the averages of sub-regions in the shielded pixels. The method also reduces the pixel-to-pixel noise while reducing the row noise. | 02-18-2010 |
Kelly Li, San Jose, CA US
Patent application number | Description | Published |
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20110281755 | Karyotyping Assay - This disclosure relates to methods and kits for karyotyping in which chromosomes are interrogated by amplifying loci that are not within copy number variable regions thereof. | 11-17-2011 |
20140274774 | UNIVERSAL REPORTER-BASED GENOTYPING METHODS AND MATERIALS - The present disclosure is drawn to methods for detection, quantitation and analysis of nucleotides of interest, for example SNPs, in nucleic acid sequences of interest using universal FRET-based reporter primers. | 09-18-2014 |
Kuo-Tsai Li, San Jose, CA US
Patent application number | Description | Published |
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20080238453 | High accuracy and universal on-chip switch matrix testline - A testline structure made for integrated circuit tests is presented. The structure includes an array of testline pads formed in the scribe line area or integrated circuit die area on a semiconductor substrate, a plurality of test devices formed under the pads area, and a select circuit selectively connecting one of the test devices. The testline structure of this invention enables access to a large number of test devices through the same number of pads as on a conventional testline and can be employed to conduct parametric, reliability, and functional tests on the same. A source measurement unit (SMU) in a conventional integrated circuit tester is employed to sense and force predetermined test conditions on the test device terminals and conduct accurate Kelvin tests on the selected device. A method of using this testline structure is also presented. | 10-02-2008 |
20080244475 | Network based integrated circuit testline generator - A network based integrated circuit testline generating system and method of using the same is described. The system includes a user interface for generating and submitting requests which specify types and configurations of needed testlines for device parametric test. A testline generator receives the requests and creates a layout data base which includes layout information of needed testlines. | 10-02-2008 |
Leilei Li, San Jose, CA US
Patent application number | Description | Published |
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20090077101 | SYSTEM FOR HANDLING ASYNCHRONOUS DATABASE TRANSACTIONS IN A WEB BASED ENVIRONMENT - A system and computer readable medium for handling asynchronous database transactions in a web based environment is disclosed. The system and computer readable medium comprise providing a first ID from a device via a dedicated persistent connection and generating a second ID in an application server upon receipt of the first ID. The system and computer readable medium also include utilizing the first ID and second ID to obtain the appropriate data from a database system and to send the appropriate data to the device. A system and computer readable medium in accordance with the present invention uses a database resource adapter, which runs inside an application server, to generate a socket ID internally for every input transaction running with the dedicated persistent socket connection and also saves the customer-specified client ID for database queue creation and legacy application. This operation is transparent to the customers' client application. | 03-19-2009 |
Lipan Li, San Jose, CA US
Patent application number | Description | Published |
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20090325381 | PREVENTION AND REDUCTION OF SOLVENT AND SOLUTION PENETRATION INTO POROUS DIELECTRICS USING A THIN BARRIER LAYER - A method and apparatus for treating a substrate is provided. A porous dielectric layer is formed on the substrate. In some embodiments, the dielectric may be capped by a dense dielectric layer. The dielectric layers are patterned, and a dense dielectric layer deposited conformally over the substrate. The dense conformal dielectric layer seals the pores of the porous dielectric layer against contact with species that may infiltrate the pores. The portion of the dense conformal pore-sealing dielectric layer covering the field region and bottom portions of the pattern openings is removed by directional selective etch. | 12-31-2009 |
Ming Xiang Li, San Jose, CA US
Patent application number | Description | Published |
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20090020826 | Integrated Schottky Diode and Power MOSFET - A semiconductor structure includes a semiconductor substrate; a first well region of a first conductivity type in the semiconductor substrate; a metal-containing layer on the first well region, wherein the metal-containing layer and the first well region form a Schottky barrier; and a first heavily doped region of the first conductivity type in the first well region, wherein the first heavily doped region is horizontally spaced apart from the metal-containing layer. | 01-22-2009 |
Mingxing Li, San Jose, CA US
Patent application number | Description | Published |
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20100250414 | INTER-LAYER PARAMETER LIAISON SYSTEMS AND METHODS - An exemplary method includes generating an access record associated with a data session provided by at least one access layer element over an access network, generating an application record associated with an application provided by at least one application layer element over the access network, transmitting data representative of a correlation parameter associated with application from the at least one application layer element to the at least one access layer element via an inter-layer liaison subsystem, and inserting the correlation parameter associated with application and received from the at least one application layer element via the inter-layer liaison subsystem in the access record. In some examples, the method further includes correlating the access record and the application record based on the correlation parameter associated with the application. Other exemplary inter-layer parameter liaison methods and systems are also disclosed. | 09-30-2010 |
20110058658 | EMERGENCY CALLS IN INTERNET PROTOCOL MULTIMEDIA SUBSYSTEM (IMS) OVER EVOLVED PACKET CORE (EPC) NETWORKS - A device receives an emergency call invite generated by a user device associated with an Internet protocol (IP) multimedia subsystem (IMS) media gateway, and forwards the emergency call invite to a location resource function/route determination function (LRF/RDF) device for determining public safety answering point (PSAP) routing information. The device receives, from the LRF/RDF device, the PSAP routing information based on the emergency call invite, and routes the emergency call invite to a particular PSAP based on the PSAP routing information. If the emergency call invite is routed to a legacy PSAP, the emergency call is routed to the legacy PSAP via legacy mobile switching center (MSC) direct trunks. If the emergency call invite is routed to an IP PSAP, the emergency call is routed to the IP PSAP via an IP connection. | 03-10-2011 |
20110141947 | INTEGRATED LAWFUL INTERCEPT FOR INTERNET PROTOCOL MULTIMEDIA SUBSYSTEM (IMS) OVER EVOLVED PACKET CORE (EPC) - A method and a system provide integrated lawful intercept, for IMS over an Evolved Packet Core (EPC), for both packet data and session initiation protocol (SIP)-based applications. The system includes a device that receives a lawful intercept request from a law enforcement agency, and determines whether a packet data lawful intercept or a SIP-based applications (SBA) lawful intercept is requested by the lawful intercept request. The device also provisions, when a packet data lawful intercept is requested by the lawful intercept request, a policy control and charging rules function (PCRF) and a packet data network (PDN) gateway (PGW) for the packet data lawful intercept. The device further provisions, when a SBA lawful intercept is requested, a proxy call session control function (P-CSCF), a serving-CSCF (S-CSCF), and a session border controller (SBC) for the SBA lawful intercept. | 06-16-2011 |
20110151865 | INTER-NETWORK PROFILE REPOSITORY INTERWORKING SYSTEMS AND METHODS - Exemplary inter-network profile repository interworking systems and methods are disclosed. An exemplary system includes an interface facility that interfaces with a home subscriber server (“HSS”) of a long term evolution (“LTE”) communications network and a home location register (“HLR”) of an alternate communications network, the HSS and the HLR maintaining separate profiles associated with a user device configured to access the LTE communications network and the alternate communications network. The exemplary system further includes a synchronization facility communicatively coupled to the interface facility and that synchronizes profile data associated with the user device across the separate profiles maintained by the HSS and the HLR. Corresponding systems and methods are also disclosed. | 06-23-2011 |
20110230195 | LOCATION-BASED ROUTING OF IMS CALLS THROUGH FEMTOCELLS - Location-based calling may be provided for callers that connect to a wireless network using femtocells. A network device may receive a call initiation message including an identifier of a femtocell through which the call was placed. The network device may obtain an identifier of a macro cell base station that serves a geographical coverage area that includes the femtocell and replace the identifier of the femtocell, in the message, with the identifier of the macro cell base station, to obtain a modified message. The modified message may be forwarded through the network to be processed as if the caller placed the location-based call through the macro cell base station. | 09-22-2011 |
20110249666 | LOCATION BASED ROUTING - A method may include receiving a session initiation protocol (SIP) Invite message associated with a call and determining that the call involves location based processing. The method may also include identifying location information associated with the call based on header information included in the SIP Invite message and identifying a location ID based on the location information. The method may further include modifying the SIP Invite message to include the location ID, identifying a call type associated with the call and identifying a mobile switching center to which the SIP Invite message is to be forwarded based on the call type and the location information. | 10-13-2011 |
20110282931 | DYNAMIC INTERNET PROTOCOL REGISTRY FOR MOBILE INTERNET PROTOCOL BASED COMMUNICATIONS - A server device configured to store an Internet protocol (IP) registry, the registry includes information for a user device, the information includes particular identifiers for the user device, an IP address for the user device, and a particular access point name (APN), where the particular APN corresponds to a service, an application, a network, or data used by the user device; receive a query that includes identifiers and an APN; perform, using the IP registry, an operation to identify the information, for the user device, based on the identifiers and the APN; obtain the information for the user device, when the identifiers match the particular identifiers stored in the IP registry and when the APN matches the particular APN stored in the IP registry; and send, to an application server, the information for the user device, where the IP address permits the application server to communicate with the user device. | 11-17-2011 |
20120093077 | FEMTOCELL LOCATION ENCODING - A device associated with a Voice over IP (VoIP) network receives a call from a mobile device. The device determines whether a sector identifier (ID) associated with the call includes a femtocell identifier. The device further determines a location identifier included in the sector ID when the sector ID includes the femtocell identifier. The device also identifies a recipient of the call based on the location identifier and forwards the call to the recipient. | 04-19-2012 |
20120094658 | ENTERPRISE FEMTOCELL SIGNALING - A mobile device sends a request for a unique wireless network session identifier and receives, based on the request, the unique wireless network session identifier. The mobile device determines whether the unique wireless network session identifier includes a femtocell identifier. The mobile device applies one set of configuration settings when the unique wireless network session identifier includes the femtocell identifier, and applies a different set of configuration settings when the unique wireless network session identifier does not include the femtocell identifier. | 04-19-2012 |
20120129482 | ENABLING EMERGENCY CALL BACK TO A USER DEVICE - Emergency call backs may be placed to a user device in a manner that bypasses certain features (e.g., call forwarding) that may be enabled by the device. A method may include receiving an emergency call from a user device; and creating, in response to the emergency call, an emergency session associated with the user device, where the creating includes forwarding the call to a public safety access point (PSAP) server that handles emergency calls. The method may further include receiving a call, such as an emergency call back call, destined for the user device; determining that the emergency session has not expired when an elapse time associated with the emergency session is less than a threshold; and forwarding, to the user device, the call, as a return call from the PSAP server, based on the determination that the emergency session has not expired. | 05-24-2012 |
20120188941 | EMERGENCY SUPPORT FOR VOICE OVER INTERNET PROTOCOL (VOIP) OVER MIXED MACRO AND FEMTO NETWORKS - A device receives, from an emergency call server (ECS), a query that includes a telephone number, a femto global positioning system (GPS) identifier, and an Internet protocol (IP) address associated with a user equipment (UE) placing an emergency call. The device obtains a serving cell E-UTRAN cell global identifier (ECGI) of the UE based on the query, and determines whether the ECGI is a macro ECGI associated with a base station or a femto ECGI associated with a femto cell. | 07-26-2012 |
20130024574 | COMMUNICATION SESSION ALLOCATION - A network device may receive an incoming call for a user device requesting a communication session corresponding to a particular communication session type, where the user device is attached to a first access network. The network device may identify the first access network and determine whether a first centralized network supports the communication session type in the first access network. When the first centralized network supports the communication session type in the first access network, the network device may designate the first centralized network to service the incoming call. When the first centralized network does not support the communication session type in the first access network, the network device may designate a second centralized network to service the incoming call. | 01-24-2013 |
20130029634 | INTEGRATED EMERGENCY CALL SUPPORT FOR MOBILE AND NOMADIC DEVICES - A device receives an emergency call via a session initiation protocol (SIP) invite that includes a cell identification (ID) and a service or device type associated with a user equipment (UE). The device determines, based on the service or device type, whether the UE is a fixed device or a wireless device, and uses a static approach to route the emergency call to a public safety answering point (PSAP) when the UE is a fixed device. The device uses a cell database to route the emergency call to the PSAP, based on the cell ID, when the UE is a wireless device. | 01-31-2013 |
20130053027 | PROVIDING USER LOCATION AND TIME ZONE INFORMATION FOR LTE/IMS CHARGING - A method may include receiving a request from an Internet Protocol Multimedia Subsystem, where the request relates to an Internet Protocol Multimedia Subsystem service associated with user equipment. The method may further include obtaining location or time zone information associated with the user equipment from an access network; providing the obtained location or time zone information to the Internet Protocol Multimedia Subsystem; and providing the obtained location or time zone information to an on-line or off-line charging system. | 02-28-2013 |
20130128862 | MOBILITY MANAGEMENT ENTITY (MME) SELECTION WITHIN A BORDER REGION - A system that includes an eNodeB device located in a border region between a first traffic area and a second traffic area, where the first traffic area includes a first pool of mobile management entities (MMEs), where the second traffic area includes a second, different pool of MMEs, and where the eNodeB is associated with the first pool of MMEs and the second pool of MMEs. | 05-23-2013 |
Mingxing S. Li, San Jose, CA US
Patent application number | Description | Published |
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20110076982 | EMERGENCY CALLS FOR INTERNET PROTOCOL MULTIMEDIA SUBSYSTEM (IMS) OVER PACKET SWITCHED CODE DIVISION MULTIPLE ACCESS (CDMA) NETWORKS - A mobile communication device receives initiation of an emergency call by a user of the mobile communication device, and determines whether a single-carrier radio transmission technology (1xRTT) network is available for the emergency call. The mobile communication device also routes the emergency call over the 1xRTT network when the 1xRTT network is available for the emergency call, and routes the emergency call over an enhanced high rate packet data (eHRPD) network when the 1xRTT network is unavailable for the emergency call. | 03-31-2011 |
20140068710 | USER DEVICE SELECTION - A method may include receiving, at an application server, a session initiation protocol (SIP) message including a public user identifier (ID) associated a user. The public user ID corresponds to a plurality of user devices. The method also includes determining an applicable order of alerting at least one of the plurality of user devices. The method further includes identifying at least one available user device associated with the user, based on a terminal identifier (ID) associated with each at least one available user device. The method includes selecting a user device from the at least one available user device based on the applicable order of alerting. A SIP invite message, including a terminal ID for the selected user device, is generated. The method includes sending the SIP invite message to the selected user device based on the applicable order of alerting, and receiving a response to the SIP invite message. | 03-06-2014 |
20140140268 | INTELLIGENT EMERGENCY SESSION HANDLING - An access control device may include logic configured to receive a request from a user device to set up a packet connection for an emergency session to a packet data network via an access network. The logic may be further configured to determine a location associated with the user device; identify a public safety answering point associated with the determined location; determine whether a connection capacity associated with the identified public safety answering point has been reached; and reject the request to set up the packet connection for the emergency session, in response to determining that the connection capacity associated with the identified public safety answering point has been reached. | 05-22-2014 |
20140165149 | BLOCKING NETWORK ACCESS FOR UNAUTHORIZED USER DEVICES - A first server, associated with a first network, may: receive a first query from a network device associated with a second network; determine an identifier associated with the user device; provide, to a second server, a second query including the identifier; receive, from the second server, a response to the second query, the response identifying whether the identifier of the user device is being stored by the second server; and provide to the network device, a response to the first query, the response to first query identifying whether the user device is authorized to access the second network based on determining that the user device is not authorized to access the second network when the identifier is being stored by the second server or based on determining that the user device is authorized to access the second network when the identifier is not being stored by the second server. | 06-12-2014 |
20140235258 | APPLICATION SERVER AWARENESS OF DEVICE CAPABILITIES IN A WIRELESS NETWORK - Capability information, relating to hardware and/or software capabilities of different types of mobile devices, may be used to tailor services provided to the mobile device based on the particular type of mobile device. In one implementation, a device, such as an application server that provide services to mobile devices, may: receive a request from a mobile device, for services; obtaining information indicating a type of the mobile device; obtain, based on the type of mobile device, information indicating capabilities of the mobile device; and provide the services to the mobile device, in which the provided services are tailored for the mobile device based on the capabilities of mobile device. | 08-21-2014 |
20140269437 | BROADCAST MEDIA CONTENT TO SUBSCRIBER GROUP - A system includes a network device receives a request for media content from a plurality of user devices and transmits the media content in accordance with at least one of a unicast mode and a broadcast mode. A content monitoring device counts a number of requests for the media content received at the network device and selects the mode of the network device based on the number of requests received. A method includes receiving a request for media content from a plurality of user devices, counting a number of requests for media content received at the network device, selecting at least one of a unicast mode and a broadcast mode of the network device based on the number of requests received at the network device, and transmitting the media content in accordance with the selected mode. | 09-18-2014 |
20140269525 | PROVIDING LIMITED NETWORK ACCESS TO USER DEVICES - A network device is configured to receive, from a user device that is not subscribed to a network associated with the network device, a connection request identifying a particular service, of one or more services, to provide to the user device. The system may further identify a packet data network (PDN) to establish based on the particular service; identify one or more parameters, associated with the PDN and identifying a data flow, associated with the particular service, that can be provided to the user device; and establish the PDN based on the one or more PDN parameters. The PDN may permit only the data flow, associated with the particular service, to be transmitted to the user device. The system may further provide the data flow, associated with the particular service, to the user device via the PDN. | 09-18-2014 |
20140273919 | INTEGRATED EMERGENCY CALL SUPPORT FOR MOBILE AND NOMADIC DEVICES - A device receives an emergency call via a session initiation protocol (SIP) invite that includes a cell identification (ID) and a service or device type associated with a user equipment (UE). The device determines, based on the service or device type, whether the UE is a fixed device or a wireless device, and uses a static approach to route the emergency call to a public safety answering point (PSAP) when the UE is a fixed device. The device uses a cell database to route the emergency call to the PSAP, based on the cell ID, when the UE is a wireless device. | 09-18-2014 |
20140295807 | NETWORK BASED MISSED CALL NOTIFICATION - A device is configured to detect that a user device has failed to receive a call attempt for a call intended for the user device and from a calling party, and determine, based on the detection, that the calling party has not left a voicemail message associated with the call. The device is configured to store missed call information, associated with the call, and send a first missed call notification to the user device, where the first missed call notification includes the missed call information. The device is configured to detect that the user device has not received the first missed call notification, and send a second missed call notification to the user device, where the second missed call notification includes the missed call information. | 10-02-2014 |
20140307858 | RETURNING CALLS TO EMERGENCY CALLERS WITHOUT VALID TELEPHONE NUMBERS - A device is configured to detect an emergency call from a user device associated with a device identifier, the device identifier including information that identifies the user device. The device is configured to detect that the user device is not associated with a valid originating telephone number, based on detecting the emergency call. The device is configured to determine a temporary originating telephone number, based on detecting that the user device is not associated with a valid originating telephone number, and to store an association between the device identifier and the temporary originating telephone number. The device is configured to transmit the emergency call, with information identifying the temporary originating telephone number, to an emergency call device, the temporary originating telephone number permitting the emergency call device to place a return call to the user device. | 10-16-2014 |
20140348008 | IDENTIFYING BASE STATION TYPES - One or more devices may receive information that identifies a format of an identifier of a network device. The format of the identifier may indicate a portion of the identifier that identifies a type of the network device. The one or more devices may receive the identifier of the network device based on a user device connecting with the network device to communicate via the network device; determine the type of the network device connected to the user device based on the portion of the identifier and a format of the identifier that identifies the type of network device; and execute a processing instruction based on the type of network device connected to the user device. | 11-27-2014 |
20140349609 | NETWORK DEVICE ACCESS ID ASSIGNMENT AND MANAGEMENT - One or more devices may receive an instruction to generate an index for a customer associated with a base station and may generate the index based on receiving the instruction. The index may include one or more spaces to store a corresponding one or more access identifiers (IDs) used to allow a user device to connect to the base station. The one or more devices may receive an instruction to add an access ID to the index; generate the access ID based on a format of the access ID, a customer type, a customer ID, or a space ID; store the access ID in one of the one or more spaces of the index; and provide the access ID to the user device and the base station. The access ID may permit the user device to connect to the base station to access a network via the base station. | 11-27-2014 |
20140378149 | MAINTAINING CONNECTIVITY DURING CALL-SETUP - A server device may receive a call setup request from a first user device; provide the call setup request towards a second user device; receive a provisional response message based on providing the call setup request; and provide the provisional response message towards the first user device. The first or second user device may be connected to a network device to provide or receive the call setup request, the provisional, a response to the call setup request, or an acknowledgement. The server device may provide, based on receiving the call setup request or the provisional response, one or more messages towards the first user device or towards the second user device to prevent the first or second user device from disconnecting from the network device, to reduce a delay in receiving by the first user device, the provisional response and the response to the call setup request. | 12-25-2014 |
Pen Li, San Jose, CA US
Patent application number | Description | Published |
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20090041137 | INDIVIDUAL INTERLEAVING OF DATA STREAMS FOR MIMO TRANSMISSION - The present invention, generally speaking, provides interleavers and methods of interleaving that satisfy the need for backward compatibility while effectively addressing competing design objectives. In accordance with one aspect of the invention, data is transmitted using a number of transmit antennas greater than an expected number of receive antennas. At least one pair of transmit antennas (ant′_1, ant′_) is formed, and multiple second data streams ( | 02-12-2009 |
20090067524 | GUARD INTERVAL LENGHT SELECTION IN AN OFDM SYSTEMS BASED ON COHERENCE BANDWIDTH OF THE CHANNEL - A system, apparatus and methods are described that identify a maximum cyclic delay and corresponding cyclic prefix for a multi-path communications channel. In one embodiment, the maximum cyclic delay ( | 03-12-2009 |
20090074091 | INDIVIDUAL INTERLEAVING OF DATA STREAMS FOR MIMO TRANSMISSION - The present invention, generally speaking, provides interleavers and methods of interleaving that satisfy the need for backward compatibility while effectively addressing competing design objectives. In accordance with one aspect of the invention, data is transmitted using a number of transmit antennas greater than an expected number of receive antennas. At least one pair of transmit antennas is formed, and multiple second data streams are formed from a first data stream, successive bits in said first data stream being assigned to different ones of said second data streams. Block interleaving of multiple respective ones of said second data streams is individually performed. During successive transmission intervals, the pair of transmit antennas is used to transmit a pair of data symbols taken from different ones of said second data streams, followed by an equivalent transformed pair of data symbols. | 03-19-2009 |
20090080555 | GUARD INTERVAL LENGHT SELECTION IN AN OFDM SYSTEMS BASED ON COHERENCE BANDWIDTH OF THE CHANNEL - A system, apparatus and methods are described that select a guard interval length ( | 03-26-2009 |
20090190682 | SYSTEM AND METHOD FOR MAXIMUM LIKELIHOOD DECODING IN MULTIPLE OUT WIRELESS COMMUNICATION SYSTEMS - A system and method for a simplified Maximum Likelihood (ML) decoding ( | 07-30-2009 |
Pen C. Li, San Jose, CA US
Patent application number | Description | Published |
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20090252248 | INDIVIDUAL INTERLEAVING OF DATA STREAMS FOR MIMO TRANSMISSION - The present invention, generally speaking, provides interleavers and methods of interleaving that satisfy the need for backward compatibility while effectively addressing competing design objectives. In accordance with one aspect of the invention, data is transmitted using a number of transmit antennas greater than an expected number of receive antennas. At least one pair of transmit antennas is formed, and multiple second data streams are formed from a first data stream, successive bits in said first data stream being assigned to different ones of said second data streams. Block interleaving of multiple respective ones of said second data streams is individually performed. During successive transmission intervals, the pair of transmit antennas is used to transmit a pair of data symbols taken from different ones of said second data streams, followed by an equivalent transformed pair of data symbols. | 10-08-2009 |
Pen Chung Li, San Jose, CA US
Patent application number | Description | Published |
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20080198774 | Superframe Having Increased Data Transmission Efficiency - A TDD/TDMA wireless superframe includes a slot having a plurality of OFDM symbols. A guard time interval is arranged after the slot containing the OFDM symbols. There are a plurality of packets arranged subsequent to the guard time interval. A majority of the plurality packets comprise payload frames that are dynamically assigned in concatenation so as to provide access to/from one or more legacy devices operating in a LAN environment under a different protocol. The TDD/TDMA protocol is compatible with existing legacy devices under CSMA/CA. When there is at least one legacy device and one non-legacy device receiving communication, the legacy device is provided communication by enabling the Dynamic Contention packet service, with both the legacy device and non-legacy device receiving communications in the same frequency band. | 08-21-2008 |
20090009258 | Enhanced Spectral Keying for Wireless Ultra Wideband Communications - Methods provide for the amount of information encoded by spectral keying into a UWB symbol having a plurality of modulation symbol times, to be increased by operating two or more frequency band carriers simultaneously during at least one of a plurality of modulation symbol times. In one aspect of the present invention, once a frequency resource, such as a carrier, has been used during a given modulation symbol time, those frequency resources are not used again within that UWB symbol. A method of transmitting symbols, includes providing ( | 01-08-2009 |
20090313388 | Wireless communication networks based on existing digital broadcasting protocols - A system, apparatus and method are described for transforming an existing broadcasting protocol to a wireless communication networks. Since the initial frequency band is unknown between the server and the client, a protocol is proposed to synchronize the client with the server first in frequency band and second in time. Once the synchronization is done, any message exchanging protocols can facilitate communications. For example, several packets in the broadcasting protocols can be aggregated to form a frame structure. The same protocol can be used when there is a repeater between the server and the client. For video application, a rendering device such as a TV could be controlled by the client via an interface such as infrared. The rendering device can be automatically tuned to the server's transmit frequency automatically by the client without user's intervention. | 12-17-2009 |
Qingqing Li, San Jose, CA US
Patent application number | Description | Published |
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20120016977 | Secure data transfer in a virtual environment - In one embodiment, a method includes receiving at one of a plurality of servers, a request from a client for a secure communication session, storing context information associated with the secure communication session at a virtual context server in communication with the servers, and establishing the secure communication session between one of the servers and the client. The context information includes a session identifier, a secret, and a session state. The stored context information is available to the servers to allow the secure communication session to move between the servers. An apparatus for secure data transfer in a virtual environment is also disclosed. | 01-19-2012 |
Quanzhong Li, San Jose, CA US
Patent application number | Description | Published |
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20090043736 | EFFICIENT TUPLE EXTRACTION FROM STREAMING XML DATA - A method and apparatus are disclosed for querying streaming extensible markup language (XML) data comprising: routing elements to query nodes, the elements derived from the streaming extensible markup language data; filtering out elements not conforming to one or more predetermined path query patterns; adding remaining elements to one or more dynamic element lists; accessing a decision table to select and return a query node related to a cursor element from the dynamic element lists; and processing the cursor element related to the returned query node to produce an extracted tuple output. | 02-12-2009 |
20090043806 | EFFICIENT TUPLE EXTRACTION FROM STREAMING XML DATA - A method and apparatus are disclosed for querying streaming extensible markup language (XML) data comprising: routing elements to query nodes, the elements derived from the streaming extensible markup language data; filtering out elements not conforming to one or more predetermined path query patterns; adding remaining elements to one or more dynamic element lists; accessing a decision table to select and return a query node related to a cursor element from the dynamic element lists; and processing the cursor element related to the returned query node to produce an extracted tuple output. | 02-12-2009 |
20090070313 | ADAPTIVELY REORDERING JOINS DURING QUERY EXECUTION - A method is disclosed for executing a predetermined query plan, the method comprising: executing a portion of the query plan; providing a reordered query plan; comparing ranking metrics for the query plans; and executing the query plan having the lower ranking metric. | 03-12-2009 |
20110184933 | JOIN ALGORITHMS OVER FULL TEXT INDEXES - According to one embodiment of the present invention, a method for processing join predicates in full-text indexes is provided. The method includes evaluating local predicates of an outer full text index to generate a first posting list of documents. For each document in the first posting list, the value of a join attribute is determined and an inner full text index is probed to obtain a second posting list of documents containing one of the join attributes determined for each document. Local predicates of an inner full text index are evaluated to generate a third posting list of documents, and the second posting list is merged with the third posting list to generate a merge list of documents. Documents in the first posting list may be paired up with documents in the merge list. | 07-28-2011 |
20130103655 | MULTI-LEVEL DATABASE COMPRESSION - Embodiments of the invention relate to a multi-level database compression technique to compress table data objects stored in pages. A compact dictionary structure is encoded that represents frequent values of data at any level of granularity. More than one level of compression is provided, wherein input to a finer level of granularity is an output of a coarser level of granularity. Based upon the encoded dictionary structure, a compression technique is applied to a stored page to compress each row on the page. Similarly, a de-compression technique may be applied to decompress the compressed data, utilizing the same dictionary structures at each level of granularity. | 04-25-2013 |
Sha Li, San Jose, CA US
Patent application number | Description | Published |
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20080313357 | MULTIPLE CHANNEL DATA BUS CONTROL FOR VIDEO PROCESSING - A method, apparatus, computer medium, and other embodiments for selectably enabling a plurality of data transfer modes along one or more channels are described. In one embodiment, data transfer between a first device and a second device is controlled based on selecting a combination of access and operation modes. In another embodiment, a video processing system capable of selectably enabling a plurality of data transfer modes along one or more channels is described. | 12-18-2008 |
20100026331 | Construction Structures and Manufacturing Processes for Integrated Circuit Wafer Probe Card Assemblies - Enhanced microfabricated spring contact structures and associated methods, e.g. such as for electrical contactors and interposers, comprise improvements to spring structures that extend from the substrate surface, and/or improvements to structures on or within the support substrate. Improved spring structures and processes comprise embodiments having selectively formed and etched, coated and/or plated regions, which are optionally further processed through planarization and/or annealment. Enhanced solder connections and associated processes provide a gap between substrates for componentry, and or improved manufacturing techniques using distributed spacers. Enhanced probe card assembly structures and processes provide improved planarization adjustment and thermal stability. | 02-04-2010 |
20120023730 | CONSTRUCTION STRUCTURES AND MANUFACTURING PROCESSES FOR INTEGRATED CIRCUIT WAFER PROBE CARD ASSEMBLIES - Enhanced microfabricated spring contact structures and associated methods, e.g. such as for electrical contactors and interposers, comprise improvements to spring structures that extend from the substrate surface, and/or improvements to structures on or within the support substrate. Improved spring structures and processes comprise embodiments having selectively formed and etched, coated and/or plated regions, which are optionally further processed through planarization and/or annealment. Enhanced solder connections and associated processes provide a gap between substrates for componentry, and or improved manufacturing techniques using distributed spacers. Enhanced probe card assembly structures and processes provide improved planarization adjustment and thermal stability. | 02-02-2012 |
20120212248 | Construction Structures and Manufacturing Processes for Integrated Circuit Wafer Probe Card Assemblies - Enhanced microfabricated spring contact structures and associated methods, e.g. such as for electrical contactors and interposers, comprise improvements to spring structures that extend from the substrate surface, and/or improvements to structures on or within the support substrate. Improved spring structures and processes comprise embodiments having selectively formed and etched, coated and/or plated regions, which are optionally further processed through planarization and/or annealment. Enhanced solder connections and associated processes provide a gap between substrates for componentry, and or improved manufacturing techniques using distributed spacers. Enhanced probe card assembly structures and processes provide improved planarization adjustment and thermal stability. | 08-23-2012 |
Shenghan Li, San Jose, CA US
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20120073622 | SOLUTION-PROCESSED INORGANIC PHOTO-VOLTAIC DEVICES AND METHODS OF PRODUCTION - Methods of producing photo-voltaic devices include spray coating deposition of metal chalcogenides, contact lithographic methods and/or metal ion injection. Photo-voltaic devices include devices made by the methods, tandem photo-voltaic devices and bulk junction photovoltaic devices. | 03-29-2012 |
20140116512 | INORGANIC SOLUTION AND SOLUTION PROCESS FOR ELECTRONIC AND ELECTRO-OPTIC DEVICES - A solution for forming at least a portion of an active layer of an electronic or electro-optic device includes a solvent, an additive mixed with the solvent to provide a solvent-additive blend, and a solute that includes at least one of a transition metal, an alkali metal, an alkaline earth metal, Al, Ga, In, Ge, Sn, or Sb dissolved in elemental form in the solvent-additive blend. The additive is selected from the group of additives consisting of NR1R2NHCOOH, NH2N—HCONHNH2, NH2COOH.NH3, NH2NHC(═NH)NH2.H2CO3, NH2NHCSNHNH2, NH2NHCSSH and all combinations thereof. R1 and R2 are each independently selected from hydrogen, aryl, methyl, ethyl and a linear, branched or cyclic alkyl of 3-6 carbon atoms. Methods of producing the solution, a method of producing a Kesterite film on a substructure and devices made with the solutions and methods are also provided. | 05-01-2014 |
Shih-Gong Thomas Li, San Jose, CA US
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20080262889 | BUSINESS TRANSFORMATION MANAGEMENT - A solution for managing a business transformation is provided. The invention obtains an impact of a business solution for the business transformation on a business concern for an enterprise and relationship information for the business concern with one or more other business concerns and/or value (business) metrics. The impact of the business solution is propagated to a set of business concerns and/or value metrics based on the relationship information. The impact can include a time delay factor, which can be used during evaluation to perform numerous financial related metrics (e.g., return on investment). The relationship information and/or impact can be derived from empirical data using regression analysis or the like. In order to facilitate evaluation of the business transformation, various improved graphical interfaces can be generated that highlight the changes caused by the business transformation for use by a user. | 10-23-2008 |
Siming Li, San Jose, CA US
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20120207154 | Port Decommissioning - A management application can automatically coordinate the decommissioning of ports in a switch, ensuring that ports are gracefully taken out of service without unnecessary interruption of service and triggering of automatic recovery functionality that may occur during manual decommissioning of ports. Embodiments may provide for decommissioning of F_ports only, E_ports only, or both F_ports and E_ports. Where link aggregation is provided for in the fabric, decommissioning of a port in a link aggregation group may be performed if there are other operational links in the group. Decommissioning of a non-aggregated port (or the last operational port in a link aggregation group) may be performed if there is a redundant path available. | 08-16-2012 |
Siqun Li, San Jose, CA US
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20090112947 | Database Log Capture that Publishes Transactions to Multiple Targets to Handle Unavailable Targets by Separating the Publishing of Subscriptions and Subsequently Recombining the Publishing - A first log reader publishes first messages to a plurality of queues. The messages comprise changes for transactions extracted from a log by the first log reader. In response to one of the queues becoming unavailable, a second log reader is launched to read and extract from the log, and to publish second messages comprising changes for transactions extracted from the log by the second log reader to the unavailable queue as a catch-up queue. In response to the catch-up queue becoming available and the second log reader reaching the end of the log, the publishing of the second messages for the catch-up queue is transferred from the second log reader to the first log reader. | 04-30-2009 |
Siwen Li, San Jose, CA US
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20090290145 | ELECTRICAL AND OPTICAL SYSTEM AND METHODS FOR MONITORING EROSION OF ELECTROSTATIC CHUCK EDGE BEAD MATERIALS - A disclosed device comprises an edge bonding seal configured to be mounted to an edge bead of the electrostatic chuck. The edge bonding seal includes a monitoring layer comprised of a first material configured to either emit a species capable of being optically monitored or having an electrical resistance value capable of being monitored, or both. The edge bonding seal further includes an edge bonding layer configured to be interspersed at least between the monitoring layer and the plasma environment. The edge bonding layer is comprised of a second material susceptible to erosion due to reaction with the plasma environment and configured to expose the monitoring layer to the plasma environment upon sufficient exposure to the plasma environment. | 11-26-2009 |
20110007303 | OPTICAL SYSTEM AND METHODS FOR MONITORING EROSION OF ELECTROSTATIC CHUCK EDGE BEAD MATERIALS - A disclosed device comprises an edge bonding seal configured to be mounted to an edge bead of the electrostatic chuck. The edge bonding seal includes a monitoring layer comprised of a first material configured to emit a species capable of being optically monitored. The edge bonding seal further includes an edge bonding layer configured to be interspersed at least between the monitoring layer and the plasma environment. The edge bonding layer is comprised of a second material susceptible to erosion due to reaction with the plasma environment and configured to expose the monitoring layer to the plasma environment upon sufficient exposure to the plasma environment. | 01-13-2011 |
20130160948 | Plasma Processing Devices With Corrosion Resistant Components - In one embodiment, a plasma processing device may include a plasma processing chamber, a plasma region, an energy source, and a corrosion resistant component. The plasma processing chamber can be maintained at a vacuum pressure and can confine a plasma processing gas. The energy source can transmit energy into the plasma processing chamber and transform at least a portion of the plasma processing gas into plasma within the plasma region. The corrosion resistant component can be located within the plasma processing chamber. The corrosion resistant component can be exposed to the plasma processing gas and is not coincident with the plasma region. The corrosion resistant component may include an inner layer of stainless steel that is coated with an outer layer of Tantalum (Ta). | 06-27-2013 |
Tieniu Li, San Jose, CA US
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20080307270 | EMERGING BAD BLOCK DETECTION - Apparatus and methods, such as those that read data from non-volatile integrated circuit memory devices, such as NAND flash. For example, disclosed techniques can be embodied in a device driver of an operating system. Errors are tracked during read operations. If sufficient errors are observed during read operations, the block is then retired when it is requested to be erased or a page of the block is to be written. One embodiment is a technique to recover data from uncorrectable errors. For example, a read mode can be changed to a more reliable read mode to attempt to recover data. One embodiment further returns data from the memory device regardless of whether the data was correctable by decoding of error correction code data or not. | 12-11-2008 |
20100287410 | SYSTEMS AND METHODS FOR RETRIEVING DATA - Apparatus and methods, such as those that read data from non-volatile integrated circuit memory devices, such as NAND flash. For example, disclosed techniques can be embodied in a device driver of an operating system. Errors are tracked during read operations. If sufficient errors are observed during read operations, the block is then retired when it is requested to be erased or a page of the block is to be written. One embodiment is a technique to recover data from uncorrectable errors. For example, a read mode can be changed to a more reliable read mode to attempt to recover data. One embodiment further returns data from the memory device regardless of whether the data was correctable by decoding of error correction code data or not. | 11-11-2010 |
20110239061 | SYSTEMS AND METHODS FOR RETRIEVING DATA - Apparatus and methods, such as those that read data from non-volatile integrated circuit memory devices, such as NAND flash. For example, disclosed techniques can be embodied in a device driver of an operating system. Errors are tracked during read operations. If sufficient errors are observed during read operations, the block is then retired when it is requested to be erased or a page of the block is to be written. One embodiment is a technique to recover data from uncorrectable errors. For example, a read mode can be changed to a more reliable read mode to attempt to recover data. One embodiment further returns data from the memory device regardless of whether the data was correctable by decoding of error correction code data or not. | 09-29-2011 |
20140082323 | ADDRESS MAPPING - The present disclosure includes methods, memory units, and apparatuses for address mapping. One method includes providing a mapping unit having logical to physical mapping data corresponding to a number of logical addresses. The mapping unit has a variable data unit type associated therewith and comprises a first portion comprising mapping data indicating locations on a memory of a number of physical data units having a size defined by the variable data unit type, and a second portion comprising mapping data indicating locations on the memory of a number of other mapping units of a mapping unit group to which the mapping unit belongs. | 03-20-2014 |
Timothy Li, San Jose, CA US
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20090239471 | BLUETOOTH AND WLAN COEXISTENCE ARCHITECTURE HAVING A SHARED LOW NOISE AMPLIFIER - A radio frequency (RF) front-end configured to share transmissions and receptions of Bluetooth signals and WLAN signals. In an exemplary embodiment, the RF front-end comprises a first path coupled between an antenna and a transceiver dedicated to transmissions of the WLAN signals; a second path coupled between the antenna and the transceiver dedicated to simultaneous receptions of the Bluetooth signals and the WLAN signals; and a third path coupled between the antenna and the transceiver. The third path may be dedicated to transmissions only of the Bluetooth signals when a WLAN link is active; and transmissions and receptions of the Bluetooth signals when the WLAN link is active and in a power save state, and when the WLAN link is inactive. | 09-24-2009 |
20120201234 | BLUETOOTH AND WLAN COEXISTENCE ARCHITECTURE HAVING A SHARED LOW NOISE AMPLIFIER - A radio frequency front-end includes a first path, second path, and third path each coupled between an antenna and a transceiver. The first path is configured to convey WLAN signals from the transceiver to the antenna for transmission. The second path is configured to convey received Bluetooth signals and received WLAN signals from the antenna to the transceiver. The third path is configured to convey Bluetooth signals from the transceiver to the antenna for transmission when a WLAN link is active and not in a power save state, and is configured to convey received Bluetooth signals from the antenna to the transceiver, and Bluetooth signals from the transceiver to the antenna for transmission, when the WLAN link is either inactive or in the power save state. | 08-09-2012 |
Weidan Li, San Jose, CA US
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20120098127 | POWER/GROUND LAYOUT FOR CHIPS - Embodiments of the present disclosure provide a chip that comprises a base metal layer formed over a first semiconductor die and a first metal layer formed over the base metal layer. The first metal layer includes a plurality of islands configured to route at least one of (i) a ground signal or (ii) a power signal in the chip. The chip further comprises a second metal layer formed over the first metal layer. The second metal layer includes a plurality of islands configured to route at least one of (i) the ground signal or (ii) the power signal in the chip. | 04-26-2012 |
Weidong Li, San Jose, CA US
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20110318905 | SILICON/GERMANIUM NANOPARTICLE INKS, LASER PYROLYSIS REACTORS FOR THE SYNTHESIS OF NANOPARTICLES AND ASSOCIATED METHODS - Laser pyrolysis reactor designs and corresponding reactant inlet nozzles are described to provide desirable particle quenching that is particularly suitable for the synthesis of elemental silicon particles. In particular, the nozzles can have a design to encourage nucleation and quenching with inert gas based on a significant flow of inert gas surrounding the reactant precursor flow and with a large inert entrainment flow effectively surrounding the reactant precursor and quench gas flows. Improved silicon nanoparticle inks are described that has silicon nanoparticles without any surface modification with organic compounds. The silicon ink properties can be engineered for particular printing applications, such as inkjet printing, gravure printing or screen printing. Appropriate processing methods are described to provide flexibility for ink designs without surface modifying the silicon nanoparticles. | 12-29-2011 |
20130105806 | STRUCTURES INCORPORATING SILICON NANOPARTICLE INKS, DENSIFIED SILICON MATERIALS FROM NANOPARTICLE SILICON DEPOSITS AND CORRESPONDING METHODS | 05-02-2013 |
20130189831 | SILICON/GERMANIUM NANOPARTICLE INKS AND METHODS OF FORMING INKS WITH DESIRED PRINTING PROPERTIES - Improved silicon/germanium nanoparticle inks are described that have silicon/germanium nanoparticles well distributed within a stable dispersion. In particular the inks are formulated with a centrifugation step to remove contaminants as well as less well dispersed portions of the dispersion. A sonication step can be used after the centrifugation, which is observed to result in a synergistic improvement to the quality of some of the inks. The silicon/germanium ink properties can be engineered for particular deposition applications, such as spin coating or screen printing. Appropriate processing methods are described to provide flexibility for ink designs without surface modifying the silicon/germanium nanoparticles. The silicon/germanium nanoparticles are well suited for forming semiconductor components, such as components for thin film transistors or solar cell contacts. | 07-25-2013 |
20130221286 | SILICON/GERMANIUM NANOPARTICLE INKS, LASER PYROLYSIS REACTORS FOR THE SYNTHESIS OF NANOPARTICLES AND ASSOCIATED METHODS - Laser pyrolysis reactor designs and corresponding reactant inlet nozzles are described to provide desirable particle quenching that is particularly suitable for the synthesis of elemental silicon particles. In particular, the nozzles can have a design to encourage nucleation and quenching with inert gas based on a significant flow of inert gas surrounding the reactant precursor flow and with a large inert entrainment flow effectively surrounding the reactant precursor and quench gas flows. Improved silicon nanoparticle inks are described that has silicon nanoparticles without any surface modification with organic compounds. The silicon ink properties can be engineered for particular printing applications, such as inkjet printing, gravure printing or screen printing. Appropriate processing methods are described to provide flexibility for ink designs without surface modifying the silicon nanoparticles. | 08-29-2013 |
20140151706 | STRUCTURES INCORPORATING SILICON NANOPARTICLE INKS, DENSIFIED SILICON MATERIALS FROM NANOPARTICLE SILICON DEPOSITS AND CORRESPONDING METHODS - Silicon nanoparticle inks provide a basis for the formation of desirable materials. Specifically, composites have been formed in thin layers comprising silicon nanoparticles embedded in an amorphous silicon matrix, which can be formed at relatively low temperatures. The composite material can be heated to form a nanocrystalline material having crystals that are non-rod shaped. The nanocrystalline material can have desirable electrical conductive properties, and the materials can be formed with a high dopant level. Also, nanocrystalline silicon pellets can be formed from silicon nanoparticles deposited form an ink in which the pellets can be relatively dense although less dense than bulk silicon. The pellets can be formed from the application of pressure and heat to a silicon nanoparticle layer. The materials described herein can be effectively used for the formation of doped contacts for crystalline silicon solar cells, thin film silicon solar cells, electronic devices, such as printed electronics, and other useful products. | 06-05-2014 |
20140179049 | SILICON/GERMANIUM-BASED NANOPARTICLE PASTES WITH ULTRA LOW METAL CONTAMINATION - Silicon based nanoparticle inks are described with very low metal contamination levels. In particular, metal contamination levels can be established in the parts-per-billion range. The inks of particular interest generally comprise a polymer to influence the ink rheology. Techniques are described that are suitable for purifying polymers soluble in polar solvents, such as alcohols, with respect metal contamination. Very low levels of metal contamination for cellulose polymers are described. | 06-26-2014 |
20140346436 | PRINTABLE INKS WITH SILICON/GERMANIUM BASED NANOPARTICLES WITH HIGH VISCOSITY ALCOHOL SOLVENTS - Silicon based nanoparticle inks are formulated with viscous polycyclic alcohols to control the rheology of the inks. The inks can be formulated into pastes with non-Newtonian rheology and good screen printing properties. The inks can have low metal contamination such that they are suitable for forming semiconductor structures. The silicon based nanoparticles can be elemental silicon particles with or without dopant. | 11-27-2014 |
Wei-Zhong Li, San Jose, CA US
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20090215224 | COATING METHODS AND APPARATUS FOR MAKING A CIGS SOLAR CELL - A method for manufacturing a thin film solar cell involves applying an inductively-coupled-plasma during the deposition of selenium. A precursor thin film is formed. The precursor thin film can include copper, indium, and gallium. The inductively-coupled-plasma is applied to the selenium as the selenium is deposited into the precursor thin film to produce the thin film. The selenium is deposited into precursor thin film by evaporation, sputtering, or using a reactive gas. An inert gas is used as a carry and discharge gas. The precursor thin film and the selenium are deposited using a deposition system. The deposition system includes an inductively-coupled-plasma device. The inductively-coupled-plasma device includes a quartz plate, a plasma discharge coil, and an inlet system. The deposition can be an in-line system, a roll-to-roll system, or a hybrid system. | 08-27-2009 |
Wenmei Li, San Jose, CA US
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20090289369 | MEMORY DEVICE PERIPHERAL INTERCONNECTS AND METHOD OF MANUFACTURING - An integrated circuit memory device, in one embodiment, includes a substrate and first and second inter-level dielectric layers successively disposed on the substrate. One or more contacts in the peripheral extend through the first inter-level dielectric layer to respective components. One or more vias and a plurality of dummy vias extend through the second inter-level dielectric layer in the peripheral area. Each of the one or more peripheral vias extend to a respective peripheral contact. The peripheral dummy vias are located proximate the peripheral vias. | 11-26-2009 |
20100207191 | METHOD AND DEVICE EMPLOYING POLYSILICON SCALING - A memory and method of manufacture employing word line scaling. A layered stack, including a charge trapping component and a core polysilicon layer, is formed on a core section and a peripheral section of a substrate. A portion of the layered stack, including the core polysilicon layer is then removed from the peripheral section. A peripheral polysilicon layer, which is thicker than the core polysilicon layer of the layered stack, is next formed on the layered stack and the peripheral section. The layered stack is then isolated from the peripheral polysilicon layer by removing a portion of the peripheral polysilicon layer from the core section, and polysilicon lines are patterned in the isolated layered stack. | 08-19-2010 |
20100276746 | SONOS MEMORY CELLS HAVING NON-UNIFORM TUNNEL OXIDE AND METHODS FOR FABRICATING SAME - Methods for forming a memory cell are disclosed. A method includes forming a source-drain structure in a semiconductor substrate where the source-drain structure includes a rounded top surface and sidewall surfaces. An oxide layer is formed on the top and sidewall surfaces of the source-drain structure. The thickness of the portion of the oxide layer that is formed on the top surface of the source-drain structure is greater than the thickness of the portion of the oxide layer that is formed on the sidewall surfaces of the source-drain structure. | 11-04-2010 |
20110057315 | MEMORY DEVICE PERIPHERAL INTERCONNECTS - An integrated circuit memory device, in one embodiment, includes a substrate and first and second inter-level dielectric layers successively disposed on the substrate. One or more contacts in the peripheral extend through the first inter-level dielectric layer to respective components. One or more vias and a plurality of dummy vias extend through the second inter-level dielectric layer in the peripheral area. Each of the one or more peripheral vias extend to a respective peripheral contact. The peripheral dummy vias are located proximate the peripheral vias. | 03-10-2011 |
20120056260 | METHOD AND DEVICE EMPLOYING POLYSILICON SCALING - A memory and method of manufacture employing word line scaling. A layered stack, including a charge trapping component and a core polysilicon layer, is formed on a core section and a peripheral section of a substrate. A portion of the layered stack, including the core polysilicon layer is then removed from the peripheral section. A peripheral polysilicon layer, which is thicker than the core polysilicon layer of the layered stack, is next formed on the layered stack and the peripheral section. The layered stack is then isolated from the peripheral polysilicon layer by removing a portion of the peripheral polysilicon layer from the core section, and polysilicon lines are patterned in the isolated layered stack. | 03-08-2012 |
20130277732 | SONOS MEMORY CELLS HAVING NON-UNIFORM TUNNEL OXIDE AND METHODS FOR FABRICATING SAME - Methods for forming a memory cell are disclosed. A method includes forming a source-drain structure in a semiconductor substrate where the source-drain structure includes a rounded top surface and sidewall surfaces. An oxide layer is formed on the top and sidewall surfaces of the source-drain structure. The thickness of the portion of the oxide layer that is formed on the top surface of the source-drain structure is greater than the thickness of the portion of the oxide layer that is formed on the sidewall surfaces of the source-drain structure. | 10-24-2013 |
Xiangli Li, San Jose, CA US
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20090272881 | Apparatus, method, and system providing pixel having increased fill factor - A method, apparatus, and system providing a pixel having increased fill factor by removing the row select transistor. A reset transistor in the pixel is connected to a column line, and the column line is used alternatively as a pixel readout line and as a voltage supply line for resetting a storage region in the pixel through the resent transistor. | 11-05-2009 |
20090302323 | Method and apparatus for providing a low-level interconnect section in an imager device - Imager pixels with low-level interconnect sections, methods of assembling imager pixels with low-level interconnect sections, and systems containing imager pixels with low-level interconnect sections. Imager pixels are formed such that specific interconnections between transistors and other components of an imager array are removed from one or more upper level metallization sections and placed on a low-level interconnect section closer to the photodetector, such that one upper metallization section is eliminated. | 12-10-2009 |
20100079646 | Vertical 4-way shared pixel in a single column with internal reset and no row select - A method and apparatus for reducing space and pixel circuit complexity by using a 4-way shared vertically aligned pixels in a same column. The at least four pixels in the pixel circuit share a reset transistor and a source follower transistor, can have a plurality of same colored pixels and a plurality of colors, but do not include a row select transistor. | 04-01-2010 |
20110310278 | SYSTEMS AND METHODS FOR ADAPTIVE CONTROL AND DYNAMIC RANGE EXTENSION OF IMAGE SENSORS - Systems and methods are provided for obtaining adaptive exposure control and dynamic range extension of image sensors. In some embodiments, an image sensor of an image system can include a pixel array with one or more clear pixels. The image system can separately control the amount of time that pixels in different lines of the pixel array are exposed to light. As a result, the image system can adjust the exposure times to prevent over-saturation of the clear pixels, while also allowing color pixels of the pixel array to be exposed to light for a longer period of time. In some embodiments, the dynamic range of the image system can be extended through a reconstruction and interpolation process. For example, a signal reconstruction module can extend the dynamic range of one or more green pixels by combining signals associated with green pixels in different lines of the pixel array. | 12-22-2011 |
20120091317 | IMAGING SYSTEMS AND METHODS INCLUDING PIXEL ARRAYS WITH REDUCED NUMBERS OF METAL LINES AND CONTROL SIGNALS - This is generally directed to systems and methods for reduced metal lines and control signals in an imaging system. For example, in some embodiments a pixel cell of an imaging system can operate without a row select transistor, and therefore can operate without a row select metal control line. As another example, in some embodiments a pixel cell can share its reset transistor control line with a transfer transistor control line of another pixel cell. In this manner, an imaging system can be created that averages a single metal line per pixel cell. In some embodiments, operation of such reduced-metal line imaging systems can use modified timing schemes of control signals. | 04-19-2012 |
20120097842 | IMAGING PIXELS WITH SHIELDED FLOATING DIFFUSIONS - An imaging system may include imaging pixels. Each imaging pixel may include floating diffusion metal lines associated with a floating diffusion node in that imaging pixel, pixel output metal lines associated with a pixel output, and additional metal lines. The floating diffusion metal lines node may be at least partially surrounded by the pixel output metal lines. Because the floating diffusion metal lines are at least partially surrounded by the pixel output metal lines, the parasitic capacitance between the floating diffusion metal lines and the additional metal lines may be reduced. A source-follower transistor in each imaging pixel may provide a gain between the floating diffusion metal lines and the pixel output metal lines. Due to the Miller effect, the gain induced by the source-follower transistor may reduce the parasitic capacitance between the floating diffusion metal lines and the pixel output metal lines. | 04-26-2012 |
20120188424 | COMMON ELEMENT PIXEL ARCHITECTURE (CEPA) FOR FAST SPEED READOUT - The present invention relates to a common element pixel architecture (CEPA) imager. The CEPA includes a first column of pixels and a second column of pixels. The CEPA also includes a first column line and a second column line. A first group of pixels is arranged including pixels from the first column and the second column coupled to the first column line. A second group of pixels is arranged including other pixels from the first column and the second column coupled to the second column line. | 07-26-2012 |
20120188430 | IMAGER PIXEL ARCHITECTURE WITH ENHANCED COLUMN DISCHARGE AND METHOD OF OPERATION - A pixel circuit includes a photosensor and a floating diffusion node. A circuit is coupled to the floating diffusion node, for selectively providing a pixel output signal to a column line. A reset circuit, which resets the floating diffusion node, is configured to be activated by the column line. A pullup circuit is included for controlling the reset circuit through a signal on the column line. A discharge circuit, which is separate from the reset circuit, is used for discharging the pixel output signal on the column line. The discharge circuit includes a transistor having a first source/drain terminal coupled to the column line and a second source/drain terminal coupled to a fixed voltage level. The gate of the transistor activates the discharging of the column line. | 07-26-2012 |
20120241591 | PUMPED PINNED PHOTODIODE PIXEL ARRAY - The present invention relates to a pumped pixel that includes a first photo-diode accumulating charge in response to impinging photons, a second photo-diode and a floating diffusion positioned on a substrate of the pixel. The pixel also includes a charge barrier positioned on the substrate between the first photo-diode and the second photo-diode, where the charge barrier temporarily blocks charge transfer between the first photo-diode and the second photo-diode. Also included is a pump gate positioned on the substrate adjacent to the charge barrier. The pump gate pumps the accumulated charge from the first photo-diode to the second photo-diode through the charge barrier in response to a pump voltage applied by a controller. Also included is a transfer gate positioned on the substrate between the second photo-diode and the floating diffusion. The transfer gate transfers the pumped charge from the second photo-diode to the floating diffusion in response to a transfer voltage applied by a controller. | 09-27-2012 |
20120274744 | STRUCTURED LIGHT IMAGING SYSTEM - Structured light imaging method and systems are described. An imaging method generates a stream of light pulses, converts the stream after reflection by a scene to charge, stores charge converted during the light pulses to a first storage element, and stores charge converted between light pulses to a second storage element. A structured light image system includes an illumination source that generates a stream of light pulses and an image sensor. The image sensor includes a photodiode, first and second storage elements, first and second switches, and a controller that synchronizes the image sensor to the illumination source and actuates the first and second switches to couple the first storage element to the photodiode to store charge converted during the light pulses and to couple the second storage element to the photodiode to store charge converted between the light pulses. | 11-01-2012 |
20130128089 | VERTICAL 4-WAY SHARED PIXEL IN A SINGLE COLUMN WITH INTERNAL RESET AND NO ROW SELECT - A method and apparatus for reducing space and pixel circuit complexity by using a 4-way shared vertically aligned pixels in a same column. The at least four pixels in the pixel circuit share a reset transistor and a source follower transistor, can have a plurality of same colored pixels and a plurality of colors, but do not include a row select transistor. | 05-23-2013 |
20130308021 | SYSTEMS AND METHODS FOR ADAPTIVE CONTROL AND DYNAMIC RANGE EXTENSION OF IMAGE SENSORS - Systems and methods are provided for obtaining adaptive exposure control and dynamic range extension of image sensors. In some embodiments, an image sensor of an image system can include a pixel array with one or more clear pixels. The image system can separately control the amount of time that pixels in different lines of the pixel array are exposed to light. As a result, the image system can adjust the exposure times to prevent over-saturation of the clear pixels, while also allowing color pixels of the pixel array to be exposed to light for a longer period of time. In some embodiments, the dynamic range of the image system can be extended through a reconstruction and interpolation process. For example, a signal reconstruction module can extend the dynamic range of one or more green pixels by combining signals associated with green pixels in different lines of the pixel array. | 11-21-2013 |
20140146209 | PUMPED PINNED PHOTODIODE PIXEL ARRAY - The present invention relates to a pumped pixel that includes a first photo-diode accumulating charge in response to impinging photons, a second photo-diode, and a floating diffusion positioned on a substrate. The pixel also includes a charge barrier positioned on the substrate between the first photo-diode and the second photo-diode, where the charge harrier temporarily blocks charge transfer between the first photo-diode and the second photo-diode. A pump gate may also be formed on the substrate adjacent to the charge barrier. The pump gate pumps the accumulated charge from the first photo-diode to the second photo-diode through the charge barrier. Also included is a transfer gate positioned on the substrate between the second photo-diode and the floating diffusion. The transfer gate serves to transfer the pumped charge from, the second photo-diode to the floating diffusion. | 05-29-2014 |
20140247378 | EXPOSURE CONTROL FOR IMAGE SENSORS - A method of operating an image sensor. Charge accumulated in a photodiode during a first sub-exposure may be selectively stored in a storage node responsive to a first control signal. Charge accumulated in the photodiode during a first reset period may be selectively discarded responsive to a second control signal. Charge accumulated in the photodiode during a second sub-exposure may be selectively stored responsive to the first control signal. Charge stored in the storage node from the first and second sub-exposures may be transferred to a floating diffusion node responsive to a third control signal. | 09-04-2014 |
20140252201 | CHARGE TRANSFER IN IMAGE SENSORS - Apparatuses and methods for charge transfer in image sensors are disclosed. One example of an image sensor pixel may include a first charge storage node and a second charge storage node. A transfer circuit may be coupled between the first and second charge storage nodes, and the transfer circuit may have a first region proximate the first charge storage node and configured to have a first potential. The transfer circuit may also have a second region proximate the second charge storage node configured to have a second, higher potential. An input node may be configured to control the first and second potentials based on a transfer signal provided to the input node. | 09-11-2014 |
20140253768 | IMAGE SENSOR WITH REDUCED BLOOMING - An image sensor for an electronic device. The image sensor includes a first light sensitive element for collecting charge and having a first saturation value and a well surrounding at least a portion of the first light sensitive element and having a first doping concentration. The image sensor further includes a bridge region defined in the well and in communication with the first light sensitive element and having a second doping concentration and a blooming node in communication with the bridge region and a voltage source. The second doping concentration is less than the first doping concentration and when light sensitive element collects sufficient charge to reach the first saturation value, additional charge received by the light sensitive element travels to the blooming node via the bridge region. | 09-11-2014 |
20140267850 | Image Sensor with In-Pixel Depth Sensing - An imaging area in an image sensor includes a plurality of photo detectors. A light shield is disposed over a portion of two photo detectors to partially block light incident on the two photo detectors. The two photo detectors and the light shield combine to form an asymmetrical pixel pair. The two photo detectors in the asymmetrical pixel pair can be two adjacent photo detectors. The light shield can be disposed over contiguous portions of the two adjacent photo detectors. A color filter array can be disposed over the plurality of photo detectors. The filter elements disposed over the two photo detectors can filter light representing the same color or different colors. | 09-18-2014 |
20150035028 | Image Sensor with Buried Light Shield and Vertical Gate - A pixel in an image sensor can include a photodetector and a storage region disposed in one substrate, or a photodetector disposed in one substrate and a storage region in another substrate. A buried light shield is disposed between the photodetector and the storage region. A sense region, such as a floating diffusion, can be adjacent to the storage region, with the buried light shield disposed between the photodetector and the storage and sense regions. When the photodetector and the storage region are disposed in separate substrates, a vertical gate can be formed through the buried light shield and used to initiate the transfer of charge from the photodetector and the storage region. A transfer channel formed adjacent to, or around the vertical gate provides a channel for the charge to transfer from the photodetector to the storage region. | 02-05-2015 |
Xiaochun Li, San Jose, CA US
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20110299759 | RETICLE DEFECT INSPECTION WITH MODEL-BASED THIN LINE APPROACHES - Provided are novel inspection methods and systems for inspecting photomasks to identify various defects using a model-based approach and information obtained from modeled images. Modeled or simulation images are generated directly from test or reference images. Some examples include aerial images that represent expected patterns projected by a lithography system on a substrate as well as photoresist images that represent expected resist patterns. Test images are first represented as a band limited mask pattern, which may include only linear terms for faster image processing. This pattern is then used to construct a modeled image, which in turn is used to construct a model-based feature map. This map serves as a base for inspecting the original test images to identify photomask defects and may include information that allows differentiating between various feature types based on their lithographic significance and other characteristics. | 12-08-2011 |
Xingqun Li, San Jose, CA US
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20090307511 | PORTABLE ELECTRONIC DEVICES WITH POWER MANAGEMENT CAPABILITIES - An electronic device may operate in standby and active modes. A headset may be coupled to the electronic device. The electronic device may have audio codec circuitry. The audio codec circuitry may use general purpose input-output circuitry in handling button and headset activity during active mode. Processing circuitry may be used to reconfigure the audio codec in real time. When the electronic device is in the standby mode and activity is detected, the codec may be configured to provide an interrupt signal to a power management unit that wakes the device. When the electronic device is in active mode and no user inputs are received within a given period of time, the central processor in the electronic device may place the device in standby mode. | 12-10-2009 |
20100081487 | MULTIPLE MICROPHONE SWITCHING AND CONFIGURATION - A mobile communications device contains at least two microphones. One microphone is designated by a selector to provide a voice dominant signal and another microphone is designated to provide a noise or echo dominant signal, for a call or a recording. The selector communicates the designations to a switch that routes the selected microphone signals to the inputs of a processor for voice signal enhancement. The selected voice dominant signal is then enhanced by suppressing ambient noise or canceling echo therein, based on the selected noise or echo dominant signal. The designation of microphones may change at any instant during the call or recording depending on various factors, e.g. based on the quality of the microphone signals. Other embodiments are also described. | 04-01-2010 |
20120200172 | AUDIO ACCESSORY TYPE DETECTION AND CONNECTOR PIN SIGNAL ASSIGNMENT - An electronic audio host device has an audio accessory connector with multiple pins. An ultrasonic test signal source has an output coupled to a first pin of the connector. A programmable switch circuit couples a second or third pin of the connector, to a ground of the audio host device. A controller measures a signal on one of the pins of the connector while the test signal source is on, and compares the measured signal to a predetermined, stored signature. The signature is associated with one of several different accessory plug pin assignments for the connector, which can be configured using the programmable switch circuit. Other embodiments are also described and claimed. | 08-09-2012 |
20130216050 | MULTIPLE MICROPHONE SWITCHING AND CONFIGURATION - A mobile communications device contains at least two microphones. One microphone is designated by a selector to provide a voice dominant signal and another microphone is designated to provide a noise or echo dominant signal, for a call or a recording. The selector communicates the designations to a switch that routes the selected microphone signals to the inputs of a processor for voice signal enhancement. The selected voice dominant signal is then enhanced by suppressing ambient noise or canceling echo therein, based on the selected noise or echo dominant signal. The designation of microphones may change at any instant during the call or recording depending on various factors, e.g. based on the quality of the microphone signals. Other embodiments are also described. | 08-22-2013 |
20130249868 | CONTROLLING A THERMALLY SENSITIVE OVER-CURRENT PROTECTOR - A method for controlling a thermally sensitive over-current protector is described. A battery current is monitored. It is then determined whether or not the monitored current has exceeded a predetermined threshold during the entirety of a predetermined time interval. If yes, then a current source is signaled to raise its current, so as to increase the heat being generated by a heating element that is being driven by the current source thereby tripping the thermally sensitive over-current protector. Other embodiments are also described and claimed. | 09-26-2013 |
20130250465 | ELECTRICAL OVER-CURRENT PROTECTION DEVICE - An electrical component package has integrated therein first and second pairs of electrodes, wherein the first pair of electrodes are electrically isolated from the second pair of electrodes. A thermally sensitive positive temperature coefficient (PTC) conductive element abuts the first pair of terminals. Also integrated in the package is an electrical heating element that abuts the second pair of terminals, and receives a drive current for generating heat that is transferred to trip the PTC conductive element. Other embodiments are also described and claimed. | 09-26-2013 |
20130301171 | USER-ACTUATED BUTTON ESD PROTECTION CIRCUIT WITH SPARK GAP - A consumer electronic device including an electronic circuit designed to protect a user-actuated physical button from becoming degraded due to electrostatic discharges (ESD) strikes is described herein. The device includes a housing and the user-actuated physical button is exposed through the external surface of the housing. The device further includes a mechanical switch that is coupled to the physical button and a first resistor that is electrically coupled with a pair of terminals of the switch. The first resistor may be coupled either in series or in parallel with the terminals of the switch. To protect the first resistor from ESD strikes, a first spark gap is coupled in parallel with the first resistor. The device may also include a buffer circuit that is coupled to the switch. Other embodiments are also described. | 11-14-2013 |
20140085850 | Printed circuit board with compact groups of devices - Electronic devices may contain electrical systems in which electrical components are mounted on a substrate such as a printed circuit board. The electrical components may include surface mount technology components. Multiple surface mount technology components may be stacked on top of each other and beside each other to form an electrical component that minimizes the amount of area that is consumed on a printed circuit board. Noise suppression circuits and other circuits may be implemented using stacked surface mount technology components. Surface mount technology components placed on the printed circuit board may be pushed together and subsequently injection molded to form packed component groups. An integrated circuit may be mounted to the printed circuit board via an interposer and may cover components mounted to the printed circuit board. An integrated circuit may be mounted over a recessed portion of the printed circuit board on which components are mounted. | 03-27-2014 |
Xipu Li, San Jose, CA US
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20100030482 | Real-Time Swimming Monitor - A wearable device for monitoring and providing real-time feedback about a swimmer's body motion and performance, in particular, body orientation and forward speed, is provided. The device comprises a three-axis accelerometer, optionally a three-axis gyroscope, a memory, and a microcontroller configured to process the sensor input, calculate a swimmer's performance and provide feedback to the swimmer through an output. The output can be an earpiece or a swimming goggle with a digital display. | 02-04-2010 |
Ying-Syi Li, San Jose, CA US
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20080316583 | FLUORINATED SILICON PHTHALOCYANINES AND NAPHTHALOCYANINES FOR ELECTROPHORETIC DISPLAY - This invention relates to stable colorants of high extinction coefficient and high solubility or dispersibility for an electrophoretic, magnetophoretic or electromagnetophoretic display. More particularly, it relates to stable colorants for a microcup-based electrophoretic or electromagnetophoretic display the cells of which are filled with charged and/or magnetic particles dispersed in a halogenated, preferably a fluorinated, solvent. The use of the stable colorants allows the display to be of superior contrast ratio and longevity, and suitable for high-quality imagery applications. | 12-25-2008 |
Yubao Li, San Jose, CA US
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20120168707 | CARBON NANO-FILM REVERSIBLE RESISTANCE-SWITCHABLE ELEMENTS AND METHODS OF FORMING THE SAME - Methods of forming a microelectronic structure are provided, the microelectronic structure including a first conductor, a discontinuous film of metal nanoparticles disposed on a surface above the first conductor, a carbon nano-film formed atop the surface and the discontinuous film of metal nanoparticles, and a second conductor disposed above the carbon nano-film. Numerous additional aspects are provided. | 07-05-2012 |
20130075685 | METHODS AND APPARATUS FOR INCLUDING AN AIR GAP IN CARBON-BASED MEMORY DEVICES - In some aspects, a reversible resistance-switching metal-insulator-metal stack is provided that includes a first conducting layer, a carbon nano-tube (“CNT”) material above the first conducting layer, a second conducting layer above the CNT material, and an air gap between the first conducting layer and the CNT material. Numerous other aspects are provided. | 03-28-2013 |
20140252298 | METHODS AND APPARATUS FOR METAL OXIDE REVERSIBLE RESISTANCE-SWITCHING MEMORY DEVICES - In some aspects, a memory cell is provided that includes a first conducting layer, a reversible resistance switching element above the first conducting layer, a second conducting layer above the reversible resistance switching element, and a liner disposed about a sidewall of the reversible resistance switching element. The reversible resistance switching element includes a first metal oxide material, and the liner includes the first metal oxide material. Numerous other aspects are provided. | 09-11-2014 |
Yunyao Li, San Jose, CA US
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20100205201 | User-Guided Regular Expression Learning - A method, device, and computer program product are provided for regular expression learning is provided. An initial regular expression may be received from a user. The initial regular expression is executed over a database. Positive matches and negative matches are labeled. The initial regular expression and the labeled positive and negative matches are input in a transformation process. The transformation process may iteratively execute character class restrictions, quantifier restrictions, negative lookaheads on the initial regular expression to transform the initial regular expression into the pool of candidate regular expressions. The transformation process may execute, one at a time, the character class restrictions, quantifier restrictions, the negative lookaheads. A candidate regular expression is selected from the pool of candidate regular expressions, where the selected candidate regular expression has a best F-Measure out of the pool of candidate regular expressions. | 08-12-2010 |
20110295853 | EXTENSIBLE SYSTEM AND METHOD FOR INFORMATION EXTRACTION IN A DATA PROCESSING SYSTEM - A data mashup system having information extraction capabilities for receiving multiple streams of textual data, at least one of which contains unstructured textual data. A repository stores annotators that describe how to analyze the streams of textual data for specified unstructured data components. The annotators are applied to the data streams to identify and extract the specified data components according to the annotators. The extracted data components are tagged to generate structured data components and the specified unstructured data components in the input data streams are replaced with the tagged data components. The system then combines the tagged data from the multiple streams to form a mashup output data stream. | 12-01-2011 |
20120209844 | EXTENSIBLE SYSTEM AND METHOD FOR INFORMATION EXTRACTION IN A DATA PROCESSING SYSTEM - A data mashup system having information extraction capabilities for receiving multiple streams of textual data, at least one of which contains unstructured textual data. A repository stores annotators that describe how to analyze the streams of textual data for specified unstructured data components. The annotators are applied to the data streams to identify and extract the specified data components according to the annotators. The extracted data components are tagged to generate structured data components and the specified unstructured data components in the input data streams are replaced with the tagged data components. The system then combines the tagged data from the multiple streams to form a mashup output data stream. | 08-16-2012 |
20120303661 | SYSTEMS AND METHODS FOR INFORMATION EXTRACTION USING CONTEXTUAL PATTERN DISCOVERY - Described herein are methods, systems, apparatuses and products for automatically discovering patterns in a text corpus. An aspect provides extracting at least one context string related to at least one annotator from the at least one text corpus; analyzing the at least one context string for at least one sequence, the at least one sequence comprised of at least one subsequence; determining at least one sequence signature for each at least one sequence by applying applicable rules to the at least one sequence; and grouping the at least one sequence signature into at least one group. | 11-29-2012 |
20130185304 | RULE-DRIVEN RUNTIME CUSTOMIZATION OF KEYWORD SEARCH ENGINES - Described herein are methods, systems, apparatuses and products for rule-driven runtime customization of keyword search engines. An aspect provides a method for rule-driven customization of keyword searches, including: receiving by a computer an input keyword query; determining from the input keyword query and a dataset to be queried at least one rule selected from the group consisting of: a re-write rule; a category ranking rule, and a category grouping rule; and applying the at least one rule to generate search results based on domain knowledge of the dataset. Other embodiments are disclosed. | 07-18-2013 |
20130185330 | RULE-DRIVEN RUNTIME CUSTOMIZATION OF KEYWORD SEARCH ENGINES - Described herein are methods, systems, apparatuses and products for rule-driven runtime customization of keyword search engines. An aspect provides a method for rule-driven customization of keyword searches, including: receiving by a computer an input keyword query; determining from the input keyword query and a dataset to be queried at least one rule selected from the group consisting of: a re-write rule; a category ranking rule, and a category grouping rule; and applying the at least one rule to generate search results based on domain knowledge of the dataset. Other embodiments are disclosed. | 07-18-2013 |
20130317806 | ENTITY VARIANT GENERATION AND NORMALIZATION - Determining variants of a text entity comprises parsing the text entity into semantic components and generating variants for each of the semantic components. The entity is recomposed in different morphological forms from the different variants of the semantic components. | 11-28-2013 |
20130317807 | ENTITY VARIANT GENERATION AND NORMALIZATION - Determining variants of a text entity comprises parsing the text entity into semantic components and generating variants for each of the semantic components. The entity is recomposed in different morphological forms from the different variants of the semantic components. | 11-28-2013 |
20130325831 | SEARCH QUALITY VIA QUERY PROVENANCE VISUALIZATION - Methods and arrangements for enhancing search quality. Query search results are displayed, and search query provenance related to the search results is graphically depicted. There is graphically accorded an investigative function to avail investigation of at least one aspect of the search query provenance. | 12-05-2013 |
20140129211 | SVO-BASED TAXONOMY-DRIVEN TEXT ANALYTICS - Organizing textual data into statement clusters. Sentences are extracted from textual data and parsed. A verb usage pattern is identified and an SVO triplet is determined. The SVO triplet is compared to a taxonomy associated with the domain of the data and a sentiment is derived. A statement cluster is constructed comprising a higher level SVO triplet sensitive to the taxonomy and verb usage pattern, as well as the derived sentiment. Accordingly, the statement clusters may be organized by grouping. | 05-08-2014 |
20140129213 | SVO-BASED TAXONOMY-DRIVEN TEXT ANALYTICS - Organizing textual data into statement clusters. Sentences are extracted from textual data and parsed. A verb usage pattern is identified and an SVO triplet is determined. The SVO triplet is compared to a taxonomy associated with the domain of the data and a sentiment is derived. A statement cluster is constructed comprising a higher level SVO triplet sensitive to the taxonomy and verb usage pattern, as well as the derived sentiment. Accordingly, the statement clusters may be organized by grouping. | 05-08-2014 |
20140143661 | BUILDING AND MAINTAINING INFORMATION EXTRACTION RULES - Methods and arrangements for managing development of information extraction rules. One or more documents are opened for extraction. An interface is provided to create a label and thereupon label a portion of the document. The created label is stored, and an extractor is developed based on the labeling. A test interface is provided for the extractor, and results of a test conducted through the test interface are displayed. The extractor is exported. In accordance with at least one embodiment, developers are presented with eased automated guidance to write extractors, which thereby reduces an overall manual effort involved in extractor development. Generally, a focused, tutorial-type environment serves as a guide based on previously developed best practices. | 05-22-2014 |
20140152667 | AUTOMATIC PRESENTATIONAL LEVEL COMPOSITIONS OF DATA VISUALIZATIONS - Embodiments of the invention provide for generating a data presentation artifact. In one aspect of the invention a first data presentation object and a second data presentation object are received from a repository. The first data presentation object defines a first data presentation artifact. The second data presentation object defines a second data presentation artifact. At least one mashup operation is identified that may be performed using the first data presentation object and the second data presentation object. One or more mashup operations are selected from the identified mashup operations. A third data presentation artifact is then generated by applying the selected mashup operations to the first and the second data presentation objects. | 06-05-2014 |
20140330804 | AUTOMATIC SUGGESTION FOR QUERY-REWRITE RULES - Embodiments of the invention relate to automatically suggesting query-rewrite rules. One embodiment includes providing a missing search result for a query. A collection of semantically coherent rewrite rules are generated based on the missing search result. Generating the missing search result includes: selecting candidates including subsequences of the query and subsequences of particular fields of a document, invoking a search engine using the candidates for providing search results, filtering out particular candidates that fail to achieve a desired search result, and classifying remaining candidates based on a learned classifier. Query rewrite rules for document searching are suggested based on the classified remaining candidates. | 11-06-2014 |
20150039290 | KNOWLEDGE-RICH AUTOMATIC TERM DISAMBIGUATION - Embodiments of the invention relate to ambiguity detection. In one embodiment, an object and a topical domain associated with the object are obtained. In this embodiment, the object includes at least one term. At least one of a plurality of information sources is analyzed based on the at least one term and the topical domain. A determination is made that object is one of ambiguous and unambiguous based on analyzing at least one of the plurality of information sources. | 02-05-2015 |
Yvonne Li, San Jose, CA US
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20120278142 | Mobile Device Content Server Method and System - Systems and Methods to deliver mobile content to consumers' mobile phone initiated by a “Call-To-Action” statement placed in non-interactive content or by a “Call-To-Action” at events or promotion campaigns. The system delivers requested content using one or more mobile communication channels. The exchange system selects additional ad content that may be of interest to consumers based on attributes of the requested content. The additional content is presented in titles form or links to mobile web pages. Tags are added to the content link and are used to trace content viewed by consumers resulting from response to the titles or links The system provides closed-loop redemption for mobile content that may contain coupons, promotions, event tickets, membership, and others. The redemption process serves as a method for collecting marketing data. | 11-01-2012 |
Zhengran Li, San Jose, CA US
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20100231797 | VIDEO TRANSITION ASSISTED ERROR RECOVERY FOR VIDEO DATA DELIVERY - Techniques for video data delivery are provided. A first data stream is received that includes a plurality of video data frames. At least one corrupted video data frame is detected in the first data stream. At least one replacement video data frame is generated for the corrupted video data frame(s) based at least on a non-corrupted video data frame received in the first data stream prior to the corrupted video data frame(s). The replacement video data frame(s) include a modified form of the non-corrupted video data frame, and are configured to provide a smooth scene transition from the non-corrupted video data frame. The corrupted video data frame(s) are replaced in the first data stream with the generated replacement video data frame(s) to generate a second data stream. | 09-16-2010 |
Zhengyu Li, San Jose, CA US
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20120061789 | IMAGE SENSOR WITH IMPROVED NOISE SHIELDING - An image sensor includes a device wafer including a pixel array for capturing image data bonded to a carrier wafer. Signal lines are disposed adjacent to a side of the carrier wafer opposite the device wafer and a metal noise shielding layer is disposed beneath the pixel array within at least one of the device wafer or the carrier wafer to shield the pixel array from noise emanating from the signal lines. A through-silicon-via (“TSV”) extends through the carrier wafer and the metal noise shielding layer and extends into the device wafer to couple to circuitry within the device wafer. Further noising shielding may be provided by highly doping the carrier wafer and/or overlaying the bottom side of the carrier wafer with a low-K dielectric material. | 03-15-2012 |
20120113306 | IMAGE SENSOR WITH PIPELINED COLUMN ANALOG-TO-DIGITAL CONVERTERS - An image sensor includes a plurality of pixel cells organized into rows and columns of a pixel array. A bit line is coupled to each of the pixel cells within a line of the pixel array. Readout circuitry is coupled to the bit line to readout the image data from the pixel cells within the line. The readout circuitry includes a line amplifier coupled to the bit line to amplify the image data and first and second sample and convert circuits coupled in parallel to an output of the line amplifier to reciprocally and contemporaneously sample the image data and convert the image data from analog values to digital values. | 05-10-2012 |
Zhihao Li, San Jose, CA US
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20120026628 | PERPENDICULAR MAGNETIC WRITE HEAD HAVING A TRAILING WRAP-AROUND MAGNETIC SHIELD MAGNETICALLY BIASED IN A CROSS TRACK DIRECTION - A perpendicular magnetic write head having improved Bit Error Rate (BER), Adjacent Track Interference (ATI) and Far Track Interference (FTI). The write head includes a write pole and a trailing wrap-around magnetic shield. A permanent magnetic is located at either outer side of the shield. These magnets are magnetized to have magnetizations that are oriented in the same direction, in a direction that is perpendicular to the track direction and parallel with the air bearing surface. | 02-02-2012 |
Zhuang Li, San Jose, CA US
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20110303639 | METHODS FOR PROCESSING SUBSTRATES HAVING METAL HARD MASKS - Methods of processing metal hard masks are provided herein. In some embodiments, a method for processing a metal hard mask layer having a tri-layer resist disposed thereon is provided. A pattern is etched from a patterned photoresist layer into a second anti-reflective layer using a first plasma comprising chlorine. The pattern is etched into a first anti-reflective layer using a second plasma formed from a second process gas. The second anti-reflective layer is removed using a third plasma comprising chlorine (Cl | 12-15-2011 |
20110306215 | METHODS OF PROCESSING SUBSTRATES HAVING METAL MATERIALS - Methods of processing substrates having metal layers are provided herein. In some embodiments, a method of processing a substrate comprising a metal layer having a patterned mask layer disposed above the metal layer, the method may include etching the metal layer through the patterned mask layer; and removing the patterned mask layer using a first plasma formed from a first process gas comprising oxygen (O | 12-15-2011 |
20120094499 | METHOD OF PERFORMING AN IN SITU CHAMBER CLEAN - Methods of performing in situ chamber cleaning for etch chambers are described. | 04-19-2012 |
20120222699 | METHOD FOR REMOVING HALOGEN-CONTAINING RESIDUES FROM SUBSTRATE - Methods for removing halogen-containing residues from a substrate are provided. By combining the heat-up and plasma abatement steps, the manufacturing throughput can be improved. Further, by appropriately controlling the pressure in the abatement chamber, the removal efficiency can be improved as well. | 09-06-2012 |
20120222752 | METHOD EXTENDING THE SERVICE INTERVAL OF A GAS DISTRIBUTION PLATE - Methods for reducing the contamination of a gas distribution plate are provided. In one embodiment, a method for processing a substrate includes transferring the substrate into a chamber, performing a treating process on the substrate, and providing a purge gas into the chamber before or after the treating process to pump out a residue gas relative to the treating process from the chamber. The treating process includes distributing a reactant gas into the chamber through a gas distribution plate. | 09-06-2012 |
Zongwang Li, San Jose, CA US
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20080244359 | Techniques For Correcting Errors Using Iterative Decoding - Techniques are provided for iteratively decoding data recorded on a data storage device. An iterative decoder decodes the data using multiple decoding iterations to correct errors. In multiple iterations of the iterative decoder, a post processing block generates soft information, and a decoder applies a minimum sum decoding algorithm to a low density parity check (LDPC) code to generate extrinsic information based on the soft information and updated soft information. | 10-02-2008 |
20090006930 | Techniques For Generating Bit Reliability Information In The Post Processor - A detector generates a detected sequence, and a post processor generates probability values that indicate the likelihood of a plurality of error events in the detected sequence. The post processor partitions the values into first and second subsets. The post processor selects a first most likely value from the first subset of the values and a second most likely value from the second subset of the values. The post processor generates a bit reliability based on the first and the second most likely values. | 01-01-2009 |
20090006931 | Techniques For Generating Bit Reliability Information In A Post-Processor Using An Error Correction Constraint - Techniques are provided that generate bit reliabilities for a detected sequence. A detector generates the detected sequence. According to one embodiment, a post-processor finds a first set of combinations of one or more error events in the detected sequence satisfying a complete set or a subset of error correction constraints corresponding to the first bit value, finds a second set of combinations of one or more error events in the detected sequence satisfying a complete set or a subset of error correction constraints corresponding to the second bit value, selects a first most likely combination of one or more events of the first set and a second most likely combination of one or more events of the second set, and generates a bit reliability based on the first and the second most likely values. | 01-01-2009 |
20110029826 | Systems and Methods for Re-using Decoding Parity in a Detector Circuit - Various embodiments of the present invention provide systems and methods for data processing. For example, a method for data processing is disclosed that includes receiving an LDPC codeword, and grouping active bits from the LDPC codeword into a series of data bits including one or more user data bits including and at least one LDPC parity bit. The series of data bits satisfies an LDPC parity equation. | 02-03-2011 |
20110029835 | Systems and Methods for Quasi-Cyclic LDPC Code Production and Decoding - Various embodiments of the present invention provide systems and methods for generating a parity check matrix used in data processing. As an example, a method for generating a parity check matrix including selecting a non-affiliated variable node; identifying a check node of the lowest degree; connecting a first edge of the non-affiliated variable node to the identified check node; and connecting one or more additional edges of the non-affiliated variable node to check nodes in accordance with a quasi-cyclic constraint associated with a circulant is disclosed. | 02-03-2011 |
20110029837 | Systems and Methods for Phase Dependent Data Detection in Iterative Decoding - Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing circuit is disclosed that includes a first data detection circuit that applies a phase dependent data detection algorithm to a data set such that a first output of the first data detection circuit varies depending upon a phase of the data set presented to the first data detection circuit. A first phase of the data set is presented to the first data detection circuit. The circuits further include a decoder circuit that applies a decoding algorithm to the first output to yield a decoded output, and a phase shift circuit that phase shifts the decoded output such that a second phase of the data set is provided as a phase shifted output. A second detection circuit applies a phase dependent data detection algorithm to the phase shifted output such that a second output of the second data detection circuit varies from the first output at least in part due to a different phase of the data set presented to the second data detection circuit. | 02-03-2011 |
20110029839 | Systems and Methods for Utilizing Circulant Parity in a Data Processing System - Various embodiments of the present invention provide systems and methods for data processing. For example, a method for data processing is disclosed that includes receiving a codeword that has at least a first circulant with a plurality of data bits and a first circulant parity bit, a second circulant with a plurality of data bits and a second circulant parity bit, and one or more codeword parity bits. The methods further include decoding the codeword using the one or more codeword parity bits to access the first circulant and the second circulant, performing a first circulant parity check on the first circulant, and performing a second circulant parity check on the second circulant. | 02-03-2011 |
20110167246 | Systems and Methods for Data Detection Including Dynamic Scaling - Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is disclosed that includes a channel detector circuit. The channel detector circuit includes a branch metric calculator circuit that is operable to receive a number of violated checks from a preceding stage, and to scale an intrinsic branch metric using a scalar selected based at least in part on the number of violated checks to yield a scaled intrinsic branch metric. | 07-07-2011 |
20110199699 | FREQUENCY-BASED APPROACH FOR DETECTION AND CLASSIFICATION OF HARD-DISC DEFECT REGIONS - In a hard-disc drive read channel, frequency-based measures are generated at two different data frequencies (e.g., 2T and DC) by applying a transform, such as a discrete Fourier transform (DFT), to signal values, such as ADC or equalizer output values, corresponding to, e.g., a 2T data pattern stored on the hard disc. The frequency-based measures are used to detect defect regions on the hard disc and/or to classify defect regions as being due to either thermal asperity (TA) or drop-out media defect (MD). | 08-18-2011 |
20110235490 | AMPLITUDE-BASED APPROACH FOR DETECTION AND CLASSIFICATION OF HARD-DISC DEFECT REGIONS - In a hard-disc drive, a defect region on the hard disc is classified as corresponding to either thermal asperity (TA) or media defect (MD) by generating two statistical measures. A first measure (e.g., ∝ | 09-29-2011 |
20110264980 | Systems and Methods for Low Density Parity Check Data Decoding - Various embodiments of the present invention provide systems and methods for decoding data. As an example, a data processing circuit is disclosed that includes a multi-tier decoding circuit having a first tier decoding circuit operable to decode portions of an encoded data set exhibiting low row weight, and a second tier decoding circuit operable to decode portions of an encoded data set exhibiting high row weight. | 10-27-2011 |
20110264987 | Systems and Methods for Low Density Parity Check Data Encoding - Various embodiments of the present invention provide systems and methods for encoding data. As an example, a data encoding circuit is disclosed that includes a first stage data encoder circuit and a second stage data encoder circuit. The first stage data encoder circuit is operable to provide a first stage output. The first stage data encoder circuit includes a first vector multiplier circuit operable to receive a data input and to multiply the data input by a first sparse matrix to yield a first interim value. The second stage encoder circuit includes a second vector multiplier circuit operable to multiply the first stage output by a second sparse matrix to yield a second interim value. | 10-27-2011 |
20110311002 | Turbo-Equalization Methods For Iterative Decoders - Certain embodiments of the present invention are improved turbo-equalization methods for decoding encoded codewords. In one embodiment, in global decoding iteration i, the magnitude values of all decoder-input LLR values (L | 12-22-2011 |
20120033320 | Systems and Methods for Dynamic Scaling in a Read Data Processing System - Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is disclosed that includes a decoder circuit providing a decoded output, and a dynamic scalar calculation circuit that determines a first dynamic scaling value and a second dynamic scaling value based at least in part on the decoded output. A first multiplier circuit multiplies the decoded output by the first dynamic scaling value and provides a first scaled output. A detector circuit receives the first scaled output and provides a detected output. A second multiplier circuit multiplies the detected output by the second dynamic scaling value and provides a second scaled output. | 02-09-2012 |
20120089883 | Systems and Methods for Error Correction Using Irregular Low Density Parity Check Codes - Various embodiments of the present invention provide systems and methods for generating a code format. One method discussed includes: receiving a first matrix having a row width and a column height that is greater than one; incorporating a circulant into a first column of the first matrix; testing the first column for trapping sets, wherein at least one trapping set is identified; selecting a value to mitigate the identified trapping set; and augmenting the first matrix with a second matrix to yield a composite matrix. The second matrix has the selected value in the first column, and wherein the identified trapping set is mitigated. | 04-12-2012 |
20120089888 | Systems and Methods for Multi-Level Quasi-Cyclic Low Density Parity Check Codes - Various embodiments of the present invention provide systems and methods for generating a code format. One method discussed includes: Various embodiments of the present invention provide methods for generating a code format. Such methods include: receiving an indication of a low weight codeword having a trapping set; selecting an initial value for a base matrix; testing the low weight codeword after modification by the initial value to determine an updated weight of the low weight codeword; and testing the low weight codeword after modification by the initial value to determine whether the trapping set remains. | 04-12-2012 |
20120262814 | Systems and Methods for Data Processing - Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is disclosed that includes: a data detector circuit, a data decoder circuit, and a multi-path circuit. The data detector circuit is operable to apply a data detection algorithm to a data input and a decoder output to yield a detected output. The data decoder circuit is operable to apply a decoding algorithm to a decoder input to yield the decoder output and a status input. The multi-path circuit is operable to provide the decoder input based at least in part on the detected output and the status input. | 10-18-2012 |
20120300332 | Systems and Methods for Data Addressing in a Storage Device - Various embodiments of the present invention provide systems and methods for format efficient data storage. As an example, a data storage device is described that includes: a storage medium, a read/write head assembly, and a read channel circuit. The read/write head assembly is disposed in relation to the storage medium and operable to sense information corresponding to an encoded codeword. The read channel circuit is operable to receive the encoded codeword. The read channel circuit includes a missing symbols insertion circuit, a codeword de-scramble circuit, an address insertion circuit, and a data decoder circuit. The missing symbols insertion circuit, the codeword de-scramble circuit, and the address insertion circuit together are operable to pad a derivative of the encoded codeword with a plurality of symbols, to de-scramble the derivative of the encoded codeword, and to insert address information corresponding to the derivative of the encoded codeword to yield a modified encoded codeword. The data decoder circuit is operable to apply a data decoding algorithm to the modified encoded codeword to yield a decoded output. | 11-29-2012 |
20120330584 | Systems and Methods for Power Monitoring in a Variable Data Processing System - Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is discussed that includes: a data detector circuit, a data decoder circuit, and a power monitor circuit. The data detector circuit is operable to apply a data detection algorithm to a data input and a decoded output to yield a detected output. The data decoder circuit is operable to apply a data decoding algorithm to the detected output to yield the decoded output. The power monitor circuit is operable to receive a first power status signal from the data detector circuit and a second power status from the data decoder circuit, and to calculate a power usage of a combination of at least the data detector circuit and the data decoder circuit. In such a system, a number of global iterations through a combination of the data decoder circuit and the data detector circuit is variable and both of the first power status signal and the second power status signal varies at least in part as a function of the number of global iterations. | 12-27-2012 |
20120331363 | Systems and Methods for Reduced Format Non-Binary Decoding - Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is disclosed that includes a data detecting circuit having: a first vector translation circuit, a second vector translation circuit, and a data detector core circuit. The data detecting circuit is operable to receive an input data set and at least one input vector in a first format. The at least one input vector corresponds to a portion of the input data set. The first vector translation circuit is operable to translate the at least one vector to a second format. The data detector core circuit is operable to apply a data detection algorithm to the input data set and the at least one vector in the second format to yield a detected output. The second vector translation circuit operable to translate a derivative of the detected output to the first format to yield an output vector. | 12-27-2012 |
20120331369 | Systems and Methods for Error Correction Using Low Density Parity Check Codes Using Multiple Layer Check Equations - Various embodiments of the present invention provide systems and methods for generating a code format. One method discussed includes: receiving a first matrix having a row width and a column height that is greater than one; incorporating a circulant into a first column of the first matrix; testing the first column for trapping sets, wherein at least one trapping set is identified; selecting a value to mitigate the identified trapping set; and augmenting the first matrix with a second matrix to yield a composite matrix. The second matrix has the selected value in the first column, and wherein the identified trapping set is mitigated. | 12-27-2012 |
20120331370 | Systems and Methods for Non-Binary Decoding - Various embodiments of the present invention provide systems and methods for data processing. A data processing circuit is disclosed that includes: a data detector circuit, a first symbol constrained arrangement circuit, and a second symbol constrained arrangement circuit. The data detector circuit is operable to apply a data detection algorithm to a combination of a first input data set and a decoded data set to yield a detected output that includes a number of non-binary symbols. The first symbol constrained arrangement circuit is operable to receive the detected output and to re-arrange the detected output in accordance with a first arrangement algorithm to yield a re-arranged output. The bits for at least one non-binary symbol from the detected output are maintained together in the re-arranged output. The second symbol constrained arrangement circuit is operable to receive a second input data set and to re-arrange the second data input in accordance with a second arrangement algorithm to yield the decoded data set. The bits for at least one non-binary symbol from the second input data set are maintained together in the decoded data set output. | 12-27-2012 |
20130019141 | Min-Sum Based Non-Binary LDPC DecoderAANM Wang; Chung-LiAACI San JoseAAST CAAACO USAAGP Wang; Chung-Li San Jose CA USAANM LI; ZongwangAACI San JoseAAST CAAACO USAAGP LI; Zongwang San Jose CA USAANM Yang; ShaohuaAACI San JoseAAST CAAACO USAAGP Yang; Shaohua San Jose CA US - Various embodiments of the present invention provide systems and methods for min-sum based decoding of non-binary LDPC codes. For example, a non-binary low density parity check data decoding system is discussed that includes a variable node processor and a check node processor. The variable node processor is operable to generate variable node to check node message vectors and to calculate perceived values based on check node to variable node message vectors. The check node processor is operable to generate the check node to variable node message vectors and to calculate checksums based on variable node to check node message vectors. The check node processor includes a minimum and subminimum finder circuit operable to process a plurality of sub-messages in each variable node to check node message vector. The check node processor also includes a select and combine circuit operable to combine an output of the minimum and subminimum finder circuit to generate the check node to variable node message vectors. | 01-17-2013 |
20130046958 | Systems and Methods for Local Iteration Adjustment - Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is disclosed that includes: a data decoder circuit and a local iteration adjustment circuit. The data decoder circuit is operable to perform a number of local iterations on a decoder input to yield a data output. The local iteration adjustment circuit is operable to generate a limit on the number of local iterations performed by the data decoder circuit | 02-21-2013 |
20130063835 | Systems and Methods for Generating Predictable Degradation Bias - Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is disclosed that includes a data detector circuit and a bias calculation circuit. The data detector circuit is operable to apply a data detection algorithm to a first data set to yield a first series of soft decision data, and to apply the data detection algorithm to a second data set to yield a second series of soft decision data. The bias calculation circuit operable to calculate a series of bias values based at least in part on the first series of soft decision data and the second series of soft decision data. The series of bias values correspond to a conversion between the first series of soft decision data and the second series of soft decision data. | 03-14-2013 |
20130067297 | Systems and Methods for Non-Binary Decoding Biasing Control - Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is disclosed that includes a data detector circuit, a biasing circuit, and a data decoder circuit. The data detector circuit is operable to apply a data detection algorithm to a series of symbols to yield a detected output, and the detected output includes a series of soft decision data corresponding to non-binary symbols. The biasing circuit is operable apply a bias to each of the series of soft decision data to yield a series of biased soft decision data. The data decoder circuit is operable to apply a data decoding algorithm to the series of biased soft decision data corresponding to the non-binary symbols. | 03-14-2013 |
20130080844 | Systems and Methods for Efficient Data Shuffling in a Data Processing System - Various embodiments of the present invention provide systems and methods for data processing. For example, a method for data processing is disclosed that includes: receiving a data input having at least a first local chunk and a second local chunk, the data input also being defined as having at least a first global chunk and a second global chunk; rearranging an order of the first local chunk and the second local chunk to yield a locally interleaved data set; storing the locally interleaved data set to a first memory, such that the first global chunk is stored to a first memory space, and the second global chunk is stored to a second memory space; accessing the locally interleaved data set from the first memory; and storing the locally interleaved data set to a second memory. The first global chunk is stored to a third memory space defined at least in part based on the first memory space, and the second global chunk is stored to a fourth memory space defined at least in part based on the second memory space. | 03-28-2013 |
20130097475 | LDPC Decoder With Targeted Symbol Flipping - Various embodiments of the present invention provide systems and methods for decoding data in a non-binary LDPC decoder with targeted symbol flipping. For example, a non-binary low density parity check data decoder is disclosed that comprises a variable node processor operable to update variable node symbol values according to a plurality of elements in a non-binary Galois Field, a check node processor connected to the variable node processor and operable to perform parity check calculations, and a controller operable to perform symbol flipping and to control decoding iterations in the variable node processor and the check node processor. | 04-18-2013 |
20130111289 | SYSTEMS AND METHODS FOR DUAL PROCESS DATA DECODING | 05-02-2013 |
20130111290 | Systems and Methods for Ambiguity Based Decode Algorithm Modification | 05-02-2013 |
20130111294 | Systems and Methods for Late Stage Precoding | 05-02-2013 |
20130111309 | Systems and Methods for Selective Decode Algorithm Modification | 05-02-2013 |
20130120167 | Systems and Methods for Memory Efficient Data Decoding - Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is disclosed that includes a data decoder circuit. The data decoder circuit is operable to: apply a decoding algorithm to a decoder input on a first decoder iteration to yield a first decoder output; compress an output derived from the first decoder output to yield a compressed decoder output; de-compress the compressed decoder output to yield a second decoder output; and apply the decoding algorithm to the second decoder output to yield a third decoder output. | 05-16-2013 |
20130120169 | Systems and Methods for Reduced Power Multi-Layer Data Decoding - Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is disclosed that includes a data encoder circuit. The data encoder circuit is operable to apply an encoding algorithm to an input data set in accordance with a multi-layer code structure including a first row and a last row to yield an encoded data set. The last row of the multi-layer code structure represented in the encoded data set conforms to an identity matrix. | 05-16-2013 |
20130148232 | Systems and Methods for Combined Binary and Non-Binary Data Processing - Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is disclosed that includes a combination data decoder circuit. The combination data decoder circuit includes: a non-binary data decoder circuit and a binary data decoder circuit. | 06-13-2013 |
20130173932 | Systems and Methods for Decimation Based Over-Current Control - The present inventions are related to systems and methods for data processing, and more particularly to systems and methods for power governance in a data processing system. In some such systems and methods, the operation of one or more calibration circuits is modified when it is determined that too many data processing circuits are active. | 07-04-2013 |
20130232390 | Systems and Methods for Multi-Matrix Data Processing - The present inventions are related to systems and methods for data processing. As one example, a data processing system is discussed that includes a data decoder circuit and a matrix select control circuit. The data decoder circuit is operable to apply a data decode algorithm to a decoder input using a selected parity check matrix to yield a decoder output. The matrix select control circuit operable to select one of a first parity check matrix and a second parity check matrix as the selected parity check matrix. | 09-05-2013 |
20130339827 | Adaptive Calibration of Noise Predictive Finite Impulse Response Filter - Various embodiments of the present inventions are related to adaptive calibration of NPFIR filters in a data detector. For example, an apparatus for calibrating a noise predictive filter is disclosed, including a data detector operable to generate detected values for data sectors and having an embedded noise predictive finite impulse response filter. The apparatus also includes a comparator operable to determine whether a quality metric for a current one of the data sectors meets a noise threshold. The apparatus also includes a filter calibration circuit operable to adapt a number of filter coefficients for the noise predictive finite impulse response filter based on the detected values for the data sectors, and to omit the detected values for the current one of the data sectors from adaptation for one of the filter coefficients if the quality metric for the current one of the data sectors does not meet the noise threshold. | 12-19-2013 |
20140053037 | Multi-Level LDPC Layered Decoder With Out-Of-Order Processing - Various embodiments of the present invention are related to methods and apparatuses for decoding data, and more particularly to methods and apparatuses for multi-level layered LDPC decoding with out-of-order processing. | 02-20-2014 |
20140075264 | CORRECTING ERRORS IN MISCORRECTED CODEWORDS USING LIST DECODING - A receive path of a communications system comprises an error-correction decoder, an error-detection decoder, and a codeword adjuster. The error-correction decoder performs error-correction decoding on a received codeword to generate a valid codeword. The error-detection decoder performs error-detection decoding on the valid codeword to determine whether or not the valid codeword is the correct codeword that was transmitted. If the valid codeword is not the correct codeword, then the codeword adjuster generates an adjusted valid codeword by applying an error vector to the valid codeword. The error-detection decoder performs error-detection decoding on the adjusted valid codeword to determine whether or not the adjusted valid codeword is the correct codeword. When the error-correction decoder generates an incorrect valid codeword, adjusting the valid codeword enables the receive path to recover the correct codeword without retransmitting or re-detecting the codeword. | 03-13-2014 |
20140089757 | LDPC Decoder With Fractional Local Iterations - The present inventions are related to systems and methods for an LDPC decoder with fractional local iterations that may be used in a data processing system with an LDPC decoder and data detector to better balance processing times in the LDPC decoder and data detector. | 03-27-2014 |
20140101510 | Low Density Parity Check Layer Decoder For Codes With Overlapped Circulants - The present inventions are related to systems and methods for decoding data in an LDPC layer decoder for LDPC codes with overlapped circulants. | 04-10-2014 |
20140143628 | Low Density Parity Check Decoder With Flexible Saturation - Embodiments of the present inventions are related to systems and methods for decoding data in an LDPC decoder with flexible saturation levels for variable node probability values. | 05-22-2014 |
20140164866 | Low Density Parity Check Decoder With Miscorrection Handling - A data processing system is disclosed including a decoder circuit, syndrome calculation circuit and hash calculation circuit. The decoder circuit is operable to apply a decoding algorithm to a decoder input based on a first portion of a composite matrix to yield a codeword. The syndrome calculation circuit is operable to calculate a syndrome based on the codeword and on the first portion of the composite matrix. The hash calculation circuit is operable to calculate a hash based on a second portion of the composite matrix. The decoder circuit is also operable to correct the codeword on the hash when the syndrome indicates that the codeword based on the first portion of the composite matrix is correct but a second test indicates that the codeword is miscorrected. | 06-12-2014 |
20140168811 | Irregular Low Density Parity Check Decoder With Low Syndrome Error Handling - A data processing system is disclosed including a data decoder circuit, an error handling circuit and a syndrome checker circuit. The data decoder circuit is operable to apply a data decode algorithm to a decoder input to yield a decoded output, and to calculate a syndrome indicating an error level for the decoded output. The error handling circuit is operable to determine whether any errors in the decoded output involve user data bits. The syndrome checker circuit is operable to trigger the error handling circuit based at least in part on the syndrome. | 06-19-2014 |
20140173385 | Low Density Parity Check Decoder With Dynamic Scaling - A data processing system is disclosed including a low density parity check decoder with a variable node processor, a check node processor and a scaler circuit. The low density parity check decoder is operable to scale soft information with a scaling factor in the scaler circuit while iteratively generating and processing check node to variable node messages in the variable node processor and variable node to check node messages in the check node processor between a plurality of check nodes and variable nodes. The scaling factor is derived from a distribution of possible values in an input to the low density parity check decoder. | 06-19-2014 |
20140281787 | Min-Sum Based Hybrid Non-Binary Low Density Parity Check Decoder - Systems, methods, devices, circuits for a min-sum based hybrid non-binary low density parity check decoder. | 09-18-2014 |
20140281790 | Systems and Methods for Multi-Stage Encoding Of Concatenated Low Density Parity Check Codes - Systems, methods, devices, circuits for data processing, and more particularly to systems and methods for multi-stage encoding for concatenated low density parity check codes. | 09-18-2014 |
20140351671 | Shift Register-Based Layered Low Density Parity Check Decoder - An apparatus for layered low density parity check decoding includes a variable node processor and a check node processor. The variable node processor is operable to generate variable node to check node messages and to calculate perceived data values based on check node to variable node messages. The check node processor includes an intermediate message generator circuit operable to generate intermediate check node messages, a shift register based memory operable to store the intermediate check node messages, and at least one check node to variable node message generator circuit operable to generate the check node to variable node messages based on the intermediate check node messages from the shift register based memory. | 11-27-2014 |