Lee, Kyungki-Do
Dong-Won Lee, Kyungki-Do KR
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20120119650 | ACTIVE CONSTANT POWER SUPPLY APPARATUS - Disclosed is an active constant power supply apparatus, which rectifies power having various intensities and frequencies without using a high capacity condenser for a smoothing circuit which degrades the power factor of a circuit, and supplies constant power to a load. The active constant power supply apparatus includes an AC power supplier for supplying AC power; a rectifying circuit which receives AC power from the AC power supply unit and rectifies the received power; a driving coil connected in series to the load receiving power from the rectifying circuit; a power switch which switches the current passing through the driving coil and the load on/off; a pulse-type driving signal generator connected to a gate terminal of the power switch to control the switching on/off operation of the power switch; a turn-off decider which generates a turn-off signal when the current flowing along the driving coil has a value higher than the designed value, so as to turn off the power switch; and a pulse width controller which measures the control period ranging from the switch-on time of the driving signal generator to the switch-off time of the turn-off decider, and controls the driving pulse width of the driving signal generator such that the driving pulse width coincides with the control period. | 05-17-2012 |
Dong-Yang Lee, Kyungki-Do KR
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20100165782 | MEMORY SYSTEM FOR SELECTIVELY TRANSMITTING COMMAND AND ADDRESS SIGNALS - A system includes a memory controller adapted to output address signals, command signals and select signals; a plurality of memory modules; and a plurality of buses each corresponding to one of the memory modules. Each bus is adapted to transmit corresponding ones of the address signals, the command signals, and the select signals to the corresponding memory module. Each of the memory modules includes: a plurality of memory devices; and a register adapted to receive and buffer the corresponding command and address signals transmitted to the memory module, and adapted to transmit the buffered command signal to the memory devices which are to be accessed, in response to the corresponding select signal for accessing the memory devices. | 07-01-2010 |
Ho Nyun Lee, Kyungki-Do KR
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20090243481 | ORGANIC ELECTROLUMINESCENT DEVICE AND METHOD FOR FABRICATING THE SAME - An organic EL device based on top emission and a method for fabricating the same arc disclosed. The organic EL device includes a substrate, a thin film transistor (TFT) formed on the substrate, a planarization film formed on the entire surface of the substrate including the TFT, a first electrode formed on the planarization film, having a surface at a corner area higher than a surface at a center area, an organic EL layer formed on the first electrode, and a second electrode formed on the organic EL layer. | 10-01-2009 |
Hunteak Lee, Kyungki-Do KR
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20110266656 | Semiconductor Device and Method of Forming Protective Coating Material Over Semiconductor Wafer to Reduce Lamination Tape Residue - A semiconductor device has a build-up interconnect structure formed over an active surface of a semiconductor wafer containing a plurality of semiconductor die separated by a saw street. An insulating layer is formed over the interconnect structure. Bumps are formed over the interconnect structure. A protective coating material is deposited over the insulating layer and saw street. A lamination tape is applied over the coating material. A portion of a back surface of the semiconductor wafer is removed. A mounting tape is applied over the back surface. The lamination tape is removed while leaving the coating material over the insulating layer and saw street. A first channel is formed through the saw street extending partially through the semiconductor wafer. The coating material is removed after forming the first channel. A second channel is formed through the saw street and the mounting tape is removed to singulate the semiconductor wafer. | 11-03-2011 |
20130256840 | Semiconductor Device and Method of Forming Protective Coating Material Over Semiconductor Wafer to Reduce Lamination Tape Residue - A semiconductor device has a build-up interconnect structure formed over an active surface of a semiconductor wafer containing a plurality of semiconductor die separated by a saw street. An insulating layer is formed over the interconnect structure. Bumps are formed over the interconnect structure. A protective coating material is deposited over the insulating layer and saw street. A lamination tape is applied over the coating material. A portion of a back surface of the semiconductor wafer is removed. A mounting tape is applied over the back surface. The lamination tape is removed while leaving the coating material over the insulating layer and saw street. A first channel is formed through the saw street extending partially through the semiconductor wafer. The coating material is removed after forming the first channel. A second channel is formed through the saw street and the mounting tape is removed to singulate the semiconductor wafer. | 10-03-2013 |
Hyouk-Woo Lee, Kyungki-Do KR
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20090005409 | Pyrrolo[3,2-C] Pyrdine Derivatives and Processes for the Preparation Thereof - The present invention provides novel pyrrolo[3,2-c]pyridine derivatives or pharmaceutically acceptable salts thereof, processes for the preparation thereof, and compositions comprising the same. The pyrrolo[3,2-c]pyridine derivatives or pharmaceutically acceptable salts thereof of the present invention have excellent proton pump inhibition effects and possess the ability to attain a reversible proton pump inhibitory effect. | 01-01-2009 |
Jaehyun Lee, Kyungki-Do KR
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20130105967 | Semiconductor Die and Method of Forming Sloped Surface in Photoresist Layer to Enhance Flow of Underfill Material Between Semiconductor Die and Substrate | 05-02-2013 |
20130234318 | Semiconductor Device and Method of Forming Non-Linear Interconnect Layer with Extended Length for Joint Reliability - A semiconductor device has a substrate and first conductive layer formed over the substrate. An insulating layer is formed over the first substrate with an opening over the first conductive layer. A second conductive layer is formed within the opening of the insulating layer. A portion of the second conductive layer is removed to expose a horizontal surface and side surfaces of the second conductive layer below a surface of the insulating layer. The second conductive layer has non-linear surfaces to extend a contact area of the second conductive layer. The horizontal surface and side surfaces can be stepped surfaces or formed as a ring. A third conductive layer is formed over the second conductive layer. A plurality of bumps is formed over the horizontal surface and side surfaces of the second conductive layer. A semiconductor die is mounted to the substrate. | 09-12-2013 |
20140103503 | Semiconductor Device and Method of Forming Non-Linear Interconnect Layer with Extended Length for Joint Reliability - A semiconductor device has a substrate and first conductive layer formed over the substrate. An insulating layer is formed over the first substrate with an opening over the first conductive layer. A second conductive layer is formed within the opening of the insulating layer. A portion of the second conductive layer is removed to expose a horizontal surface and side surfaces of the second conductive layer below a surface of the insulating layer. The second conductive layer has non-linear surfaces to extend a contact area of the second conductive layer. The horizontal surface and side surfaces can be stepped surfaces or formed as a ring. A third conductive layer is formed over the second conductive layer. A plurality of bumps is formed over the horizontal surface and side surfaces of the second conductive layer. A semiconductor die is mounted to the substrate. | 04-17-2014 |
Jaewook Lee, Kyungki-Do KR
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20130343913 | DIAPHRAGM PUMP - An apparatus that includes a chamber. The chamber includes an inlet via which process fluid enters the chamber and an outlet via which the process fluid exits the chamber. A diaphragm is fixed in position in the chamber at a periphery of the diaphragm. The diaphragm includes a magnetic fluid therein. | 12-26-2013 |
Jin-Ho Lee, Kyungki-Do KR
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20080199920 | S-Adenosylmethionine-6-N-Lysine-Methyltransferase From Neurospora Crassa, A Gene Encoding The Same, A Vector And Host Cell Containing The Same, And Method For Producing Trimethyllysine Using The Host Cell - Provided is S-adenosylmethionine-6-N-lysine-methyl-transferase obtained from Neνrospora | 08-21-2008 |
Jin Hwan Lee, Kyungki-Do KR
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20110201978 | WHEELCHAIR TYPE ROBOT FOR WALKING AID - A wheelchair type robot for use as a walking aid wherein an outer skeleton to be worn on the lower body of a user is combined with a lift and a drive part in a wheelchair form. The drive part is furnished with a drive motor and wheels that are installed on a main frame. The lift is furnished with an outer linear guide that is fixed and joined with the main frame, an inner linear guide that can move up and down along same, an upper chair part that connects with the inner linear guide to enable up and down motion, and a lower chair part that connects with the outer linear guide such that unfolds if the inner linear guide descends and folds if it ascends. The outer skeleton is furnished with a lift locking part that is fixed and joined with the upper chair part, an upper frame whereto a thigh brace is joined, a lower frame whereto a calf brace is joined, a hip part that is installed between the lift locking part and the upper frame to rotate the upper frame around the lift locking part, and a knee joint part that is installed between the upper frame and the lower frame to rotate the lower frame around the upper frame. | 08-18-2011 |
Jong Suk Lee, Kyungki-Do KR
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20090232855 | Percutaneous controlled releasing material using nano-sized polymer particles and external application agent containing the same - A percutaneous releasing material and agent having characteristics that include a high stability of an active agent in the formulation, a high topical absorption rate, decreased irritation on the skin, and an increased tactile comfort. The percutaneous releasing material incorporates an external application agent composition that is prepared by using nanometer-sized polymer particles, i.e., particles having a size or diameter between approximately 1 nm and approximately 500 nm, and more preferably having a size between about 30 nm and about 150 nm. Further, the percutaneous releasing material and agent according to the present invention incorporate polymer particles that preferably contain a physiologically active agent that more readily penetrates through the stratum corneum to the upper layer of the dermis, whereby the physiologically active agent is effused into the skin while staying in the upper layer of dermis. | 09-17-2009 |
Jung-Wook Lee, Kyungki-Do KR
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20110027976 | METHOD OF FORMING CHALCOGENIDE THIN FILM - The present invention concerns a method of forming a chalcogenide thin film for a phase-change memory. In the method of forming a chalcogenide thin film according to the present invention, a substrate with a pattern formed is loaded into a reactor, and a source gas is supplied onto the substrate. Here, the source gas includes at least one source gas selected from germanium (Ge) source gas, gallium (Ga) source gas, indium (In) source gas, selenium (Se) source gas, antimony (Sb) source gas, tellurium (Te) source gas, tin (Sn) source gas, silver (Ag) source gas, and sulfur (S) source gas. A first purge gas is supplied onto the substrate in order to purge the source gas supplied onto the substrate, a reaction gas for reducing the source gas is then supplied onto the substrate, and a second purge gas is supplied onto the substrate in order to purge the reaction gas supplied onto the substrate. At least one operation, namely changing the supply time of the first purge gas and/or adjusting the internal pressure of the reactor is performed in such a way as to ensure that the deposition rate at an inner portion of the pattern is greater than the deposition rate at an upper portion of the pattern. According to the present invention, it is possible to form a chalcogenide thin film having an excellent gap-fill property by changing the purge time of the source gas or adjusting the internal pressure of the reactor in such a way as to ensure that the film forming rate at the inner portion of the pattern is greater than the film forming rate at the upper portion of the pattern. | 02-03-2011 |
Ju-Yeol Lee, Kyungki-Do KR
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20090077899 | Polishing Pad Containing Interpenetrating Liquified Vinyl Monomer Network With Polyurethane Matrix Therein - Provided is a polyurethane polishing pad. More specifically, the present invention provides a polyurethane polishing pad having an interpenetrating network structure of a vinyl polymer with a polyurethane matrix via radical polymerization and having no pores and gas bubbles. The polyurethane polishing pad having an interpenetrating network structure of a vinyl polymer exhibits uniform dispersibility and reduced changes in hardness of the urethane pad due to heat and slurry, thereby resulting in no deterioration of polishing efficiency due to abrasion heat and solubility in the slurry upon polishing, and also enables a high-temperature polishing operation. Further, according to the present invention, the interpenetrating network structure leads to an improved polishing rate and abrasion performance, thereby significantly increasing the service life of the polishing pad. | 03-26-2009 |
Kang-Seol Lee, Kyungki-Do KR
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20080285356 | Semiconductor memory device employing clamp for preventing latch up - A semiconductor memory device employs a clamp for preventing latch up. For the purpose, the semiconductor memory device includes a precharging/equalizing unit for precharging and equalizing a pair of bit lines, and a control signal generating unit for producing a control signal which controls enable and disable of the precharging/equalizing unit, wherein the control signal generating unit includes a clamping unit to clamp its source voltage to a voltage level lower than that of its bulk bias. | 11-20-2008 |
Kang-Yong Lee, Kyungki-Do KR
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20090254676 | METHOD FOR TRANSFERRING DATA FRAME END-TO-END USING VIRTUAL SYNCHRONIZATION ON LOCAL AREA NETWORK AND NETWORK DEVICES APPLYING THE SAME - A method for transferring data frame end-to-end in a local area network is provided. In the method, a virtual synch frame shaper is loaded on a frame transmission layer structure provided in end stations in transmitting and receiving sides, which transmits data frame passing through a plurality of Ethernet switches in the LAN. Then, slot counters, which are counted through the virtual synch frame shaper, are exchanged between the end stations, and the slot counters are synchronized. Afterward, the transmit time slot is allocated based on the synchronized slot counters for transmitting data frames between the end stations. Finally, data frames are transmitted based on the synchronized slot counters and the allocated transmit time slot. | 10-08-2009 |
Ki-Hoon Lee, Kyungki-Do KR
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20090090384 | CLEANING METHOD OF APPARATUS FOR DEPOSITING METAL CONTAINING FILM - Provided is a cleaning method of an apparatus for depositing a metal containing film using a metal organic (MO) source. A fluorine (F)-containing gas and a carbon (C)-eliminating gas are supplied to a reactor of the apparatus so that in-situ cleaning can be performed. A solid by-product is not generated in the method, and after a predetermined quantity of wafers is processed, in-situ cleaning can be performed without exposing the reactor to the air such that productivity of the apparatus is maximized. | 04-09-2009 |
20090093083 | METHOD OF DEPOSITING CHALCOGENIDE FILM FOR PHASE-CHANGE MEMORY - Provided is a method of depositing a chalcogenide film for phase-change memory. When the chalcogenide film for phase-change memory is deposited through a method using plasma such as plasma enhanced chemical vapor deposition (PECVD) or plasma enhanced atomic layer deposition (PEALD), a plasma reaction gas including He is used such that the crystallinity of the chalcogenide film is adjusted and the grain size and morphology of the deposited film are adjusted. | 04-09-2009 |
20110027976 | METHOD OF FORMING CHALCOGENIDE THIN FILM - The present invention concerns a method of forming a chalcogenide thin film for a phase-change memory. In the method of forming a chalcogenide thin film according to the present invention, a substrate with a pattern formed is loaded into a reactor, and a source gas is supplied onto the substrate. Here, the source gas includes at least one source gas selected from germanium (Ge) source gas, gallium (Ga) source gas, indium (In) source gas, selenium (Se) source gas, antimony (Sb) source gas, tellurium (Te) source gas, tin (Sn) source gas, silver (Ag) source gas, and sulfur (S) source gas. A first purge gas is supplied onto the substrate in order to purge the source gas supplied onto the substrate, a reaction gas for reducing the source gas is then supplied onto the substrate, and a second purge gas is supplied onto the substrate in order to purge the reaction gas supplied onto the substrate. At least one operation, namely changing the supply time of the first purge gas and/or adjusting the internal pressure of the reactor is performed in such a way as to ensure that the deposition rate at an inner portion of the pattern is greater than the deposition rate at an upper portion of the pattern. According to the present invention, it is possible to form a chalcogenide thin film having an excellent gap-fill property by changing the purge time of the source gas or adjusting the internal pressure of the reactor in such a way as to ensure that the film forming rate at the inner portion of the pattern is greater than the film forming rate at the upper portion of the pattern. | 02-03-2011 |
Myungkil Lee, Kyungki-Do KR
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20100065948 | Semiconductor Device and Method of Forming a Fan-In Package-on-Package Structure Using Through-Silicon Vias - A semiconductor device is made by providing a first semiconductor die having a plurality of contact pads formed over a first surface of the first semiconductor die and having a plurality of through-silicon vias (TSVs) formed within the first semiconductor die. A second semiconductor die is mounted to the first surface of the first semiconductor die using a plurality of solder bumps. At least one of the solder bumps is in electrical communication with the TSVs in the first semiconductor die. The second semiconductor die is mounted to a printed circuit board (PCB) using an adhesive material. A plurality of solder bumps is formed to connect the contact pads of the first semiconductor die to the PCB. An encapsulant is deposited over the first semiconductor die and the second semiconductor die. An interconnect structure is formed over a back surface of the PCB. | 03-18-2010 |
Sang Don Lee, Kyungki-Do KR
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20130141976 | Semiconductor Memory Apparatus - A semiconductor memory apparatus comprises first and second memory blocks each comprising semiconductor elements coupled to first and second local line groups, a first switching circuit configured to couple a first global line group to the first local line group of the first memory block in response to a block selection signal, a second switching circuit configured to couple a second global line group to the second local line groups of the first and second memory blocks in response to the block selection signal, and a third switching circuit configured to couple the first global line group to the first local line group of the second memory block in response to the block selection signal. | 06-06-2013 |
20130142002 | Semiconductor Memory Apparatus - A semiconductor memory apparatus comprises first and second memory blocks each comprising semiconductor elements coupled to first and second local line groups, a first switching circuit configured to couple a first global line group to the first local line group of the first memory block in response to a block selection signal, a second switching circuit configured to couple a second global line group to the second local line groups of the first and second memory blocks in response to the block selection signal, and a third switching circuit configured to couple the first global line group to the first local line group of the second memory block in response to the block selection signal. | 06-06-2013 |
Sang-Kyoung Lee, Kyungki-Do KR
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20090039348 | MULTIPLE TESTING BARS FOR TESTING LIQUID CRYSTAL DISPLAY AND METHOD THEREOF - A plurality of gate lines are formed on an insulating substrate in the horizontal direction, a gate shorting bar connected to the data lines is formed in the vertical direction and a gate insulating film is formed thereon. A plurality of data lines intersecting the gate lines are formed on the gate insulating film in the vertical direction, and a data shorting bar connected to the data lines is formed outside the display region. A first shorting bar is formed on the gate insulating film, located between the gate lines and the gate shorting bar, and connected to the odd gate lines. A second secondary shorting bar is formed parallel to the first shorting bar and connected to the even gate lines. | 02-12-2009 |
Seung Hee Lee, Kyungki-Do KR
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20080227339 | PLUG CONNECTOR FOR MOBILE COMMUNICATION DEVICE - A plug connector for a mobile communication device is provided. The plug connector includes a plurality of contact pins, an insulator, and an outer shell. The contact pins are provided correspondingly to contact terminals of a socket connector for the mobile communication device, and are arranged with predetermined gaps therebetween. The insulator supports the contact pins. The outer shell encloses the insulator, and includes a substrate supporter extended outwardly from the insulator to support an outer surface of a PCB (printed circuit board). The substrate supporter comprises a side supporter enclosing lateral sides of the PCB, and a ground portion bonded to put to earth to a ground circuit of a PCB. The plug connector is capable of firmly bonding with a PCB, preventing from noise occurring. | 09-18-2008 |
20100047949 | STACK TYPE SURFACE ACOUSTIC WAVE PACKAGE, AND METHOD FOR MANUFACTURING THE SAME - Disclosed herein is a stack type surface acoustic wave package. The surface acoustic wave package comprises a first bare chip having a plurality of electrodes formed thereon, a second bare chip having a plurality of electrodes and via-holes formed thereon, a connecting portion electrically connecting the first bare chip to an upper surface of the second bare chip such that the electrodes of the first bare chip face the electrodes of the second bare chip, and a sealing member provided on the first and second bare chips to form an air-tight space on an operating surface between the first and second bare chips. The surface acoustic wave package can prevent deformation due to thermal impact from the outside during a packaging process, enhancing reliability of the product, minimizing the size of the product, and reducing manufacturing costs by reducing the number of components and material costs. | 02-25-2010 |
Taekeun Lee, Kyungki-Do KR
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20090243080 | Flip Chip Interconnection Structure with Bump on Partial Pad and Method Thereof - A semiconductor package includes a semiconductor die with a plurality of solder bumps formed on bump pads. A substrate has a plurality of contact pads each with an exposed sidewall. A solder resist is disposed opening over at least a portion of each contact pad. The solder bumps are reflowed to metallurgically and electrically connect to the contact pads. Each contact pad is sized according to a design rule defined by SRO+2*SRR−2X, where SRO is the solder resist opening, SRR is a solder registration for the manufacturing process, and X is a function of a thickness of the exposed sidewall of the contact pad. The value of X ranges from 5 to 20 microns. The solder bump wets the exposed sidewall of the contact pad and substantially fills an area adjacent to the exposed sidewall. The contact pad can be made circular, rectangular, or donut-shaped. | 10-01-2009 |
20100244245 | Filp Chip Interconnection Structure with Bump on Partial Pad and Method Thereof - A semiconductor package includes a semiconductor die with a plurality of solder bumps formed on bump pads. A substrate has a plurality of contact pads each with an exposed sidewall. A solder resist is disposed opening over at least a portion of each contact pad. The solder bumps are reflowed to metallurgically and electrically connect to the contact pads. Each contact pad is sized according to a design rule defined by SRO+2*SRR−2X, where SRO is the solder resist opening, SRR is a solder registration for the manufacturing process, and X is a function of a thickness of the exposed sidewall of the contact pad. The value of X ranges from 5 to 20 microns. The solder bump wets the exposed sidewall of the contact pad and substantially fills an area adjacent to the exposed sidewall. The contact pad can be made circular, rectangular, or donut-shaped. | 09-30-2010 |
Woon Woo Lee, Kyungki-Do KR
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20100018588 | SHOWER SYSTEM HAVING A PURIFYING AND DRYING FUNCTION - The present invention relates to a shower system having a drying device and a water purifying device, which does not allow a towel to be used for removing moistures on a body after taking a bath or shower using the shower in a bathroom, and exhausts warm winds occurring from the drying device through the shower head, so that the moistures on the body or head may be dried for a short time, and impurities contained in the tap water may be removed by the purifying device to make the water smooth, clear, and good for skin care. | 01-28-2010 |
Yong-Sik Lee, Kyungki-Do KR
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20110229869 | DISPLAY METHOD FOR MAXIMAL USE OF SHORTCUT NUMBERS FOR CELLULAR PHONE - Display methods adding the speed dial number(s) of the called or calling party on the current display of the user's phone so that he/she could memorize and use many speed dial numbers in a shorter period of time. If any cellular subscriber who is using only a few speed dial numbers due to poor memory begins to experience the display method of this invention, he/she can memorize most of necessary speed dial numbers in his/her daily life by dint of the associations being reacted by conditioned reflex, and use them for the rest of his/her life. When a phone user receives a call; Method of displaying the speed dial number(s) and contact name (ID) of a calling party on the receiver's phone; Method of flashing the above two letters alternately to enhance the effect of being associated with each other. When a phone user makes an outgoing call; Method of displaying the speed dial number(s) and contact name (ID) of the called party on the caller's phone. If a caller makes a call by using the search functions or entering the phone numbers; Method of flashing only the speed dial number(s) to enhance the efficiency of recognizing it for the caller: If the caller makes a call by entering a speed dial number(s); Method of flashing only the contact name (ID) of the called party to enable the caller to confirm the called party who is associated with the speed dial number(s) just pressed. The caller places a call and habitually recognizes the speed dial number which is associated with the called party on the line. Every cellular subscriber who is using the cellular phone upgraded with this invention will enjoy the effect that he/she can naturally memorize the speed dial numbers not only necessary for every day's frequent calls but also important for the persons in contact with him/her by phone calls for long. | 09-22-2011 |
Young Jin Lee, Kyungki-Do KR
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20100047949 | STACK TYPE SURFACE ACOUSTIC WAVE PACKAGE, AND METHOD FOR MANUFACTURING THE SAME - Disclosed herein is a stack type surface acoustic wave package. The surface acoustic wave package comprises a first bare chip having a plurality of electrodes formed thereon, a second bare chip having a plurality of electrodes and via-holes formed thereon, a connecting portion electrically connecting the first bare chip to an upper surface of the second bare chip such that the electrodes of the first bare chip face the electrodes of the second bare chip, and a sealing member provided on the first and second bare chips to form an air-tight space on an operating surface between the first and second bare chips. The surface acoustic wave package can prevent deformation due to thermal impact from the outside during a packaging process, enhancing reliability of the product, minimizing the size of the product, and reducing manufacturing costs by reducing the number of components and material costs. | 02-25-2010 |